summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/net
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2020-11-09 12:38:57 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-11-09 13:42:13 +0100
commit85f8d17be5cc2708bd5f6414b8012d5b4c6821d2 (patch)
tree5ab6f5eedf4cf8053152d8da48dacb86dcd5d0a6 /dts/Bindings/net
parenteba1af01dbc94c6ed7c49b9b2142b54c61b8506b (diff)
downloadbarebox-85f8d17be5cc2708bd5f6414b8012d5b4c6821d2.tar.gz
barebox-85f8d17be5cc2708bd5f6414b8012d5b4c6821d2.tar.xz
dts: update to v5.10-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/net')
-rw-r--r--dts/Bindings/net/can/can-controller.yaml18
-rw-r--r--dts/Bindings/net/can/fsl,flexcan.yaml135
-rw-r--r--dts/Bindings/net/can/fsl-flexcan.txt57
3 files changed, 153 insertions, 57 deletions
diff --git a/dts/Bindings/net/can/can-controller.yaml b/dts/Bindings/net/can/can-controller.yaml
new file mode 100644
index 0000000000..9cf2ae0971
--- /dev/null
+++ b/dts/Bindings/net/can/can-controller.yaml
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/can/can-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: CAN Controller Generic Binding
+
+maintainers:
+ - Marc Kleine-Budde <mkl@pengutronix.de>
+
+properties:
+ $nodename:
+ pattern: "^can(@.*)?$"
+
+additionalProperties: true
+
+...
diff --git a/dts/Bindings/net/can/fsl,flexcan.yaml b/dts/Bindings/net/can/fsl,flexcan.yaml
new file mode 100644
index 0000000000..43df15ba8f
--- /dev/null
+++ b/dts/Bindings/net/can/fsl,flexcan.yaml
@@ -0,0 +1,135 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title:
+ Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
+
+maintainers:
+ - Marc Kleine-Budde <mkl@pengutronix.de>
+
+allOf:
+ - $ref: can-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,imx8qm-flexcan
+ - fsl,imx8mp-flexcan
+ - fsl,imx6q-flexcan
+ - fsl,imx53-flexcan
+ - fsl,imx35-flexcan
+ - fsl,imx28-flexcan
+ - fsl,imx25-flexcan
+ - fsl,p1010-flexcan
+ - fsl,vf610-flexcan
+ - fsl,ls1021ar2-flexcan
+ - fsl,lx2160ar1-flexcan
+ - items:
+ - enum:
+ - fsl,imx7d-flexcan
+ - fsl,imx6ul-flexcan
+ - fsl,imx6sx-flexcan
+ - const: fsl,imx6q-flexcan
+ - items:
+ - enum:
+ - fsl,ls1028ar1-flexcan
+ - const: fsl,lx2160ar1-flexcan
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: ipg
+ - const: per
+
+ clock-frequency:
+ description: |
+ The oscillator frequency driving the flexcan device, filled in by the
+ boot loader. This property should only be used the used operating system
+ doesn't support the clocks and clock-names property.
+
+ xceiver-supply:
+ description: Regulator that powers the CAN transceiver.
+
+ big-endian:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ This means the registers of FlexCAN controller are big endian. This is
+ optional property.i.e. if this property is not present in device tree
+ node then controller is assumed to be little endian. If this property is
+ present then controller is assumed to be big endian.
+
+ fsl,stop-mode:
+ description: |
+ Register bits of stop mode control.
+
+ The format should be as follows:
+ <gpr req_gpr req_bit>
+ gpr is the phandle to general purpose register node.
+ req_gpr is the gpr register offset of CAN stop request.
+ req_bit is the bit offset of CAN stop request.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - description: The 'gpr' is the phandle to general purpose register node.
+ - description: The 'req_gpr' is the gpr register offset of CAN stop request.
+ maximum: 0xff
+ - description: The 'req_bit' is the bit offset of CAN stop request.
+ maximum: 0x1f
+
+ fsl,clk-source:
+ description: |
+ Select the clock source to the CAN Protocol Engine (PE). It's SoC
+ implementation dependent. Refer to RM for detailed definition. If this
+ property is not set in device tree node then driver selects clock source 1
+ by default.
+ 0: clock source 0 (oscillator clock)
+ 1: clock source 1 (peripheral clock)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 1
+ minimum: 0
+ maximum: 1
+
+ wakeup-source:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Enable CAN remote wakeup.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ can@1c000 {
+ compatible = "fsl,p1010-flexcan";
+ reg = <0x1c000 0x1000>;
+ interrupts = <48 0x2>;
+ interrupt-parent = <&mpic>;
+ clock-frequency = <200000000>;
+ fsl,clk-source = <0>;
+ };
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ can@2090000 {
+ compatible = "fsl,imx6q-flexcan";
+ reg = <0x02090000 0x4000>;
+ interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 1>, <&clks 2>;
+ clock-names = "ipg", "per";
+ fsl,stop-mode = <&gpr 0x34 28>;
+ };
diff --git a/dts/Bindings/net/can/fsl-flexcan.txt b/dts/Bindings/net/can/fsl-flexcan.txt
deleted file mode 100644
index e10b6eb955..0000000000
--- a/dts/Bindings/net/can/fsl-flexcan.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
-
-Required properties:
-
-- compatible : Should be "fsl,<processor>-flexcan"
-
- where <processor> is imx8qm, imx6q, imx28, imx53, imx35, imx25, p1010,
- vf610, ls1021ar2, lx2160ar1, ls1028ar1.
-
- The ls1028ar1 must be followed by lx2160ar1, e.g.
- - "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan"
-
- An implementation should also claim any of the following compatibles
- that it is fully backwards compatible with:
-
- - fsl,p1010-flexcan
-
-- reg : Offset and length of the register set for this device
-- interrupts : Interrupt tuple for this device
-
-Optional properties:
-
-- clock-frequency : The oscillator frequency driving the flexcan device
-
-- xceiver-supply: Regulator that powers the CAN transceiver
-
-- big-endian: This means the registers of FlexCAN controller are big endian.
- This is optional property.i.e. if this property is not present in
- device tree node then controller is assumed to be little endian.
- if this property is present then controller is assumed to be big
- endian.
-
-- fsl,stop-mode: register bits of stop mode control, the format is
- <&gpr req_gpr req_bit>.
- gpr is the phandle to general purpose register node.
- req_gpr is the gpr register offset of CAN stop request.
- req_bit is the bit offset of CAN stop request.
-
-- fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE).
- It's SoC Implementation dependent. Refer to RM for detailed
- definition. If this property is not set in device tree node
- then driver selects clock source 1 by default.
- 0: clock source 0 (oscillator clock)
- 1: clock source 1 (peripheral clock)
-
-- wakeup-source: enable CAN remote wakeup
-
-Example:
-
- can@1c000 {
- compatible = "fsl,p1010-flexcan";
- reg = <0x1c000 0x1000>;
- interrupts = <48 0x2>;
- interrupt-parent = <&mpic>;
- clock-frequency = <200000000>; // filled in by bootloader
- fsl,clk-source = <0>; // select clock source 0 for PE
- };