dts: update to v4.19-rc1

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

9 files changed, 11 insertions, 13 deletions

diff --git a/dts/Bindings/pci/altera-pcie-msi.txt b/dts/Bindings/pci/altera-pcie-msi.txt
index 09cd3bc4d0..9514c327d3 100644
--- a/dts/Bindings/pci/altera-pcie-msi.txt
+++ b/dts/Bindings/pci/altera-pcie-msi.txt
@@ -7,7 +7,6 @@ Required properties:
 - reg-names:	must include the following entries:
 		"csr": CSR registers
 		"vector_slave": vectors slave port region
-- interrupt-parent:	interrupt source phandle.
 - interrupts:	specifies the interrupt source of the parent interrupt
 		controller. The format of the interrupt specifier depends on the
 		parent interrupt controller.
diff --git a/dts/Bindings/pci/altera-pcie.txt b/dts/Bindings/pci/altera-pcie.txt
index a1dc9366a8..6c396f17c9 100644
--- a/dts/Bindings/pci/altera-pcie.txt
+++ b/dts/Bindings/pci/altera-pcie.txt
@@ -6,7 +6,6 @@ Required properties:
 - reg-names:	must include the following entries:
 		"Txs": TX slave port region
 		"Cra": Control register access region
-- interrupt-parent:	interrupt source phandle.
 - interrupts:	specifies the interrupt source of the parent interrupt
 		controller.  The format of the interrupt specifier depends
 		on the parent interrupt controller.
diff --git a/dts/Bindings/pci/brcm,iproc-pcie.txt b/dts/Bindings/pci/brcm,iproc-pcie.txt
index b8e48b4762..df065aa53a 100644
--- a/dts/Bindings/pci/brcm,iproc-pcie.txt
+++ b/dts/Bindings/pci/brcm,iproc-pcie.txt
@@ -65,7 +65,6 @@ When the iProc event queue based MSI is used, one needs to define the
 following properties in the MSI device node:
 - compatible: Must be "brcm,iproc-msi"
 - msi-controller: claims itself as an MSI controller
-- interrupt-parent: Link to its parent interrupt device
 - interrupts: List of interrupt IDs from its parent interrupt device
 
 Optional properties:
diff --git a/dts/Bindings/pci/cdns,cdns-pcie-ep.txt b/dts/Bindings/pci/cdns,cdns-pcie-ep.txt
index 9a305237fa..4a0475e2ba 100644
--- a/dts/Bindings/pci/cdns,cdns-pcie-ep.txt
+++ b/dts/Bindings/pci/cdns,cdns-pcie-ep.txt
@@ -9,6 +9,9 @@ Required properties:
 
 Optional properties:
 - max-functions: Maximum number of functions that can be configured (default 1).
+- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more
+  than one in the list.  If only one PHY listed it must manage all lanes. 
+- phy-names:  List of names to identify the PHY.
 
 Example:
 
@@ -19,4 +22,6 @@ pcie@fc000000 {
 	reg-names = "reg", "mem";
 	cdns,max-outbound-regions = <16>;
 	max-functions = /bits/ 8 <8>;
+	phys = <&ep_phy0 &ep_phy1>;
+	phy-names = "pcie-lane0","pcie-lane1";
 };
diff --git a/dts/Bindings/pci/cdns,cdns-pcie-host.txt b/dts/Bindings/pci/cdns,cdns-pcie-host.txt
index 20a33f38f6..91de69c713 100644
--- a/dts/Bindings/pci/cdns,cdns-pcie-host.txt
+++ b/dts/Bindings/pci/cdns,cdns-pcie-host.txt
@@ -24,6 +24,9 @@ Optional properties:
   translations (default 32)
 - vendor-id: The PCI vendor ID (16 bits, default is design dependent)
 - device-id: The PCI device ID (16 bits, default is design dependent)
+- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more
+  than one in the list.  If only one PHY listed it must manage all lanes. 
+- phy-names:  List of names to identify the PHY.
 
 Example:
 
@@ -57,4 +60,7 @@ pcie@fb000000 {
 	interrupt-map-mask = <0x0 0x0 0x0  0x7>;
 
 	msi-parent = <&its_pci>;
+
+	phys = <&pcie_phy0>;
+	phy-names = "pcie-phy";
 };
diff --git a/dts/Bindings/pci/faraday,ftpci100.txt b/dts/Bindings/pci/faraday,ftpci100.txt
index 89a84f8aa6..5f8cb4962f 100644
--- a/dts/Bindings/pci/faraday,ftpci100.txt
+++ b/dts/Bindings/pci/faraday,ftpci100.txt
@@ -41,7 +41,6 @@ Mandatory subnodes:
 - For "faraday,ftpci100" a node representing the interrupt-controller inside the
   host bridge is mandatory. It has the following mandatory properties:
   - interrupt: see interrupt-controller/interrupts.txt
-  - interrupt-parent: see interrupt-controller/interrupts.txt
   - interrupt-controller: see interrupt-controller/interrupts.txt
   - #address-cells: set to <0>
   - #interrupt-cells: set to <1>
diff --git a/dts/Bindings/pci/mobiveil-pcie.txt b/dts/Bindings/pci/mobiveil-pcie.txt
index 65038aa642..a618d4787d 100644
--- a/dts/Bindings/pci/mobiveil-pcie.txt
+++ b/dts/Bindings/pci/mobiveil-pcie.txt
@@ -26,9 +26,6 @@ Required properties:
 - interrupt-controller: identifies the node as an interrupt controller
 - #interrupt-cells: specifies the number of cells needed to encode an
 	interrupt source. The value must be 1.
-- interrupt-parent : phandle to the interrupt controller that
-		it is attached to, it should be set to gic to point to
-		ARM's Generic Interrupt Controller node in system DT.
 - interrupts: The interrupt line of the PCIe controller
 		last cell of this field is set to 4 to
 		denote it as IRQ_TYPE_LEVEL_HIGH type interrupt.
diff --git a/dts/Bindings/pci/pci-keystone.txt b/dts/Bindings/pci/pci-keystone.txt
index 3d4a209b0f..4dd17de549 100644
--- a/dts/Bindings/pci/pci-keystone.txt
+++ b/dts/Bindings/pci/pci-keystone.txt
@@ -17,7 +17,6 @@ reg:	index 1 is the base address and length of DW application registers.
 
 pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
 	interrupt-cells: should be set to 1
-	interrupt-parent: Parent interrupt controller phandle
 	interrupts: GIC interrupt lines connected to PCI MSI interrupt lines
 
  Example:
@@ -37,8 +36,6 @@ pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
 
 pcie_intc: Interrupt controller device node for Legacy IRQ chip
 	interrupt-cells: should be set to 1
-	interrupt-parent: Parent interrupt controller phandle
-	interrupts: GIC interrupt lines connected to PCI Legacy interrupt lines
 
  Example:
 	pcie_intc: legacy-interrupt-controller {
diff --git a/dts/Bindings/pci/ralink,rt3883-pci.txt b/dts/Bindings/pci/ralink,rt3883-pci.txt
index a04ab1b762..ffba4f63d7 100644
--- a/dts/Bindings/pci/ralink,rt3883-pci.txt
+++ b/dts/Bindings/pci/ralink,rt3883-pci.txt
@@ -41,9 +41,6 @@
    - #interrupt-cells: specifies the number of cells needed to encode an
      interrupt source. The value must be 1.
 
-   - interrupt-parent: the phandle for the interrupt controller that
-     services interrupts for this device.
-
    - interrupts: specifies the interrupt source of the parent interrupt
      controller. The format of the interrupt specifier depends on the
      parent interrupt controller.