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authorSascha Hauer <s.hauer@pengutronix.de>2016-11-15 09:02:43 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2017-01-10 08:48:45 +0100
commit68bc78479572ddfab9be02ecf0b886c1ce301cbd (patch)
tree7f9362e6ce232d9e6b5e0ba4239da63422ce6abb /dts/Bindings/pinctrl
parent254bd6ca534b576a8b46843507a1c7cd7220264a (diff)
downloadbarebox-68bc78479572ddfab9be02ecf0b886c1ce301cbd.tar.gz
dts: update to v4.9-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pinctrl')
-rw-r--r--dts/Bindings/pinctrl/st,stm32-pinctrl.txt10
1 files changed, 5 insertions, 5 deletions
diff --git a/dts/Bindings/pinctrl/st,stm32-pinctrl.txt b/dts/Bindings/pinctrl/st,stm32-pinctrl.txt
index f9753c4..b24583a 100644
--- a/dts/Bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/dts/Bindings/pinctrl/st,stm32-pinctrl.txt
@@ -14,11 +14,6 @@ Required properies:
- #size-cells : The value of this property must be 1
- ranges : defines mapping between pin controller node (parent) to
gpio-bank node (children).
- - interrupt-parent: phandle of the interrupt parent to which the external
- GPIO interrupts are forwarded to.
- - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
- which includes IRQ mux selection register, and the offset of the IRQ mux
- selection register.
- pins-are-numbered: Specify the subnodes are using numbered pinmux to
specify pins.
@@ -37,6 +32,11 @@ Required properties:
Optional properties:
- reset: : Reference to the reset controller
+ - interrupt-parent: phandle of the interrupt parent to which the external
+ GPIO interrupts are forwarded to.
+ - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
+ which includes IRQ mux selection register, and the offset of the IRQ mux
+ selection register.
Example:
#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>