diff options
author | Lucas Stach <l.stach@pengutronix.de> | 2017-07-31 20:03:05 +0200 |
---|---|---|
committer | Lucas Stach <l.stach@pengutronix.de> | 2017-07-31 20:03:05 +0200 |
commit | d14b844b08635c717fb52a294ed8d6872e260315 (patch) | |
tree | 18607dcdd29688b2fa9528f79423183a68e9898d /dts/Bindings/ptp | |
parent | 858b797e529e26c19bfa893fdb37ed67ff7a6006 (diff) | |
download | barebox-d14b844b08635c717fb52a294ed8d6872e260315.tar.gz barebox-d14b844b08635c717fb52a294ed8d6872e260315.tar.xz |
dts: update to v4.13-rc2
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'dts/Bindings/ptp')
-rw-r--r-- | dts/Bindings/ptp/brcm,ptp-dte.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/dts/Bindings/ptp/brcm,ptp-dte.txt b/dts/Bindings/ptp/brcm,ptp-dte.txt new file mode 100644 index 0000000000..7c04e22a5d --- /dev/null +++ b/dts/Bindings/ptp/brcm,ptp-dte.txt @@ -0,0 +1,20 @@ +* Broadcom Digital Timing Engine(DTE) based PTP clock + +Required properties: +- compatible: should contain the core compatibility string + and the SoC compatibility string. The SoC + compatibility string is to handle SoC specific + hardware differences. + Core compatibility string: + "brcm,ptp-dte" + SoC compatibility strings: + "brcm,iproc-ptp-dte" - for iproc based SoC's +- reg: address and length of the DTE block's NCO registers + +Example: + +ptp: ptp-dte@180af650 { + compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte"; + reg = <0x180af650 0x10>; + status = "okay"; +}; |