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authorSascha Hauer <s.hauer@pengutronix.de>2015-03-03 08:11:01 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-03-03 08:11:01 +0100
commiteaa819409db6ac80fbd7c3d36450b2d1bec93576 (patch)
tree6cd5e0c7f8abe121af237b701ee9e0e1b6f7e40d /dts/Bindings/pwm/nvidia,tegra20-pwm.txt
parent0c9aadb6185e1d84746b632284bc89e4e4c80cd3 (diff)
downloadbarebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.gz
barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.xz
dts: update to v4.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pwm/nvidia,tegra20-pwm.txt')
-rw-r--r--dts/Bindings/pwm/nvidia,tegra20-pwm.txt7
1 files changed, 4 insertions, 3 deletions
diff --git a/dts/Bindings/pwm/nvidia,tegra20-pwm.txt b/dts/Bindings/pwm/nvidia,tegra20-pwm.txt
index c7ea9d4a98..c52f03b503 100644
--- a/dts/Bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/dts/Bindings/pwm/nvidia,tegra20-pwm.txt
@@ -1,9 +1,10 @@
Tegra SoC PWFM controller
Required properties:
-- compatible: should be one of:
- - "nvidia,tegra20-pwm"
- - "nvidia,tegra30-pwm"
+- compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30,
+ must contain "nvidia,tegra30-pwm". Otherwise, must contain
+ "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,
+ tegra124, tegra132, or tegra210.
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
the cells format.