path: root/dts/Bindings/pwm/pwm-mediatek.txt
diff options
authorSascha Hauer <>2018-09-11 08:26:30 +0200
committerSascha Hauer <>2018-09-11 17:23:13 +0200
commit35f607bc7da71b302fd6bf3d6d48d7ea66df1195 (patch)
treedd2cf14c56430d21079c794fa6e03d7f5d91070e /dts/Bindings/pwm/pwm-mediatek.txt
parent625eea2765d94aee016cf25d9cabecde8eae0775 (diff)
dts: update to v4.19-rc1
Signed-off-by: Sascha Hauer <>
Diffstat (limited to 'dts/Bindings/pwm/pwm-mediatek.txt')
1 files changed, 3 insertions, 1 deletions
diff --git a/dts/Bindings/pwm/pwm-mediatek.txt b/dts/Bindings/pwm/pwm-mediatek.txt
index ef8bd3cb6..991728cb4 100644
--- a/dts/Bindings/pwm/pwm-mediatek.txt
+++ b/dts/Bindings/pwm/pwm-mediatek.txt
@@ -5,11 +5,13 @@ Required properties:
- "mediatek,mt2712-pwm": found on mt2712 SoC.
- "mediatek,mt7622-pwm": found on mt7622 SoC.
- "mediatek,mt7623-pwm": found on mt7623 SoC.
+ - "mediatek,mt7628-pwm": found on mt7628 SoC.
- reg: physical base address and length of the controller's registers.
- #pwm-cells: must be 2. See pwm.txt in this directory for a description of
the cell format.
- clocks: phandle and clock specifier of the PWM reference clock.
- - clock-names: must contain the following:
+ - clock-names: must contain the following, except for MT7628 which
+ has no clocks
- "top": the top clock generator
- "main": clock used by the PWM core
- "pwm1-8": the eight per PWM clocks for mt2712