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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:14:56 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:14:56 +0200 |
| commit | 6b85c20d46812bdbc062b863261c3e5100e30556 (patch) | |
| tree | e067c9889eaf55d5e793b05a14000276f2669e9f /dts/Bindings/pwm/renesas,pwm-rcar.txt | |
| parent | 9d8c00bdf7c1e8b614a797f0a15fa45bf6387224 (diff) | |
| download | barebox-6b85c20d46812bdbc062b863261c3e5100e30556.tar.gz barebox-6b85c20d46812bdbc062b863261c3e5100e30556.tar.xz | |
dts: update to v4.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pwm/renesas,pwm-rcar.txt')
| -rw-r--r-- | dts/Bindings/pwm/renesas,pwm-rcar.txt | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/dts/Bindings/pwm/renesas,pwm-rcar.txt b/dts/Bindings/pwm/renesas,pwm-rcar.txt index 74c1180159..35a3b9761e 100644 --- a/dts/Bindings/pwm/renesas,pwm-rcar.txt +++ b/dts/Bindings/pwm/renesas,pwm-rcar.txt @@ -2,6 +2,8 @@ Required Properties: - compatible: should be "renesas,pwm-rcar" and one of the following. + - "renesas,pwm-r8a7743": for RZ/G1M + - "renesas,pwm-r8a7745": for RZ/G1E - "renesas,pwm-r8a7778": for R-Car M1A - "renesas,pwm-r8a7779": for R-Car H1 - "renesas,pwm-r8a7790": for R-Car H2 @@ -9,6 +11,7 @@ Required Properties: - "renesas,pwm-r8a7794": for R-Car E2 - "renesas,pwm-r8a7795": for R-Car H3 - "renesas,pwm-r8a7796": for R-Car M3-W + - "renesas,pwm-r8a77965": for R-Car M3-N - "renesas,pwm-r8a77995": for R-Car D3 - reg: base address and length of the registers block for the PWM. - #pwm-cells: should be 2. See pwm.txt in this directory for a description of @@ -17,13 +20,15 @@ Required Properties: - pinctrl-0: phandle, referring to a default pin configuration node. - pinctrl-names: Set to "default". -Example: R8A7790 (R-Car H2) PWM Timer node +Example: R8A7743 (RZ/G1M) PWM Timer node pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; + compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; reg = <0 0xe6e30000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 523>; #pwm-cells = <2>; - clocks = <&mstp5_clks R8A7790_CLK_PWM>; pinctrl-0 = <&pwm0_pins>; pinctrl-names = "default"; }; |