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authorSascha Hauer <s.hauer@pengutronix.de>2019-12-19 05:46:54 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-12-19 05:46:54 +0100
commit574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d (patch)
tree3fbe9ed379bc0d6c536860845e85a4ede4b36bbc /dts/Bindings/reset/uniphier-reset.txt
parent179dedbc6d85d7ea7c8013513b364a75f32943e8 (diff)
downloadbarebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.gz
barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.xz
dts: update to v5.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/reset/uniphier-reset.txt')
-rw-r--r--dts/Bindings/reset/uniphier-reset.txt5
1 files changed, 3 insertions, 2 deletions
diff --git a/dts/Bindings/reset/uniphier-reset.txt b/dts/Bindings/reset/uniphier-reset.txt
index ea005177d2..e320a8cc9e 100644
--- a/dts/Bindings/reset/uniphier-reset.txt
+++ b/dts/Bindings/reset/uniphier-reset.txt
@@ -130,6 +130,7 @@ this layer. These clocks and resets should be described in each property.
Required properties:
- compatible: Should be
"socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
+ "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
"socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
"socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
"socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
@@ -141,12 +142,12 @@ Required properties:
- clocks: A list of phandles to the clock gate for the glue layer.
According to the clock-names, appropriate clocks are required.
- clock-names: Should contain
- "gio", "link" - for Pro4 SoC
+ "gio", "link" - for Pro4 and Pro5 SoCs
"link" - for others
- resets: A list of phandles to the reset control for the glue layer.
According to the reset-names, appropriate resets are required.
- reset-names: Should contain
- "gio", "link" - for Pro4 SoC
+ "gio", "link" - for Pro4 and Pro5 SoCs
"link" - for others
Example: