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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 12:38:26 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 13:42:10 +0100 |
commit | 119c632f12509eab4bc58daf629c4b16fffcedca (patch) | |
tree | 34366b3095d957178b46be47f628a3926ad35ac3 /dts/Bindings/reset | |
parent | 89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff) | |
download | barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz |
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/reset')
-rw-r--r-- | dts/Bindings/reset/fsl,imx7-src.yaml | 19 | ||||
-rw-r--r-- | dts/Bindings/reset/nuvoton,npcm-reset.txt | 2 | ||||
-rw-r--r-- | dts/Bindings/reset/renesas,rst.yaml | 1 | ||||
-rw-r--r-- | dts/Bindings/reset/xlnx,zynqmp-reset.txt | 11 |
4 files changed, 22 insertions, 11 deletions
diff --git a/dts/Bindings/reset/fsl,imx7-src.yaml b/dts/Bindings/reset/fsl,imx7-src.yaml index 569cd3bd3a..00430e2eab 100644 --- a/dts/Bindings/reset/fsl,imx7-src.yaml +++ b/dts/Bindings/reset/fsl,imx7-src.yaml @@ -22,12 +22,19 @@ description: | properties: compatible: - items: - - enum: - - fsl,imx7d-src - - fsl,imx8mq-src - - fsl,imx8mp-src - - const: syscon + oneOf: + - items: + - enum: + - fsl,imx7d-src + - fsl,imx8mq-src + - fsl,imx8mp-src + - const: syscon + - items: + - enum: + - fsl,imx8mm-src + - fsl,imx8mn-src + - const: fsl,imx8mq-src + - const: syscon reg: maxItems: 1 diff --git a/dts/Bindings/reset/nuvoton,npcm-reset.txt b/dts/Bindings/reset/nuvoton,npcm-reset.txt index 6e802703af..17b7a6a43a 100644 --- a/dts/Bindings/reset/nuvoton,npcm-reset.txt +++ b/dts/Bindings/reset/nuvoton,npcm-reset.txt @@ -9,7 +9,7 @@ Optional property: - nuvoton,sw-reset-number - Contains the software reset number to restart the SoC. NPCM7xx contain four software reset that represent numbers 1 to 4. - If 'nuvoton,sw-reset-number' is not specfied software reset is disabled. + If 'nuvoton,sw-reset-number' is not specified software reset is disabled. Example: rstc: rstc@f0801000 { diff --git a/dts/Bindings/reset/renesas,rst.yaml b/dts/Bindings/reset/renesas,rst.yaml index 2849ce4570..620cd0538b 100644 --- a/dts/Bindings/reset/renesas,rst.yaml +++ b/dts/Bindings/reset/renesas,rst.yaml @@ -47,6 +47,7 @@ properties: - renesas,r8a77980-rst # R-Car V3H - renesas,r8a77990-rst # R-Car E3 - renesas,r8a77995-rst # R-Car D3 + - renesas,r8a779a0-rst # R-Car V3U reg: maxItems: 1 diff --git a/dts/Bindings/reset/xlnx,zynqmp-reset.txt b/dts/Bindings/reset/xlnx,zynqmp-reset.txt index 27a45fe5ec..ed836868db 100644 --- a/dts/Bindings/reset/xlnx,zynqmp-reset.txt +++ b/dts/Bindings/reset/xlnx,zynqmp-reset.txt @@ -1,7 +1,7 @@ -------------------------------------------------------------------------- - = Zynq UltraScale+ MPSoC reset driver binding = + = Zynq UltraScale+ MPSoC and Versal reset driver binding = -------------------------------------------------------------------------- -The Zynq UltraScale+ MPSoC has several different resets. +The Zynq UltraScale+ MPSoC and Versal has several different resets. See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information about zynqmp resets. @@ -10,7 +10,8 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required Properties: -- compatible: "xlnx,zynqmp-reset" +- compatible: "xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform + "xlnx,versal-reset" for Versal platform - #reset-cells: Specifies the number of cells needed to encode reset line, should be 1 @@ -37,8 +38,10 @@ Device nodes that need access to reset lines should specify them as a reset phandle in their corresponding node as specified in reset.txt. -For list of all valid reset indicies see +For list of all valid reset indices for Zynq UltraScale+ MPSoC see <dt-bindings/reset/xlnx-zynqmp-resets.h> +For list of all valid reset indices for Versal see +<dt-bindings/reset/xlnx-versal-resets.h> Example: |