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authorSascha Hauer <s.hauer@pengutronix.de>2015-05-06 08:56:43 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2015-05-06 08:56:43 +0200
commit461f8cfc7ea788428240271818363333ceff5c4c (patch)
treea3d6e3737c203ea29f8db2a6ddaadc326247376c /dts/Bindings/rtc
parent6345d37ae50c3ac8dd0e6176bc846fe211cbddd4 (diff)
downloadbarebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.gz
barebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.xz
dts: update to v4.1-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/rtc')
-rw-r--r--dts/Bindings/rtc/digicolor-rtc.txt17
-rw-r--r--dts/Bindings/rtc/stmp3xxx-rtc.txt5
2 files changed, 22 insertions, 0 deletions
diff --git a/dts/Bindings/rtc/digicolor-rtc.txt b/dts/Bindings/rtc/digicolor-rtc.txt
new file mode 100644
index 000000000..d46498601
--- /dev/null
+++ b/dts/Bindings/rtc/digicolor-rtc.txt
@@ -0,0 +1,17 @@
+Conexant Digicolor Real Time Clock controller
+
+This binding currently supports the CX92755 SoC.
+
+Required properties:
+- compatible: should be "cnxt,cx92755-rtc"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- interrupts: rtc alarm interrupt
+
+Example:
+
+ rtc@f0000c30 {
+ compatible = "cnxt,cx92755-rtc";
+ reg = <0xf0000c30 0x18>;
+ interrupts = <25>;
+ };
diff --git a/dts/Bindings/rtc/stmp3xxx-rtc.txt b/dts/Bindings/rtc/stmp3xxx-rtc.txt
index b800070fe..fa6a94226 100644
--- a/dts/Bindings/rtc/stmp3xxx-rtc.txt
+++ b/dts/Bindings/rtc/stmp3xxx-rtc.txt
@@ -7,6 +7,11 @@ Required properties:
region.
- interrupts: rtc alarm interrupt
+Optional properties:
+- stmp,crystal-freq: override crystal frequency as determined from fuse bits.
+ Only <32000> and <32768> are possible for the hardware. Use <0> for
+ "no crystal".
+
Example:
rtc@80056000 {