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authorSascha Hauer <s.hauer@pengutronix.de>2015-07-08 14:44:21 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2015-07-08 14:44:21 +0200
commit87360e3dd42bb627a9f2611f961728c0789e1c21 (patch)
treeafefc88c862d9feafb0cdb075badeb8d32d8efd2 /dts/Bindings/rtc
parent80936d6aaeea1b10ce4eb81c54eece2f55f8e209 (diff)
downloadbarebox-87360e3dd42bb627a9f2611f961728c0789e1c21.tar.gz
barebox-87360e3dd42bb627a9f2611f961728c0789e1c21.tar.xz
dts: update to v4.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/rtc')
-rw-r--r--dts/Bindings/rtc/haoyu,hym8563.txt2
-rw-r--r--dts/Bindings/rtc/rtc-st-lpc.txt25
-rw-r--r--dts/Bindings/rtc/s3c-rtc.txt3
3 files changed, 28 insertions, 2 deletions
diff --git a/dts/Bindings/rtc/haoyu,hym8563.txt b/dts/Bindings/rtc/haoyu,hym8563.txt
index 5c199ee044..a8934fe2ab 100644
--- a/dts/Bindings/rtc/haoyu,hym8563.txt
+++ b/dts/Bindings/rtc/haoyu,hym8563.txt
@@ -6,11 +6,11 @@ as well as a clock output of up to 32kHz.
Required properties:
- compatible: should be: "haoyu,hym8563"
- reg: i2c address
-- interrupts: rtc alarm/event interrupt
- #clock-cells: the value should be 0
Optional properties:
- clock-output-names: From common clock binding
+- interrupts: rtc alarm/event interrupt
Example:
diff --git a/dts/Bindings/rtc/rtc-st-lpc.txt b/dts/Bindings/rtc/rtc-st-lpc.txt
new file mode 100644
index 0000000000..73407f502e
--- /dev/null
+++ b/dts/Bindings/rtc/rtc-st-lpc.txt
@@ -0,0 +1,25 @@
+STMicroelectronics Low Power Controller (LPC) - RTC
+===================================================
+
+LPC currently supports Watchdog OR Real Time Clock functionality.
+
+[See: ../watchdog/st_lpc_wdt.txt for Watchdog options]
+
+Required properties
+
+- compatible : Must be one of: "st,stih407-lpc" "st,stih416-lpc"
+ "st,stih415-lpc" "st,stid127-lpc"
+- reg : LPC registers base address + size
+- interrupts : LPC interrupt line number and associated flags
+- clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
+- st,lpc-mode : The LPC can run either one of two modes ST_LPC_MODE_RTC [0] or
+ ST_LPC_MODE_WDT [1]. One (and only one) mode must be
+ selected.
+
+Example:
+ lpc@fde05000 {
+ compatible = "st,stih407-lpc";
+ reg = <0xfde05000 0x1000>;
+ clocks = <&clk_s_d3_flexgen CLK_LPC_0>;
+ st,lpc-mode = <ST_LPC_MODE_RTC>;
+ };
diff --git a/dts/Bindings/rtc/s3c-rtc.txt b/dts/Bindings/rtc/s3c-rtc.txt
index ab757b84da..ac2fcd6ff4 100644
--- a/dts/Bindings/rtc/s3c-rtc.txt
+++ b/dts/Bindings/rtc/s3c-rtc.txt
@@ -6,7 +6,8 @@ Required properties:
* "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
* "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
* "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
- * "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc.
+ * "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with
+ exynos3250 rtc (use "samsung,s3c6410-rtc").
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: Two interrupt numbers to the cpu should be specified. First