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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-05 00:06:30 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-11 09:11:11 +0200 |
commit | 796af3473b8222bcd89aa63e9886c355a6baf95d (patch) | |
tree | ad357b2756bda409b46747faaaf57a0ffd003c9c /dts/Bindings/serial/sprd-uart.txt | |
parent | 649b9ebcf53d697277bcdb01334dbcd563a33aa8 (diff) | |
download | barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.gz barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.xz |
dts: update to v5.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/serial/sprd-uart.txt')
-rw-r--r-- | dts/Bindings/serial/sprd-uart.txt | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/dts/Bindings/serial/sprd-uart.txt b/dts/Bindings/serial/sprd-uart.txt index cab40f0f6f..9607dc6162 100644 --- a/dts/Bindings/serial/sprd-uart.txt +++ b/dts/Bindings/serial/sprd-uart.txt @@ -7,7 +7,17 @@ Required properties: - reg: offset and length of the register set for the device - interrupts: exactly one interrupt specifier -- clocks: phandles to input clocks. +- clock-names: Should contain following entries: + "enable" for UART module enable clock, + "uart" for UART clock, + "source" for UART source (parent) clock. +- clocks: Should contain a clock specifier for each entry in clock-names. + UART clock and source clock are optional properties, but enable clock + is required. + +Optional properties: +- dma-names: Should contain "rx" for receive and "tx" for transmit channels. +- dmas: A list of dma specifiers, one for each entry in dma-names. Example: uart0: serial@0 { @@ -15,5 +25,8 @@ Example: "sprd,sc9836-uart"; reg = <0x0 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ext_26m>; + dma-names = "rx", "tx"; + dmas = <&ap_dma 19>, <&ap_dma 20>; + clock-names = "enable", "uart", "source"; + clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>; }; |