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authorSascha Hauer <s.hauer@pengutronix.de>2015-05-06 08:56:43 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2015-05-06 08:56:43 +0200
commit461f8cfc7ea788428240271818363333ceff5c4c (patch)
treea3d6e3737c203ea29f8db2a6ddaadc326247376c /dts/Bindings/serial
parent6345d37ae50c3ac8dd0e6176bc846fe211cbddd4 (diff)
downloadbarebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.gz
barebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.xz
dts: update to v4.1-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/serial')
-rw-r--r--dts/Bindings/serial/atmel-usart.txt3
-rw-r--r--dts/Bindings/serial/brcm,bcm6345-uart.txt (renamed from dts/Bindings/serial/bcm63xx-uart.txt)0
-rw-r--r--dts/Bindings/serial/omap_serial.txt20
3 files changed, 22 insertions, 1 deletions
diff --git a/dts/Bindings/serial/atmel-usart.txt b/dts/Bindings/serial/atmel-usart.txt
index a6391e70a8..90787aa2e6 100644
--- a/dts/Bindings/serial/atmel-usart.txt
+++ b/dts/Bindings/serial/atmel-usart.txt
@@ -1,9 +1,10 @@
* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
Required properties:
-- compatible: Should be "atmel,<chip>-usart"
+- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
The compatible <chip> indicated will be the first SoC to support an
additional mode or an USART new feature.
+ For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.
diff --git a/dts/Bindings/serial/bcm63xx-uart.txt b/dts/Bindings/serial/brcm,bcm6345-uart.txt
index 5c52e5eef1..5c52e5eef1 100644
--- a/dts/Bindings/serial/bcm63xx-uart.txt
+++ b/dts/Bindings/serial/brcm,bcm6345-uart.txt
diff --git a/dts/Bindings/serial/omap_serial.txt b/dts/Bindings/serial/omap_serial.txt
index 342eedd100..54c2a155c7 100644
--- a/dts/Bindings/serial/omap_serial.txt
+++ b/dts/Bindings/serial/omap_serial.txt
@@ -4,7 +4,27 @@ Required properties:
- compatible : should be "ti,omap2-uart" for OMAP2 controllers
- compatible : should be "ti,omap3-uart" for OMAP3 controllers
- compatible : should be "ti,omap4-uart" for OMAP4 controllers
+- reg : address and length of the register space
+- interrupts or interrupts-extended : Should contain the uart interrupt
+ specifier or both the interrupt
+ controller phandle and interrupt
+ specifier.
- ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
Optional properties:
- clock-frequency : frequency of the clock input to the UART
+- dmas : DMA specifier, consisting of a phandle to the DMA controller
+ node and a DMA channel number.
+- dma-names : "rx" for receive channel, "tx" for transmit channel.
+
+Example:
+
+ uart4: serial@49042000 {
+ compatible = "ti,omap3-uart";
+ reg = <0x49042000 0x400>;
+ interrupts = <80>;
+ dmas = <&sdma 81 &sdma 82>;
+ dma-names = "tx", "rx";
+ ti,hwmods = "uart4";
+ clock-frequency = <48000000>;
+ };