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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:15:03 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:15:03 +0200 |
| commit | e2d1aab783e4d3a03525144446ccdc43d066b041 (patch) | |
| tree | a3f1cd35a18d8edc30d504093cac4bc55c391bca /dts/Bindings/serial | |
| parent | 5f713938cb13447de8fdc27d93b2197d2e870cf4 (diff) | |
| download | barebox-e2d1aab783e4d3a03525144446ccdc43d066b041.tar.gz barebox-e2d1aab783e4d3a03525144446ccdc43d066b041.tar.xz | |
dts: update to v4.17-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/serial')
| -rw-r--r-- | dts/Bindings/serial/amlogic,meson-uart.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/serial/mvebu-uart.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/serial/renesas,sci-serial.txt | 2 |
3 files changed, 4 insertions, 2 deletions
diff --git a/dts/Bindings/serial/amlogic,meson-uart.txt b/dts/Bindings/serial/amlogic,meson-uart.txt index 8ff65fa632..c06c045126 100644 --- a/dts/Bindings/serial/amlogic,meson-uart.txt +++ b/dts/Bindings/serial/amlogic,meson-uart.txt @@ -21,7 +21,7 @@ Required properties: - interrupts : identifier to the device interrupt - clocks : a list of phandle + clock-specifier pairs, one for each entry in clock names. -- clocks-names : +- clock-names : * "xtal" for external xtal clock identifier * "pclk" for the bus core clock, either the clk81 clock or the gate clock * "baud" for the source of the baudrate generator, can be either the xtal diff --git a/dts/Bindings/serial/mvebu-uart.txt b/dts/Bindings/serial/mvebu-uart.txt index 2ae2fee7e0..b7e0e32b9a 100644 --- a/dts/Bindings/serial/mvebu-uart.txt +++ b/dts/Bindings/serial/mvebu-uart.txt @@ -24,7 +24,7 @@ Required properties: - Must contain two elements for the extended variant of the IP (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx", respectively the UART TX interrupt and the UART RX interrupt. A - corresponding interrupts-names property must be defined. + corresponding interrupt-names property must be defined. - For backward compatibility reasons, a single element interrupts property is also supported for the standard variant of the IP, containing only the UART sum interrupt. This form is deprecated diff --git a/dts/Bindings/serial/renesas,sci-serial.txt b/dts/Bindings/serial/renesas,sci-serial.txt index ad962f4ec3..a006ea4d06 100644 --- a/dts/Bindings/serial/renesas,sci-serial.txt +++ b/dts/Bindings/serial/renesas,sci-serial.txt @@ -17,6 +17,8 @@ Required properties: - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART. - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART. - "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART. + - "renesas,scif-r8a77470" for R8A77470 (RZ/G1C) SCIF compatible UART. + - "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART. - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART. - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. |