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authorDaniel Schultz <d.schultz@phytec.de>2017-12-22 09:03:54 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-01-05 15:51:03 +0100
commit55f5907c3ca00bfa36015e162926b62ff8ce0243 (patch)
tree9ec258c946ffc43bb67381c3a5473b44c2ee1212 /dts/Bindings/sound/max9867.txt
parent4797aa72b8e4f7696627f2459a0732d1ca51b37d (diff)
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ARM: boards: phytec-som-am335x: Revert unified MLO for 1GB
There is a problem in the data path between 1GB RAM devices and the core, which leads to wrong read operations after DDR initialization in soft resets. This needs more investigation, but until we didn't found the problem, we will return to the origin MLO for 1GB RAM devices with static RAM timings and without memory access. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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