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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-05 00:06:30 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-11 09:11:11 +0200 |
commit | 796af3473b8222bcd89aa63e9886c355a6baf95d (patch) | |
tree | ad357b2756bda409b46747faaaf57a0ffd003c9c /dts/Bindings/sound/mchp-i2s-mcc.txt | |
parent | 649b9ebcf53d697277bcdb01334dbcd563a33aa8 (diff) | |
download | barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.gz barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.xz |
dts: update to v5.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/sound/mchp-i2s-mcc.txt')
-rw-r--r-- | dts/Bindings/sound/mchp-i2s-mcc.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/dts/Bindings/sound/mchp-i2s-mcc.txt b/dts/Bindings/sound/mchp-i2s-mcc.txt new file mode 100644 index 0000000000..91ec83a6fa --- /dev/null +++ b/dts/Bindings/sound/mchp-i2s-mcc.txt @@ -0,0 +1,43 @@ +* Microchip I2S Multi-Channel Controller + +Required properties: +- compatible: Should be "microchip,sam9x60-i2smcc". +- reg: Should be the physical base address of the controller and the + length of memory mapped region. +- interrupts: Should contain the interrupt for the controller. +- dmas: Should be one per channel name listed in the dma-names property, + as described in atmel-dma.txt and dma.txt files. +- dma-names: Identifier string for each DMA request line in the dmas property. + Two dmas have to be defined, "tx" and "rx". +- clocks: Must contain an entry for each entry in clock-names. + Please refer to clock-bindings.txt. +- clock-names: Should be one of each entry matching the clocks phandles list: + - "pclk" (peripheral clock) Required. + - "gclk" (generated clock) Optional (1). + +Optional properties: +- pinctrl-0: Should specify pin control groups used for this controller. +- princtrl-names: Should contain only one value - "default". + + +(1) : Only the peripheral clock is required. The generated clock is optional + and should be set mostly when Master Mode is required. + +Example: + + i2s@f001c000 { + compatible = "microchip,sam9x60-i2smcc"; + reg = <0xf001c000 0x100>; + interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(36))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(37))>; + dma-names = "tx", "rx"; + clocks = <&i2s_clk>, <&i2s_gclk>; + clock-names = "pclk", "gclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_default>; + }; |