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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-06 08:07:28 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-06 08:07:28 +0200 |
commit | bb2de9a333d17bb1b048ad208002501226b83f03 (patch) | |
tree | 8ef2e876ba43af235c45cb2280885e9c67ba5548 /dts/Bindings/spi/fsl-imx-cspi.txt | |
parent | 79e6629b02fb3a296b5dc70f16dec0f8d415ccf8 (diff) | |
download | barebox-bb2de9a333d17bb1b048ad208002501226b83f03.tar.gz barebox-bb2de9a333d17bb1b048ad208002501226b83f03.tar.xz |
dts: update to v4.12-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/spi/fsl-imx-cspi.txt')
-rw-r--r-- | dts/Bindings/spi/fsl-imx-cspi.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/dts/Bindings/spi/fsl-imx-cspi.txt b/dts/Bindings/spi/fsl-imx-cspi.txt index 8bc95e2fc4..31b5b21598 100644 --- a/dts/Bindings/spi/fsl-imx-cspi.txt +++ b/dts/Bindings/spi/fsl-imx-cspi.txt @@ -23,6 +23,12 @@ See the clock consumer binding, Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect +Optional properties: +- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register +controlling the SPI_READY handling. Note that to enable the DRCTL consideration, +the SPI_READY mode-flag needs to be set too. +Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst). + Example: ecspi@70010000 { @@ -35,4 +41,5 @@ ecspi@70010000 { <&gpio3 25 0>; /* GPIO3_25 */ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; dma-names = "rx", "tx"; + fsl,spi-rdy-drctl = <1>; }; |