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authorSascha Hauer <s.hauer@pengutronix.de>2021-01-05 12:56:25 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2021-01-07 11:41:05 +0100
commit6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef (patch)
tree5d16ca525c12dddb21d9c4750dfd1a1e354eb731 /dts/Bindings/spi
parent93c4690b4921d3149db3fcf5b62a8aa5010a4ae7 (diff)
downloadbarebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.gz
barebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.xz
dts: update to v5.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/spi')
-rw-r--r--dts/Bindings/spi/snps,dw-apb-ssi.yaml2
-rw-r--r--dts/Bindings/spi/spi-controller.yaml27
-rw-r--r--dts/Bindings/spi/spi-sifive.yaml10
3 files changed, 35 insertions, 4 deletions
diff --git a/dts/Bindings/spi/snps,dw-apb-ssi.yaml b/dts/Bindings/spi/snps,dw-apb-ssi.yaml
index 99ed9b416e..4825157cd9 100644
--- a/dts/Bindings/spi/snps,dw-apb-ssi.yaml
+++ b/dts/Bindings/spi/snps,dw-apb-ssi.yaml
@@ -65,6 +65,8 @@ properties:
const: baikal,bt1-ssi
- description: Baikal-T1 System Boot SPI Controller
const: baikal,bt1-sys-ssi
+ - description: Canaan Kendryte K210 SoS SPI Controller
+ const: canaan,k210-spi
reg:
minItems: 1
diff --git a/dts/Bindings/spi/spi-controller.yaml b/dts/Bindings/spi/spi-controller.yaml
index 1b56d5e40f..5f50581010 100644
--- a/dts/Bindings/spi/spi-controller.yaml
+++ b/dts/Bindings/spi/spi-controller.yaml
@@ -42,6 +42,33 @@ properties:
cs2 : &gpio1 1 0
cs3 : &gpio1 2 0
+ The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0)
+ or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0.
+
+ There is a special rule set for combining the second flag of an
+ cs-gpio with the optional spi-cs-high flag for SPI slaves.
+
+ Each table entry defines how the CS pin is to be physically
+ driven (not considering potential gpio inversions by pinmux):
+
+ device node | cs-gpio | CS pin state active | Note
+ ================+===============+=====================+=====
+ spi-cs-high | - | H |
+ - | - | L |
+ spi-cs-high | ACTIVE_HIGH | H |
+ - | ACTIVE_HIGH | L | 1
+ spi-cs-high | ACTIVE_LOW | H | 2
+ - | ACTIVE_LOW | L |
+
+ Notes:
+ 1) Should print a warning about polarity inversion.
+ Here it would be wise to avoid and define the gpio as
+ ACTIVE_LOW.
+ 2) Should print a warning about polarity inversion
+ because ACTIVE_LOW is overridden by spi-cs-high.
+ Should be generally avoided and be replaced by
+ spi-cs-high + ACTIVE_HIGH.
+
num-cs:
$ref: /schemas/types.yaml#/definitions/uint32
description:
diff --git a/dts/Bindings/spi/spi-sifive.yaml b/dts/Bindings/spi/spi-sifive.yaml
index 56dcf1d35d..6e7e394fc1 100644
--- a/dts/Bindings/spi/spi-sifive.yaml
+++ b/dts/Bindings/spi/spi-sifive.yaml
@@ -17,15 +17,17 @@ allOf:
properties:
compatible:
items:
- - const: sifive,fu540-c000-spi
+ - enum:
+ - sifive,fu540-c000-spi
+ - sifive,fu740-c000-spi
- const: sifive,spi0
description:
Should be "sifive,<chip>-spi" and "sifive,spi<version>".
Supported compatible strings are -
- "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
- onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
- SPI v0 IP block with no chip integration tweaks.
+ "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
+ as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
+ for the SiFive SPI v0 IP block with no chip integration tweaks.
Please refer to sifive-blocks-ip-versioning.txt for details
SPI RTL that corresponds to the IP block version numbers can be found here -