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authorSascha Hauer <s.hauer@pengutronix.de>2017-06-06 08:07:28 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2017-06-06 08:07:28 +0200
commitbb2de9a333d17bb1b048ad208002501226b83f03 (patch)
tree8ef2e876ba43af235c45cb2280885e9c67ba5548 /dts/Bindings/spi
parent79e6629b02fb3a296b5dc70f16dec0f8d415ccf8 (diff)
downloadbarebox-bb2de9a333d17bb1b048ad208002501226b83f03.tar.gz
barebox-bb2de9a333d17bb1b048ad208002501226b83f03.tar.xz
dts: update to v4.12-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/spi')
-rw-r--r--dts/Bindings/spi/fsl-imx-cspi.txt7
-rw-r--r--dts/Bindings/spi/spi-bcm63xx-hsspi.txt33
-rw-r--r--dts/Bindings/spi/spi-bcm63xx.txt33
-rw-r--r--dts/Bindings/spi/spi_pl022.txt8
4 files changed, 77 insertions, 4 deletions
diff --git a/dts/Bindings/spi/fsl-imx-cspi.txt b/dts/Bindings/spi/fsl-imx-cspi.txt
index 8bc95e2fc4..31b5b21598 100644
--- a/dts/Bindings/spi/fsl-imx-cspi.txt
+++ b/dts/Bindings/spi/fsl-imx-cspi.txt
@@ -23,6 +23,12 @@ See the clock consumer binding,
Obsolete properties:
- fsl,spi-num-chipselects : Contains the number of the chipselect
+Optional properties:
+- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
+controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
+the SPI_READY mode-flag needs to be set too.
+Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
+
Example:
ecspi@70010000 {
@@ -35,4 +41,5 @@ ecspi@70010000 {
<&gpio3 25 0>; /* GPIO3_25 */
dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
dma-names = "rx", "tx";
+ fsl,spi-rdy-drctl = <1>;
};
diff --git a/dts/Bindings/spi/spi-bcm63xx-hsspi.txt b/dts/Bindings/spi/spi-bcm63xx-hsspi.txt
new file mode 100644
index 0000000000..37b29ee138
--- /dev/null
+++ b/dts/Bindings/spi/spi-bcm63xx-hsspi.txt
@@ -0,0 +1,33 @@
+Binding for Broadcom BCM6328 High Speed SPI controller
+
+Required properties:
+- compatible: must contain of "brcm,bcm6328-hsspi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandles of the SPI clock and the PLL clock.
+- clock-names: must be "hsspi", "pll".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10001000 {
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+
+ interrupts = <29>;
+
+ clocks = <&clkctl 9>, <&hsspi_pll>;
+ clock-names = "hsspi", "pll";
+
+ num-cs = <2>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/dts/Bindings/spi/spi-bcm63xx.txt b/dts/Bindings/spi/spi-bcm63xx.txt
new file mode 100644
index 0000000000..1c16f66926
--- /dev/null
+++ b/dts/Bindings/spi/spi-bcm63xx.txt
@@ -0,0 +1,33 @@
+Binding for Broadcom BCM6348/BCM6358 SPI controller
+
+Required properties:
+- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandle of the SPI clock.
+- clock-names: has to be "spi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10000800 {
+ compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+
+ interrupts = <1>;
+
+ clocks = <&clkctl 9>;
+ clock-names = "spi";
+
+ num-cs = <5>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/dts/Bindings/spi/spi_pl022.txt b/dts/Bindings/spi/spi_pl022.txt
index 4d1673ca8c..7638b4968d 100644
--- a/dts/Bindings/spi/spi_pl022.txt
+++ b/dts/Bindings/spi/spi_pl022.txt
@@ -30,7 +30,10 @@ contain the following properties.
0: SPI
1: Texas Instruments Synchronous Serial Frame Format
2: Microwire (Half Duplex)
-- pl022,com-mode : polling, interrupt or dma
+- pl022,com-mode : specifies the transfer mode:
+ 0: interrupt mode
+ 1: polling mode (default mode if property not present)
+ 2: DMA mode
- pl022,rx-level-trig : Rx FIFO watermark level
- pl022,tx-level-trig : Tx FIFO watermark level
- pl022,ctrl-len : Microwire interface: Control length
@@ -56,9 +59,7 @@ Example:
spi-max-frequency = <12000000>;
spi-cpol;
spi-cpha;
- pl022,hierarchy = <0>;
pl022,interface = <0>;
- pl022,slave-tx-disable;
pl022,com-mode = <0x2>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
@@ -67,4 +68,3 @@ Example:
pl022,duplex = <0>;
};
};
-