dts: update to v3.18-rc1

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

2 files changed, 13 insertions, 22 deletions

diff --git a/dts/Bindings/staging/imx-drm/ldb.txt b/dts/Bindings/staging/imx-drm/ldb.txt
index 578a1fca36..443bcb6134 100644
--- a/dts/Bindings/staging/imx-drm/ldb.txt
+++ b/dts/Bindings/staging/imx-drm/ldb.txt
@@ -56,6 +56,9 @@ Required properties:
  - fsl,data-width : should be <18> or <24>
  - port: A port node with endpoint definitions as defined in
    Documentation/devicetree/bindings/media/video-interfaces.txt.
+   On i.MX5, the internal two-input-multiplexer is used.
+   Due to hardware limitations, only one port (port@[0,1])
+   can be used for each channel (lvds-channel@[0,1], respectively)
    On i.MX6, there should be four ports (port@[0-3]) that correspond
    to the four LVDS multiplexer inputs.
 
@@ -78,6 +81,8 @@ ldb: ldb@53fa8008 {
 		      "di0", "di1";
 
 	lvds-channel@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		reg = <0>;
 		fsl,data-mapping = "spwg";
 		fsl,data-width = <24>;
@@ -86,7 +91,9 @@ ldb: ldb@53fa8008 {
 			/* ... */
 		};
 
-		port {
+		port@0 {
+			reg = <0>;
+
 			lvds0_in: endpoint {
 				remote-endpoint = <&ipu_di0_lvds0>;
 			};
@@ -94,6 +101,8 @@ ldb: ldb@53fa8008 {
 	};
 
 	lvds-channel@1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		reg = <1>;
 		fsl,data-mapping = "spwg";
 		fsl,data-width = <24>;
@@ -102,7 +111,9 @@ ldb: ldb@53fa8008 {
 			/* ... */
 		};
 
-		port {
+		port@1 {
+			reg = <1>;
+
 			lvds1_in: endpoint {
 				remote-endpoint = <&ipu_di1_lvds1>;
 			};
diff --git a/dts/Bindings/staging/xillybus.txt b/dts/Bindings/staging/xillybus.txt
deleted file mode 100644
index 9e316dc2e4..0000000000
--- a/dts/Bindings/staging/xillybus.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-* Xillybus driver for generic FPGA interface
-
-Required properties:
-- compatible: Should be "xillybus,xillybus-1.00.a"
-- reg: Address and length of the register set for the device
-- interrupts: Contains one interrupt node, typically consisting of three cells.
-- interrupt-parent: the phandle for the interrupt controller that
-                    services interrupts for this device.
-
-Optional properties:
-- dma-coherent: Present if DMA operations are coherent
-
-Example:
-
-	xillybus@ff200400 {
-		compatible = "xillybus,xillybus-1.00.a";
-		reg = < 0xff200400 0x00000080 >;
-		interrupts = < 0 40 1 >;
-		interrupt-parent = <&intc>;
-	} ;