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authorSascha Hauer <s.hauer@pengutronix.de>2015-03-03 08:11:01 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-03-03 08:11:01 +0100
commiteaa819409db6ac80fbd7c3d36450b2d1bec93576 (patch)
tree6cd5e0c7f8abe121af237b701ee9e0e1b6f7e40d /dts/Bindings/thermal
parent0c9aadb6185e1d84746b632284bc89e4e4c80cd3 (diff)
downloadbarebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.gz
barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.xz
dts: update to v4.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/thermal')
-rw-r--r--dts/Bindings/thermal/exynos-thermal.txt21
-rw-r--r--dts/Bindings/thermal/tegra-soctherm.txt4
-rw-r--r--dts/Bindings/thermal/thermal.txt74
3 files changed, 61 insertions, 38 deletions
diff --git a/dts/Bindings/thermal/exynos-thermal.txt b/dts/Bindings/thermal/exynos-thermal.txt
index ae738f562a..695150a413 100644
--- a/dts/Bindings/thermal/exynos-thermal.txt
+++ b/dts/Bindings/thermal/exynos-thermal.txt
@@ -12,6 +12,7 @@
"samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4
Exynos5420 (Must pass triminfo base and triminfo clock)
"samsung,exynos5440-tmu"
+ "samsung,exynos7-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
@@ -32,13 +33,28 @@
- clocks : The main clocks for TMU device
-- 1. operational clock for TMU channel
-- 2. optional clock to access the shared registers of TMU channel
+ -- 3. optional special clock for functional operation
- clock-names : Thermal system clock name
-- "tmu_apbif" operational clock for current TMU channel
-- "tmu_triminfo_apbif" clock to access the shared triminfo register
for current TMU channel
+ -- "tmu_sclk" clock for functional operation of the current TMU
+ channel
- vtmu-supply: This entry is optional and provides the regulator node supplying
voltage to TMU. If needed this entry can be placed inside
board/platform specific dts file.
+Following properties are mandatory (depending on SoC):
+- samsung,tmu_gain: Gain value for internal TMU operation.
+- samsung,tmu_reference_voltage: Value of TMU IP block's reference voltage
+- samsung,tmu_noise_cancel_mode: Mode for noise cancellation
+- samsung,tmu_efuse_value: Default level of temperature - it is needed when
+ in factory fusing produced wrong value
+- samsung,tmu_min_efuse_value: Minimum temperature fused value
+- samsung,tmu_max_efuse_value: Maximum temperature fused value
+- samsung,tmu_first_point_trim: First point trimming value
+- samsung,tmu_second_point_trim: Second point trimming value
+- samsung,tmu_default_temp_offset: Default temperature offset
+- samsung,tmu_cal_type: Callibration type
Example 1):
@@ -51,6 +67,7 @@ Example 1):
clock-names = "tmu_apbif";
status = "disabled";
vtmu-supply = <&tmu_regulator_node>;
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
Example 2):
@@ -61,6 +78,7 @@ Example 2):
interrupts = <0 58 0>;
clocks = <&clock 21>;
clock-names = "tmu_apbif";
+ #include "exynos5440-tmu-sensor-conf.dtsi"
};
Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
@@ -70,6 +88,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
interrupts = <0 184 0>;
clocks = <&clock 318>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_cpu3: tmu@1006c000 {
@@ -78,6 +97,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
interrupts = <0 185 0>;
clocks = <&clock 318>, <&clock 319>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_gpu: tmu@100a0000 {
@@ -86,6 +106,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
interrupts = <0 215 0>;
clocks = <&clock 319>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
Note: For multi-instance tmu each instance should have an alias correctly
diff --git a/dts/Bindings/thermal/tegra-soctherm.txt b/dts/Bindings/thermal/tegra-soctherm.txt
index ecf3ed76cd..6b68cd1504 100644
--- a/dts/Bindings/thermal/tegra-soctherm.txt
+++ b/dts/Bindings/thermal/tegra-soctherm.txt
@@ -7,7 +7,9 @@ notifications. It is also used to manage emergency shutdown in an
overheating situation.
Required properties :
-- compatible : "nvidia,tegra124-soctherm".
+- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
+ For Tegra132, must contain "nvidia,tegra132-soctherm".
+ For Tegra210, must contain "nvidia,tegra210-soctherm".
- reg : Should contain 1 entry:
- SOCTHERM register set
- interrupts : Defines the interrupt used by SOCTHERM
diff --git a/dts/Bindings/thermal/thermal.txt b/dts/Bindings/thermal/thermal.txt
index f5db6b72a3..29fe0bfae3 100644
--- a/dts/Bindings/thermal/thermal.txt
+++ b/dts/Bindings/thermal/thermal.txt
@@ -251,24 +251,24 @@ ocp {
};
thermal-zones {
- cpu-thermal: cpu-thermal {
+ cpu_thermal: cpu-thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&bandgap0>;
trips {
- cpu-alert0: cpu-alert {
+ cpu_alert0: cpu-alert0 {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "active";
};
- cpu-alert1: cpu-alert {
+ cpu_alert1: cpu-alert1 {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- cpu-crit: cpu-crit {
+ cpu_crit: cpu-crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
@@ -277,17 +277,17 @@ thermal-zones {
cooling-maps {
map0 {
- trip = <&cpu-alert0>;
- cooling-device = <&fan0 THERMAL_NO_LIMITS 4>;
+ trip = <&cpu_alert0>;
+ cooling-device = <&fan0 THERMAL_NO_LIMIT 4>;
};
map1 {
- trip = <&cpu-alert1>;
- cooling-device = <&fan0 5 THERMAL_NO_LIMITS>;
+ trip = <&cpu_alert1>;
+ cooling-device = <&fan0 5 THERMAL_NO_LIMIT>;
};
map2 {
- trip = <&cpu-alert1>;
+ trip = <&cpu_alert1>;
cooling-device =
- <&cpu0 THERMAL_NO_LIMITS THERMAL_NO_LIMITS>;
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
@@ -298,13 +298,13 @@ used to monitor the zone 'cpu-thermal' using its sole sensor. A fan
device (fan0) is controlled via I2C bus 1, at address 0x48, and has ten
different cooling states 0-9. It is used to remove the heat out of
the thermal zone 'cpu-thermal' using its cooling states
-from its minimum to 4, when it reaches trip point 'cpu-alert0'
+from its minimum to 4, when it reaches trip point 'cpu_alert0'
at 90C, as an example of active cooling. The same cooling device is used at
-'cpu-alert1', but from 5 to its maximum state. The cpu@0 device is also
+'cpu_alert1', but from 5 to its maximum state. The cpu@0 device is also
linked to the same thermal zone, 'cpu-thermal', as a passive cooling device,
-using all its cooling states at trip point 'cpu-alert1',
+using all its cooling states at trip point 'cpu_alert1',
which is a trip point at 100C. On the thermal zone 'cpu-thermal', at the
-temperature of 125C, represented by the trip point 'cpu-crit', the silicon
+temperature of 125C, represented by the trip point 'cpu_crit', the silicon
is not reliable anymore.
(b) - IC with several internal sensors
@@ -329,7 +329,7 @@ ocp {
};
thermal-zones {
- cpu-thermal: cpu-thermal {
+ cpu_thermal: cpu-thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
@@ -338,12 +338,12 @@ thermal-zones {
trips {
/* each zone within the SoC may have its own trips */
- cpu-alert: cpu-alert {
+ cpu_alert: cpu-alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- cpu-crit: cpu-crit {
+ cpu_crit: cpu-crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
@@ -356,7 +356,7 @@ thermal-zones {
};
};
- gpu-thermal: gpu-thermal {
+ gpu_thermal: gpu-thermal {
polling-delay-passive = <120>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
@@ -365,12 +365,12 @@ thermal-zones {
trips {
/* each zone within the SoC may have its own trips */
- gpu-alert: gpu-alert {
+ gpu_alert: gpu-alert {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- gpu-crit: gpu-crit {
+ gpu_crit: gpu-crit {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
@@ -383,7 +383,7 @@ thermal-zones {
};
};
- dsp-thermal: dsp-thermal {
+ dsp_thermal: dsp-thermal {
polling-delay-passive = <50>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
@@ -392,12 +392,12 @@ thermal-zones {
trips {
/* each zone within the SoC may have its own trips */
- dsp-alert: gpu-alert {
+ dsp_alert: dsp-alert {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- dsp-crit: gpu-crit {
+ dsp_crit: gpu-crit {
temperature = <135000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
@@ -457,7 +457,7 @@ ocp {
};
thermal-zones {
- cpu-thermal: cpu-thermal {
+ cpu_thermal: cpu-thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
@@ -508,7 +508,7 @@ with many sensors and many cooling devices.
/*
* An IC with several temperature sensor.
*/
- adc-dummy: sensor@0x50 {
+ adc_dummy: sensor@0x50 {
...
#thermal-sensor-cells = <1>; /* sensor internal ID */
};
@@ -520,7 +520,7 @@ thermal-zones {
polling-delay = <2500>; /* milliseconds */
/* sensor ID */
- thermal-sensors = <&adc-dummy 4>;
+ thermal-sensors = <&adc_dummy 4>;
trips {
...
@@ -531,14 +531,14 @@ thermal-zones {
};
};
- board-thermal: board-thermal {
+ board_thermal: board-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <2500>; /* milliseconds */
/* sensor ID */
- thermal-sensors = <&adc-dummy 0>, /* pcb top edge */
- <&adc-dummy 1>, /* lcd */
- <&adc-dymmy 2>; /* back cover */
+ thermal-sensors = <&adc_dummy 0>, /* pcb top edge */
+ <&adc_dummy 1>, /* lcd */
+ <&adc_dummy 2>; /* back cover */
/*
* An array of coefficients describing the sensor
* linear relation. E.g.:
@@ -548,22 +548,22 @@ thermal-zones {
trips {
/* Trips are based on resulting linear equation */
- cpu-trip: cpu-trip {
+ cpu_trip: cpu-trip {
temperature = <60000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- gpu-trip: gpu-trip {
+ gpu_trip: gpu-trip {
temperature = <55000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
}
- lcd-trip: lcp-trip {
+ lcd_trip: lcp-trip {
temperature = <53000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
- crit-trip: crit-trip {
+ crit_trip: crit-trip {
temperature = <68000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
@@ -572,17 +572,17 @@ thermal-zones {
cooling-maps {
map0 {
- trip = <&cpu-trip>;
+ trip = <&cpu_trip>;
cooling-device = <&cpu0 0 2>;
contribution = <55>;
};
map1 {
- trip = <&gpu-trip>;
+ trip = <&gpu_trip>;
cooling-device = <&gpu0 0 2>;
contribution = <20>;
};
map2 {
- trip = <&lcd-trip>;
+ trip = <&lcd_trip>;
cooling-device = <&lcd0 5 10>;
contribution = <15>;
};