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authorSascha Hauer <s.hauer@pengutronix.de>2021-03-09 14:49:17 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2021-03-17 09:37:13 +0100
commitf826d85b7ab0924d5bf1a5458c49e7f7d8207a23 (patch)
treedd6354e00da0aa143d1db6164e1a455dddb9b892 /dts/Bindings/timer
parent0e37f94fbe1bd189f35b3e1718549ec2f4a710ee (diff)
downloadbarebox-f826d85b7ab0924d5bf1a5458c49e7f7d8207a23.tar.gz
barebox-f826d85b7ab0924d5bf1a5458c49e7f7d8207a23.tar.xz
dts: update to v5.12-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/timer')
-rw-r--r--dts/Bindings/timer/allwinner,sun4i-a10-timer.yaml2
-rw-r--r--dts/Bindings/timer/allwinner,sun5i-a13-hstimer.yaml3
-rw-r--r--dts/Bindings/timer/intel,ixp4xx-timer.yaml2
-rw-r--r--dts/Bindings/timer/nuvoton,npcm7xx-timer.txt3
-rw-r--r--dts/Bindings/timer/sifive,clint.yaml12
-rw-r--r--dts/Bindings/timer/snps,dw-apb-timer.yaml3
-rw-r--r--dts/Bindings/timer/stericsson-u300-apptimer.txt18
-rw-r--r--dts/Bindings/timer/ti,c64x+timer64.txt25
8 files changed, 16 insertions, 52 deletions
diff --git a/dts/Bindings/timer/allwinner,sun4i-a10-timer.yaml b/dts/Bindings/timer/allwinner,sun4i-a10-timer.yaml
index d918cee100..1c7cf32e7a 100644
--- a/dts/Bindings/timer/allwinner,sun4i-a10-timer.yaml
+++ b/dts/Bindings/timer/allwinner,sun4i-a10-timer.yaml
@@ -22,6 +22,8 @@ properties:
maxItems: 1
interrupts:
+ minItems: 2
+ maxItems: 6
description:
List of timers interrupts
diff --git a/dts/Bindings/timer/allwinner,sun5i-a13-hstimer.yaml b/dts/Bindings/timer/allwinner,sun5i-a13-hstimer.yaml
index 40fc4bcb31..b6a6d03a08 100644
--- a/dts/Bindings/timer/allwinner,sun5i-a13-hstimer.yaml
+++ b/dts/Bindings/timer/allwinner,sun5i-a13-hstimer.yaml
@@ -46,8 +46,7 @@ required:
if:
properties:
compatible:
- items:
- const: allwinner,sun5i-a13-hstimer
+ const: allwinner,sun5i-a13-hstimer
then:
properties:
diff --git a/dts/Bindings/timer/intel,ixp4xx-timer.yaml b/dts/Bindings/timer/intel,ixp4xx-timer.yaml
index 1a721d8af6..a8de99b0c0 100644
--- a/dts/Bindings/timer/intel,ixp4xx-timer.yaml
+++ b/dts/Bindings/timer/intel,ixp4xx-timer.yaml
@@ -18,7 +18,7 @@ properties:
- const: intel,ixp4xx-timer
reg:
- description: Should contain registers location and length
+ maxItems: 1
interrupts:
minItems: 1
diff --git a/dts/Bindings/timer/nuvoton,npcm7xx-timer.txt b/dts/Bindings/timer/nuvoton,npcm7xx-timer.txt
index ea22dfe485..97258f1a15 100644
--- a/dts/Bindings/timer/nuvoton,npcm7xx-timer.txt
+++ b/dts/Bindings/timer/nuvoton,npcm7xx-timer.txt
@@ -6,8 +6,7 @@ timer counters.
Required properties:
- compatible : "nuvoton,npcm750-timer" for Poleg NPCM750.
- reg : Offset and length of the register set for the device.
-- interrupts : Contain the timer interrupt with flags for
- falling edge.
+- interrupts : Contain the timer interrupt of timer 0.
- clocks : phandle of timer reference clock (usually a 25 MHz clock).
Example:
diff --git a/dts/Bindings/timer/sifive,clint.yaml b/dts/Bindings/timer/sifive,clint.yaml
index 2a0e9cd9fb..a35952f487 100644
--- a/dts/Bindings/timer/sifive,clint.yaml
+++ b/dts/Bindings/timer/sifive,clint.yaml
@@ -23,15 +23,19 @@ description:
properties:
compatible:
items:
- - const: sifive,fu540-c000-clint
+ - enum:
+ - sifive,fu540-c000-clint
+ - canaan,k210-clint
- const: sifive,clint0
description:
- Should be "sifive,<chip>-clint" and "sifive,clint<version>".
+ Should be "<vendor>,<chip>-clint" and "sifive,clint<version>".
Supported compatible strings are -
"sifive,fu540-c000-clint" for the SiFive CLINT v0 as integrated
- onto the SiFive FU540 chip, and "sifive,clint0" for the SiFive
- CLINT v0 IP block with no chip integration tweaks.
+ onto the SiFive FU540 chip, "canaan,k210-clint" for the SiFive
+ CLINT v0 as integrated onto the Canaan Kendryte K210 chip, and
+ "sifive,clint0" for the SiFive CLINT v0 IP block with no chip
+ integration tweaks.
Please refer to sifive-blocks-ip-versioning.txt for details
reg:
diff --git a/dts/Bindings/timer/snps,dw-apb-timer.yaml b/dts/Bindings/timer/snps,dw-apb-timer.yaml
index d65faf289a..d33c9205a9 100644
--- a/dts/Bindings/timer/snps,dw-apb-timer.yaml
+++ b/dts/Bindings/timer/snps,dw-apb-timer.yaml
@@ -24,6 +24,9 @@ properties:
interrupts:
maxItems: 1
+ resets:
+ maxItems: 1
+
clocks:
minItems: 1
items:
diff --git a/dts/Bindings/timer/stericsson-u300-apptimer.txt b/dts/Bindings/timer/stericsson-u300-apptimer.txt
deleted file mode 100644
index 9499bc8ee9..0000000000
--- a/dts/Bindings/timer/stericsson-u300-apptimer.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-ST-Ericsson U300 apptimer
-
-Required properties:
-
-- compatible : should be "stericsson,u300-apptimer"
-- reg : Specifies base physical address and size of the registers.
-- interrupts : A list of 4 interrupts; one for each subtimer. These
- are, in order: OS (operating system), DD (device driver) both
- adopted for EPOC/Symbian with two specific IRQs for these tasks,
- then GP1 and GP2, which are general-purpose timers.
-
-Example:
-
-timer {
- compatible = "stericsson,u300-apptimer";
- reg = <0xc0014000 0x1000>;
- interrupts = <24 25 26 27>;
-};
diff --git a/dts/Bindings/timer/ti,c64x+timer64.txt b/dts/Bindings/timer/ti,c64x+timer64.txt
deleted file mode 100644
index d96c1e283e..0000000000
--- a/dts/Bindings/timer/ti,c64x+timer64.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Timer64
--------
-
-The timer64 node describes C6X event timers.
-
-Required properties:
-
-- compatible: must be "ti,c64x+timer64"
-- reg: base address and size of register region
-- interrupts: interrupt id
-
-Optional properties:
-
-- ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.
-
-- ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.
-
-Example:
- timer0: timer@25e0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x01 >;
- reg = <0x25e0000 0x40>;
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };