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author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:31:46 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 12:43:53 +0200 |
commit | 86186c232241b607f84cc266a6cda49160f44948 (patch) | |
tree | 286a87dae7f2d8c3eda5b8551fc9b5f4db726c45 /dts/Bindings/watchdog | |
parent | 0cf29e11efa66ad4515c9391303406c725be2c7a (diff) | |
download | barebox-86186c232241b607f84cc266a6cda49160f44948.tar.gz barebox-86186c232241b607f84cc266a6cda49160f44948.tar.xz |
dts: update to v4.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/watchdog')
-rw-r--r-- | dts/Bindings/watchdog/fsl-imx-wdt.txt | 4 | ||||
-rw-r--r-- | dts/Bindings/watchdog/microchip,pic32-dmt.txt | 19 | ||||
-rw-r--r-- | dts/Bindings/watchdog/microchip,pic32-wdt.txt | 18 | ||||
-rw-r--r-- | dts/Bindings/watchdog/renesas-wdt.txt | 25 |
4 files changed, 65 insertions, 1 deletions
diff --git a/dts/Bindings/watchdog/fsl-imx-wdt.txt b/dts/Bindings/watchdog/fsl-imx-wdt.txt index 8dab6fd024..107280ef00 100644 --- a/dts/Bindings/watchdog/fsl-imx-wdt.txt +++ b/dts/Bindings/watchdog/fsl-imx-wdt.txt @@ -5,10 +5,12 @@ Required properties: - reg : Should contain WDT registers location and length - interrupts : Should contain WDT interrupt -Optional property: +Optional properties: - big-endian: If present the watchdog device's registers are implemented in big endian mode, otherwise in native mode(same with CPU), for more detail please see: Documentation/devicetree/bindings/regmap/regmap.txt. +- fsl,ext-reset-output: If present the watchdog device is configured to + assert its external reset (WDOG_B) instead of issuing a software reset. Examples: diff --git a/dts/Bindings/watchdog/microchip,pic32-dmt.txt b/dts/Bindings/watchdog/microchip,pic32-dmt.txt new file mode 100644 index 0000000000..49485f8313 --- /dev/null +++ b/dts/Bindings/watchdog/microchip,pic32-dmt.txt @@ -0,0 +1,19 @@ +* Microchip PIC32 Deadman Timer + +The deadman timer is used to reset the processor in the event of a software +malfunction. It is a free-running instruction fetch timer, which is clocked +whenever an instruction fetch occurs until a count match occurs. + +Required properties: +- compatible: must be "microchip,pic32mzda-dmt". +- reg: physical base address of the controller and length of memory mapped + region. +- clocks: phandle of source clk. Should be <&rootclk PB7CLK>. + +Example: + + watchdog@1f800a00 { + compatible = "microchip,pic32mzda-dmt"; + reg = <0x1f800a00 0x80>; + clocks = <&rootclk PB7CLK>; + }; diff --git a/dts/Bindings/watchdog/microchip,pic32-wdt.txt b/dts/Bindings/watchdog/microchip,pic32-wdt.txt new file mode 100644 index 0000000000..f03a29a1b3 --- /dev/null +++ b/dts/Bindings/watchdog/microchip,pic32-wdt.txt @@ -0,0 +1,18 @@ +* Microchip PIC32 Watchdog Timer + +When enabled, the watchdog peripheral can be used to reset the device if the +WDT is not cleared periodically in software. + +Required properties: +- compatible: must be "microchip,pic32mzda-wdt". +- reg: physical base address of the controller and length of memory mapped + region. +- clocks: phandle of source clk. Should be <&rootclk LPRCCLK>. + +Example: + + watchdog@1f800800 { + compatible = "microchip,pic32mzda-wdt"; + reg = <0x1f800800 0x200>; + clocks = <&rootclk LPRCCLK>; + }; diff --git a/dts/Bindings/watchdog/renesas-wdt.txt b/dts/Bindings/watchdog/renesas-wdt.txt new file mode 100644 index 0000000000..b9512f1eb8 --- /dev/null +++ b/dts/Bindings/watchdog/renesas-wdt.txt @@ -0,0 +1,25 @@ +Renesas Watchdog Timer (WDT) Controller + +Required properties: +- compatible : Should be "renesas,r8a7795-wdt", or "renesas,rcar-gen3-wdt" + + When compatible with the generic version, nodes must list the SoC-specific + version corresponding to the platform first, followed by the generic + version. + +- reg : Should contain WDT registers location and length +- clocks : the clock feeding the watchdog timer. + +Optional properties: +- timeout-sec : Contains the watchdog timeout in seconds +- power-domains : the power domain the WDT belongs to + +Examples: + + wdt0: watchdog@e6020000 { + compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; + reg = <0 0xe6020000 0 0x0c>; + clocks = <&cpg CPG_MOD 402>; + power-domains = <&cpg>; + timeout-sec = <60>; + }; |