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authorSascha Hauer <s.hauer@pengutronix.de>2017-11-17 09:54:19 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2017-11-17 09:54:19 +0100
commit68a902345d0643c303379599d7d29471ca296700 (patch)
tree21240ae6279a6999e904613eda239ba34f1bc62c /dts/Bindings
parent80c2876fd7d8f4b8bb0caa3160b966147e6c8d46 (diff)
downloadbarebox-68a902345d0643c303379599d7d29471ca296700.tar.gz
barebox-68a902345d0643c303379599d7d29471ca296700.tar.xz
dts: update to v4.14-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings')
-rw-r--r--dts/Bindings/iio/proximity/as3935.txt5
-rw-r--r--dts/Bindings/interrupt-controller/arm,gic-v3.txt6
2 files changed, 8 insertions, 3 deletions
diff --git a/dts/Bindings/iio/proximity/as3935.txt b/dts/Bindings/iio/proximity/as3935.txt
index 38d74314b..b6c1afa6f 100644
--- a/dts/Bindings/iio/proximity/as3935.txt
+++ b/dts/Bindings/iio/proximity/as3935.txt
@@ -16,6 +16,10 @@ Optional properties:
- ams,tuning-capacitor-pf: Calibration tuning capacitor stepping
value 0 - 120pF. This will require using the calibration data from
the manufacturer.
+ - ams,nflwdth: Set the noise and watchdog threshold register on
+ startup. This will need to set according to the noise from the
+ MCU board, and possibly the local environment. Refer to the
+ datasheet for the threshold settings.
Example:
@@ -27,4 +31,5 @@ as3935@0 {
interrupt-parent = <&gpio1>;
interrupts = <16 1>;
ams,tuning-capacitor-pf = <80>;
+ ams,nflwdth = <0x44>;
};
diff --git a/dts/Bindings/interrupt-controller/arm,gic-v3.txt b/dts/Bindings/interrupt-controller/arm,gic-v3.txt
index 4c29cdab0..5eb108e18 100644
--- a/dts/Bindings/interrupt-controller/arm,gic-v3.txt
+++ b/dts/Bindings/interrupt-controller/arm,gic-v3.txt
@@ -99,7 +99,7 @@ Examples:
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
- reg = <0x0 0x2c200000 0 0x200000>;
+ reg = <0x0 0x2c200000 0 0x20000>;
};
};
@@ -124,14 +124,14 @@ Examples:
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
- reg = <0x0 0x2c200000 0 0x200000>;
+ reg = <0x0 0x2c200000 0 0x20000>;
};
gic-its@2c400000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
- reg = <0x0 0x2c400000 0 0x200000>;
+ reg = <0x0 0x2c400000 0 0x20000>;
};
ppi-partitions {