diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-01-05 12:56:25 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-01-07 11:41:05 +0100 |
| commit | 6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef (patch) | |
| tree | 5d16ca525c12dddb21d9c4750dfd1a1e354eb731 /dts/Bindings | |
| parent | 93c4690b4921d3149db3fcf5b62a8aa5010a4ae7 (diff) | |
| download | barebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.gz barebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.xz | |
dts: update to v5.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings')
544 files changed, 19348 insertions, 7109 deletions
diff --git a/dts/Bindings/Makefile b/dts/Bindings/Makefile index f50420099a..8f2b054bec 100644 --- a/dts/Bindings/Makefile +++ b/dts/Bindings/Makefile @@ -27,17 +27,17 @@ find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ -name '*.example.dt.yaml' \) quiet_cmd_yamllint = LINT $(src) - cmd_yamllint = $(find_cmd) | \ - xargs $(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint + cmd_yamllint = ($(find_cmd) | \ + xargs $(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint) || true quiet_cmd_chk_bindings = CHKDT $@ - cmd_chk_bindings = $(find_cmd) | \ - xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src) + cmd_chk_bindings = ($(find_cmd) | \ + xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src)) || true quiet_cmd_mk_schema = SCHEMA $@ cmd_mk_schema = f=$$(mktemp) ; \ $(if $(DT_MK_SCHEMA_FLAGS), \ - echo $(real-prereqs), \ + printf '%s\n' $(real-prereqs), \ $(find_cmd)) > $$f ; \ $(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \ rm -f $$f diff --git a/dts/Bindings/arm/arm,scmi.txt b/dts/Bindings/arm/arm,scmi.txt index 55deb68230..b5ce5b39bb 100644 --- a/dts/Bindings/arm/arm,scmi.txt +++ b/dts/Bindings/arm/arm,scmi.txt @@ -62,6 +62,20 @@ Required properties: - #power-domain-cells : Should be 1. Contains the device or the power domain ID value used by SCMI commands. +Regulator bindings for the SCMI Regulator based on SCMI Message Protocol +------------------------------------------------------------ +An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain, +and should be always positioned as a root regulator. +It does not support any current operation. + +SCMI Regulators are grouped under a 'regulators' node which in turn is a child +of the SCMI Voltage protocol node inside the desired SCMI instance node. + +This binding uses the common regulator binding[6]. + +Required properties: + - reg : shall identify an existent SCMI Voltage Domain. + Sensor bindings for the sensors based on SCMI Message Protocol -------------------------------------------------------------- SCMI provides an API to access the various sensors on the SoC. @@ -105,6 +119,7 @@ Required sub-node properties: [3] Documentation/devicetree/bindings/thermal/thermal*.yaml [4] Documentation/devicetree/bindings/sram/sram.yaml [5] Documentation/devicetree/bindings/reset/reset.txt +[6] Documentation/devicetree/bindings/regulator/regulator.yaml Example: @@ -169,6 +184,25 @@ firmware { reg = <0x16>; #reset-cells = <1>; }; + + scmi_voltage: protocol@17 { + reg = <0x17>; + + regulators { + regulator_devX: regulator@0 { + reg = <0x0>; + regulator-max-microvolt = <3300000>; + }; + + regulator_devY: regulator@9 { + reg = <0x9>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <4200000>; + }; + + ... + }; + }; }; }; diff --git a/dts/Bindings/arm/bcm/brcm,bcm4908.yaml b/dts/Bindings/arm/bcm/brcm,bcm4908.yaml new file mode 100644 index 0000000000..5fec063d9a --- /dev/null +++ b/dts/Bindings/arm/bcm/brcm,bcm4908.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM4908 device tree bindings + +description: + Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs. + +maintainers: + - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: BCM4906 based boards + items: + - const: brcm,bcm4906 + - const: brcm,bcm4908 + + - description: BCM4908 based boards + items: + - enum: + - asus,gt-ac5300 + - const: brcm,bcm4908 + + - description: BCM49408 based boards + items: + - const: brcm,bcm49408 + - const: brcm,bcm4908 + +additionalProperties: true + +... diff --git a/dts/Bindings/arm/freescale/fsl,scu.txt b/dts/Bindings/arm/freescale/fsl,scu.txt index 6064d98b10..395359dc94 100644 --- a/dts/Bindings/arm/freescale/fsl,scu.txt +++ b/dts/Bindings/arm/freescale/fsl,scu.txt @@ -89,7 +89,10 @@ Required properties: "fsl,imx8qm-clock" "fsl,imx8qxp-clock" followed by "fsl,scu-clk" -- #clock-cells: Should be 1. Contains the Clock ID value. +- #clock-cells: Should be either + 2: Contains the Resource and Clock ID value. + or + 1: Contains the Clock ID value. (DEPRECATED) - clocks: List of clock specifiers, must contain an entry for each required entry in clock-names - clock-names: Should include entries "xtal_32KHz", "xtal_24MHz" @@ -208,7 +211,7 @@ firmware { clk: clk { compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; - #clock-cells = <1>; + #clock-cells = <2>; }; iomuxc { @@ -263,8 +266,7 @@ serial@5a060000 { ... pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpuart0>; - clocks = <&clk IMX8QXP_UART0_CLK>, - <&clk IMX8QXP_UART0_IPG_CLK>; - clock-names = "per", "ipg"; + clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; + clock-names = "ipg"; power-domains = <&pd IMX_SC_R_UART_0>; }; diff --git a/dts/Bindings/arm/fsl.yaml b/dts/Bindings/arm/fsl.yaml index 934289446a..34000f7fbe 100644 --- a/dts/Bindings/arm/fsl.yaml +++ b/dts/Bindings/arm/fsl.yaml @@ -33,16 +33,57 @@ properties: items: - enum: - fsl,imx25-pdk + - karo,imx25-tx25 - const: fsl,imx25 - - description: i.MX27 Product Development Kit + - description: i.MX25 Eukrea CPUIMX25 Boards + items: + - enum: + - eukrea,mbimxsd25-baseboard # Eukrea MBIMXSD25 + - const: eukrea,cpuimx25 + - const: fsl,imx25 + + - description: i.MX25 Eukrea MBIMXSD25 Boards + items: + - enum: + - eukrea,mbimxsd25-baseboard-cmo-qvga + - eukrea,mbimxsd25-baseboard-dvi-svga + - eukrea,mbimxsd25-baseboard-dvi-vga + - const: eukrea,mbimxsd25-baseboard + - const: eukrea,cpuimx25 + - const: fsl,imx25 + + - description: i.MX27 based Boards items: - enum: - armadeus,imx27-apf27 # APF27 SoM - - armadeus,imx27-apf27dev # APF27 SoM on APF27Dev board - fsl,imx27-pdk - const: fsl,imx27 + - description: i.MX27 APF27 SoM Board + items: + - const: armadeus,imx27-apf27dev + - const: armadeus,imx27-apf27 + - const: fsl,imx27 + + - description: i.MX27 Eukrea CPUIMX27 SoM Board + items: + - const: eukrea,mbimxsd27-baseboard + - const: eukrea,cpuimx27 + - const: fsl,imx27 + + - description: i.MX27 Phytec pca100 Board + items: + - const: phytec,imx27-pca100-rdk + - const: phytec,imx27-pca100 + - const: fsl,imx27 + + - description: i.MX27 Phytec pcm970 Board + items: + - const: phytec,imx27-pcm970 + - const: phytec,imx27-pcm038 + - const: fsl,imx27 + - description: i.MX28 based Boards items: - enum: @@ -88,13 +129,33 @@ properties: - kobo,aura - const: fsl,imx50 - - description: i.MX51 Babbage Board + - description: i.MX51 based Boards items: - enum: - - armadeus,imx51-apf51 # APF51 SoM - - armadeus,imx51-apf51dev # APF51 SoM on APF51Dev board + - armadeus,imx51-apf51 # Armadeus Systems APF51 module - fsl,imx51-babbage - technologic,imx51-ts4800 + - zii,imx51-scu3-esb + - zii,imx51-scu2-mezz + - zii,imx51-rdu1 + - const: fsl,imx51 + + - description: i.MX51 based Armadeus Systems APF51Dev Board + items: + - const: armadeus,imx51-apf51dev + - const: armadeus,imx51-apf51 + - const: fsl,imx51 + + - description: i.MX51 based Digi ConnectCore CC(W)-MX51 JSK Board + items: + - const: digi,connectcore-ccxmx51-jsk + - const: digi,connectcore-ccxmx51-som + - const: fsl,imx51 + + - description: i.MX51 based Eukrea CPUIMX51 Board + items: + - const: eukrea,mbimxsd51 + - const: eukrea,cpuimx51 - const: fsl,imx51 - description: i.MX53 based Boards @@ -104,36 +165,111 @@ properties: - fsl,imx53-ard - fsl,imx53-evk - fsl,imx53-qsb + - fsl,imx53-qsrb # Freescale i.MX53 Quick Start-R Board - fsl,imx53-smd + - ge,imx53-cpuvo # General Electric CS ONE + - inversepath,imx53-usbarmory # Inverse Path USB armory + - karo,tx53 # Ka-Ro electronics TX53 module + - kiebackpeter,imx53-ddc # K+P imx53 DDC + - kiebackpeter,imx53-hsc # K+P imx53 HSC - menlo,m53menlo + - voipac,imx53-dmm-668 # Voipac i.MX53 X53-DMM-668 + - const: fsl,imx53 + + - description: i.MX53 based Aries/DENX M53EVK Board + items: + - const: aries,imx53-m53evk + - const: denx,imx53-m53evk + - const: fsl,imx53 + + - description: i.MX53 based TQ MBa53 Board + items: + - const: tq,mba53 + - const: tq,tqma53 - const: fsl,imx53 - description: i.MX6Q based Boards items: - enum: - - armadeus,imx6q-apf6 # APF6 (Quad/Dual) SoM - - armadeus,imx6q-apf6dev # APF6 (Quad/Dual) SoM on APF6Dev board + - auvidea,h100 # Auvidea H100 + - boundary,imx6q-nitrogen6_max + - boundary,imx6q-nitrogen6_som2 + - boundary,imx6q-nitrogen6x + - compulab,cm-fx6 # CompuLab CM-FX6 + - dmo,imx6q-edmqmx6 # Data Modul eDM-QMX6 Board + - embest,imx6q-marsboard # Embest MarS Board i.MX6Dual - emtrion,emcon-mx6 # emCON-MX6D or emCON-MX6Q SoM - emtrion,emcon-mx6-avari # emCON-MX6D or emCON-MX6Q SoM on Avari Base + - engicam,imx6-icore # Engicam i.CoreM6 Starter Kit + - engicam,imx6-icore-rqs # Engicam i.CoreM6 RQS Starter Kit - fsl,imx6q-arm2 - fsl,imx6q-sabreauto - fsl,imx6q-sabrelite - fsl,imx6q-sabresd + - karo,imx6q-tx6q # Ka-Ro electronics TX6Q Modules + - kiebackpeter,imx6q-tpc # K+P i.MX6 Quad TPC Board - kontron,imx6q-samx6i # Kontron i.MX6 Dual/Quad SMARC Module + - kosagi,imx6q-novena # Kosagi Novena Dual/Quad - logicpd,imx6q-logicpd + - lwn,display5 # Liebherr Display5 i.MX6 Quad Board + - lwn,mccmon6 # Liebherr Monitor6 i.MX6 Quad Board + - nutsboard,imx6q-pistachio # NutsBoard i.MX6 Quad Pistachio + - microsys,sbc6x # MicroSys sbc6x board + - poslab,imx6q-savageboard # Poslab SavageBoard Quad - prt,prti6q # Protonic PRTI6Q board - prt,prtwd2 # Protonic WD2 board + - rex,imx6q-rex-pro # Rex Pro i.MX6 Quad Board + - solidrun,cubox-i/q # SolidRun Cubox-i Dual/Quad + - solidrun,hummingboard/q + - solidrun,hummingboard2/q + - tbs,imx6q-tbs2910 # TBS2910 Matrix ARM mini PC - technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf - technexion,imx6q-pico-hobbit # TechNexion i.MX6Q Pico-Hobbit - technexion,imx6q-pico-nymph # TechNexion i.MX6Q Pico-Nymph - technexion,imx6q-pico-pi # TechNexion i.MX6Q Pico-Pi - technologic,imx6q-ts4900 - technologic,imx6q-ts7970 - - toradex,apalis_imx6q # Apalis iMX6 Module - - toradex,apalis_imx6q-eval # Apalis iMX6 Module on Apalis Evaluation Board - - toradex,apalis_imx6q-ixora # Apalis iMX6 Module on Ixora - - toradex,apalis_imx6q-ixora-v1.1 # Apalis iMX6 Module on Ixora V1.1 + - toradex,apalis_imx6q # Apalis iMX6 Module + - udoo,imx6q-udoo # Udoo i.MX6 Quad Board + - uniwest,imx6q-evi # Uniwest Evi - variscite,dt6customboard + - wand,imx6q-wandboard # Wandboard i.MX6 Quad Board + - zealz,imx6q-gk802 # Zealz GK802 + - zii,imx6q-zii-rdu2 # ZII RDU2 Board + - const: fsl,imx6q + + - description: i.MX6Q Advantech DMS-BA16 Boards + items: + - enum: + - advantech,imx6q-dms-ba16 # Advantech DMS-BA16 + - ge,imx6q-b450v3 # General Electric B450v3 + - ge,imx6q-b650v3 # General Electric B650v3 + - ge,imx6q-b850v3 # General Electric B850v3 + - const: advantech,imx6q-ba16 + - const: fsl,imx6q + + - description: i.MX6Q Armadeus APF6 Boards + items: + - const: armadeus,imx6q-apf6dev + - const: armadeus,imx6q-apf6 + - const: fsl,imx6q + + - description: i.MX6Q CompuLab Utilite Pro Board + items: + - const: compulab,utilite-pro + - const: compulab,cm-fx6 + - const: fsl,imx6q + + - description: i.MX6Q DFI FS700-M60-6QD Board + items: + - const: dfi,fs700-m60-6qd + - const: dfi,fs700e-m60 + - const: fsl,imx6q + + - description: i.MX6Q DHCOM Premium Developer Kit Board + items: + - const: dh,imx6q-dhcom-pdk2 + - const: dh,imx6q-dhcom-som - const: fsl,imx6q - description: i.MX6Q Gateworks Ventana Boards @@ -172,11 +308,32 @@ properties: - const: phytec,imx6q-pfla02 # PHYTEC phyFLEX-i.MX6 Quad - const: fsl,imx6q + - description: i.MX6Q Boards with Toradex Apalis iMX6Q/D Module + items: + - enum: + - toradex,apalis_imx6q-ixora # Apalis iMX6Q/D Module on Ixora Carrier Board + - toradex,apalis_imx6q-eval # Apalis iMX6Q/D Module on Apalis Evaluation Board + - const: toradex,apalis_imx6q + - const: fsl,imx6q + + - description: i.MX6Q Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1 + items: + - const: toradex,apalis_imx6q-ixora-v1.1 + - const: toradex,apalis_imx6q-ixora + - const: toradex,apalis_imx6q + - const: fsl,imx6q + - description: i.MX6QP based Boards items: - enum: + - boundary,imx6qp-nitrogen6_max + - boundary,imx6qp-nitrogen6_som2 - fsl,imx6qp-sabreauto # i.MX6 Quad Plus SABRE Automotive Board - fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board + - karo,imx6qp-tx6qp # Ka-Ro electronics TX6QP-8037 Module + - prt,prtwd3 # Protonic WD3 board + - wand,imx6qp-wandboard # Wandboard i.MX6 QuadPlus Board + - zii,imx6qp-zii-rdu2 # ZII RDU2+ Board - const: fsl,imx6qp - description: i.MX6QP PHYTEC phyBOARD-Mira @@ -189,32 +346,59 @@ properties: - description: i.MX6DL based Boards items: - enum: - - armadeus,imx6dl-apf6 # APF6 (Solo) SoM - - armadeus,imx6dl-apf6dev # APF6 (Solo) SoM on APF6Dev board + - abb,aristainetos-imx6dl-4 # aristainetos i.MX6 Dual Lite Board 4 + - abb,aristainetos-imx6dl-7 # aristainetos i.MX6 Dual Lite Board 7 + - abb,aristainetos2-imx6dl-4 # aristainetos2 i.MX6 Dual Lite Board 4 + - abb,aristainetos2-imx6dl-7 # aristainetos2 i.MX6 Dual Lite Board 7 + - alt,alti6p # Altesco I6P Board + - boundary,imx6dl-nit6xlite # Boundary Devices Nitrogen6 Lite + - boundary,imx6dl-nitrogen6x # Boundary Devices Nitrogen6x + - bticino,imx6dl-mamoj # BTicino i.MX6DL Mamoj - eckelmann,imx6dl-ci4x10 - emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM - emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base + - engicam,imx6-icore # Engicam i.CoreM6 Starter Kit + - engicam,imx6-icore-rqs # Engicam i.CoreM6 RQS Starter Kit - fsl,imx6dl-sabreauto # i.MX6 DualLite/Solo SABRE Automotive Board + - fsl,imx6dl-sabrelite # i.MX6 DualLite SABRE Lite Board - fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board + - karo,imx6dl-tx6dl # Ka-Ro electronics TX6U Modules - kontron,imx6dl-samx6i # Kontron i.MX6 Solo SMARC Module + - poslab,imx6dl-savageboard # Poslab SavageBoard Dual - prt,prtrvt # Protonic RVT board - prt,prtvt7 # Protonic VT7 board + - rex,imx6dl-rex-basic # Rex Basic i.MX6 Dual Lite Board + - riot,imx6s-riotboard # RIoTboard i.MX6S + - solidrun,cubox-i/dl # SolidRun Cubox-i Solo/DualLite + - solidrun,hummingboard/dl + - solidrun,hummingboard2/dl # SolidRun HummingBoard2 Solo/DualLite - technexion,imx6dl-pico-dwarf # TechNexion i.MX6DL Pico-Dwarf - technexion,imx6dl-pico-hobbit # TechNexion i.MX6DL Pico-Hobbit - technexion,imx6dl-pico-nymph # TechNexion i.MX6DL Pico-Nymph - technexion,imx6dl-pico-pi # TechNexion i.MX6DL Pico-Pi - technologic,imx6dl-ts4900 - technologic,imx6dl-ts7970 - - toradex,colibri_imx6dl # Colibri iMX6 Module - - toradex,colibri_imx6dl-v1_1 # Colibri iMX6 Module V1.1 - - toradex,colibri_imx6dl-eval-v3 # Colibri iMX6 Module on Colibri Evaluation Board V3 - - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6 Module V1.1 on Colibri Evaluation Board V3 + - udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board + - vdl,lanmcu # Van der Laan LANMCU board + - wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board - ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board - ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board - ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board - ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board - const: fsl,imx6dl + - description: i.MX6DL based Armadeus AFP6 Board + items: + - const: armadeus,imx6dl-apf6dev + - const: armadeus,imx6dl-apf6 # APF6 (Solo) SoM + - const: fsl,imx6dl + + - description: i.MX6DL based DFI FS700-M60-6DL Board + items: + - const: dfi,fs700-m60-6dl + - const: dfi,fs700e-m60 + - const: fsl,imx6dl + - description: i.MX6DL Gateworks Ventana Boards items: - enum: @@ -250,12 +434,29 @@ properties: - const: phytec,imx6dl-pfla02 # PHYTEC phyFLEX-i.MX6 Quad - const: fsl,imx6dl + - description: i.MX6DL Toradex Colibri iMX6 Module on Colibri + Evaluation Board V3 + items: + - const: toradex,colibri_imx6dl-eval-v3 + - const: toradex,colibri_imx6dl # Colibri iMX6 Module + - const: fsl,imx6dl + + - description: i.MX6DL Toradex Colibri iMX6 Module V1.1 on Colibri + Evaluation Board V3 + items: + - const: toradex,colibri_imx6dl-v1_1-eval-v3 + - const: toradex,colibri_imx6dl-v1_1 # Colibri iMX6 Module V1.1 + - const: toradex,colibri_imx6dl-eval-v3 + - const: toradex,colibri_imx6dl # Colibri iMX6 Module + - const: fsl,imx6dl + - description: i.MX6SL based Boards items: - enum: - fsl,imx6sl-evk # i.MX6 SoloLite EVK Board - kobo,tolino-shine2hd - kobo,tolino-shine3 + - revotics,imx6sl-warp # Revotics WaRP Board - const: fsl,imx6sl - description: i.MX6SLL based Boards @@ -268,17 +469,23 @@ properties: - description: i.MX6SX based Boards items: - enum: + - boundary,imx6sx-nitrogen6sx - fsl,imx6sx-sabreauto # i.MX6 SoloX Sabre Auto Board - fsl,imx6sx-sdb # i.MX6 SoloX SDB Board - fsl,imx6sx-sdb-reva # i.MX6 SoloX SDB Rev-A Board + - samtec,imx6sx-vining-2000 # Softing VIN|ING 2000 Board + - udoo,neobasic # UDOO Neo Basic Board + - udoo,neoextended # UDOO Neo Extended + - udoo,neofull # UDOO Neo Full - const: fsl,imx6sx - description: i.MX6UL based Boards items: - enum: - - armadeus,imx6ul-opos6ul # OPOS6UL (i.MX6UL) SoM - - armadeus,imx6ul-opos6uldev # OPOS6UL (i.MX6UL) SoM on OPOS6ULDev board + - engicam,imx6ul-geam # Engicam GEAM6UL Starter Kit + - engicam,imx6ul-isiot # Engicam Is.IoT MX6UL eMMC/NAND Starter kit - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board + - karo,imx6ul-tx6ul # Ka-Ro electronics TXUL-0010 Module - kontron,imx6ul-n6310-som # Kontron N6310 SOM - kontron,imx6ul-n6311-som # Kontron N6311 SOM - technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf @@ -286,6 +493,26 @@ properties: - technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi - const: fsl,imx6ul + - description: i.MX6UL Armadeus Systems OPOS6UL SoM Board + items: + - const: armadeus,imx6ul-opos6uldev # OPOS6UL (i.MX6UL) SoM on OPOS6ULDev board + - const: armadeus,imx6ul-opos6ul # OPOS6UL (i.MX6UL) SoM + - const: fsl,imx6ul + + - description: i.MX6UL Digi International ConnectCore 6UL Boards + items: + - enum: + - digi,ccimx6ulsbcexpress # Digi International ConnectCore 6UL SBC Express + - digi,ccimx6ulsbcpro # Digi International ConnectCore 6UL SBC Pro + - const: digi,ccimx6ulsom + - const: fsl,imx6ul + + - description: i.MX6UL Grinn liteBoard + items: + - const: grinn,imx6ul-liteboard + - const: grinn,imx6ul-litesom + - const: fsl,imx6ul + - description: i.MX6UL PHYTEC phyBOARD-Segin items: - enum: @@ -317,8 +544,6 @@ properties: - description: i.MX6ULL based Boards items: - enum: - - armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM - - armadeus,imx6ull-opos6uldev # OPOS6UL (i.MX6ULL) SoM on OPOS6ULDev board - fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board - kontron,imx6ull-n6411-som # Kontron N6411 SOM - myir,imx6ull-mys-6ulx-eval # MYiR Tech iMX6ULL Evaluation Board @@ -326,6 +551,12 @@ properties: - toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT Module on Colibri Eval Board - const: fsl,imx6ull + - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board + items: + - const: armadeus,imx6ull-opos6uldev # OPOS6UL (i.MX6ULL) SoM on OPOS6ULDev board + - const: armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM + - const: fsl,imx6ull + - description: i.MX6ULL PHYTEC phyBOARD-Segin items: - enum: @@ -351,17 +582,32 @@ properties: - description: i.MX7S based Boards items: - enum: - - toradex,colibri-imx7s # Colibri iMX7 Solo Module - - toradex,colibri-imx7s-aster # Colibri iMX7 Solo Module on Aster Carrier Board - - toradex,colibri-imx7s-eval-v3 # Colibri iMX7 Solo Module on Colibri Evaluation Board V3 - - tq,imx7s-mba7 # i.MX7S TQ MBa7 with TQMa7S SoM + - element14,imx7s-warp # Element14 Warp i.MX7 Board + - const: fsl,imx7s + + - description: i.MX7S Boards with Toradex Colibri iMX7S Module + items: + - enum: + - toradex,colibri-imx7s-aster # Module on Aster Carrier Board + - toradex,colibri-imx7s-eval-v3 # Module on Colibri Evaluation Board V3 + - const: toradex,colibri-imx7s + - const: fsl,imx7s + + - description: TQ-Systems TQMa7S SoM on MBa7x board + items: + - const: tq,imx7s-mba7 + - const: tq,imx7s-tqma7 - const: fsl,imx7s - description: i.MX7D based Boards items: - enum: + - boundary,imx7d-nitrogen7 + - compulab,cl-som-imx7 # CompuLab CL-SOM-iMX7 - fsl,imx7d-sdb # i.MX7 SabreSD Board - fsl,imx7d-sdb-reva # i.MX7 SabreSD Rev-A Board + - kam,imx7d-flex-concentrator # Kamstrup OMNIA Flex Concentrator + - kam,imx7d-flex-concentrator-mfg # Kamstrup OMNIA Flex Concentrator in manufacturing mode - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board - technexion,imx7d-pico-dwarf # TechNexion i.MX7D Pico-Dwarf - technexion,imx7d-pico-hobbit # TechNexion i.MX7D Pico-Hobbit @@ -376,11 +622,16 @@ properties: # Colibri Evaluation Board V3 - toradex,colibri-imx7d-eval-v3 # Colibri iMX7 Dual Module on # Colibri Evaluation Board V3 - - tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM - zii,imx7d-rmu2 # ZII RMU2 Board - zii,imx7d-rpu2 # ZII RPU2 Board - const: fsl,imx7d + - description: TQ-Systems TQMa7D SoM on MBa7x board + items: + - const: tq,imx7d-mba7 + - const: tq,imx7d-tqma7 + - const: fsl,imx7d + - description: Compulab SBC-iMX7 is a single board computer based on the Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with @@ -392,6 +643,22 @@ properties: - const: compulab,cl-som-imx7 - const: fsl,imx7d + - description: i.MX7D Boards with Toradex Colibri i.MX7D Module + items: + - enum: + - toradex,colibri-imx7d-aster # Module on Aster Carrier Board + - toradex,colibri-imx7d-eval-v3 # Module on Colibri Evaluation Board V3 + - const: toradex,colibri-imx7d + - const: fsl,imx7d + + - description: i.MX7D Boards with Toradex Colibri i.MX7D eMMC Module + items: + - enum: + - toradex,colibri-imx7d-emmc-aster # Module on Aster Carrier Board + - toradex,colibri-imx7d-emmc-eval-v3 # Module on Colibri Evaluation Board V3 + - const: toradex,colibri-imx7d-emmc + - const: fsl,imx7d + - description: i.MX7ULP based Boards items: - enum: @@ -405,9 +672,16 @@ properties: - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board - fsl,imx8mm-evk # i.MX8MM EVK Board + - kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module - const: fsl,imx8mm + - description: Kontron BL i.MX8MM (N801X S) Board + items: + - const: kontron,imx8mm-n801x-s + - const: kontron,imx8mm-n801x-som + - const: fsl,imx8mm + - description: Variscite VAR-SOM-MX8MM based boards items: - const: variscite,var-som-mx8mm-symphony @@ -491,10 +765,26 @@ properties: - fsl,vf600 - fsl,vf610 - fsl,vf610m4 - - toradex,vf500-colibri_vf50 # Colibri VF50 Module - - toradex,vf500-colibri_vf50-on-eval # Colibri VF50 Module on Colibri Evaluation Board - - toradex,vf610-colibri_vf61 # Colibri VF61 Module - - toradex,vf610-colibri_vf61-on-eval # Colibri VF61 Module on Colibri Evaluation Board + + - description: Toradex Colibri VF50 Module on Colibri Evaluation Board + items: + - const: toradex,vf500-colibri_vf50-on-eval + - const: toradex,vf500-colibri_vf50 + - const: fsl,vf500 + + - description: VF610 based Boards + items: + - enum: + - lwn,bk4 # Liebherr BK4 controller + - phytec,vf610-cosmic # PHYTEC Cosmic/Cosmic+ Board + - fsl,vf610-twr # VF610 Tower Board + - const: fsl,vf610 + + - description: Toradex Colibri VF61 Module on Colibri Evaluation Board + items: + - const: toradex,vf610-colibri_vf61-on-eval + - const: toradex,vf610-colibri_vf61 + - const: fsl,vf610 - description: ZII's VF610 based Boards items: @@ -515,6 +805,7 @@ properties: - ebs-systart,oxalis - fsl,ls1012a-rdb - fsl,ls1012a-frdm + - fsl,ls1012a-frwy - fsl,ls1012a-qds - const: fsl,ls1012a @@ -613,6 +904,15 @@ properties: - enum: - fsl,lx2160a-qds - fsl,lx2160a-rdb + - fsl,lx2162a-qds + - const: fsl,lx2160a + + - description: SolidRun LX2160A based Boards + items: + - enum: + - solidrun,clearfog-cx + - solidrun,honeycomb + - const: solidrun,lx2160a-cex7 - const: fsl,lx2160a - description: S32V234 based Boards diff --git a/dts/Bindings/arm/idle-states.yaml b/dts/Bindings/arm/idle-states.yaml index ea805c1e6b..52bce5dbb1 100644 --- a/dts/Bindings/arm/idle-states.yaml +++ b/dts/Bindings/arm/idle-states.yaml @@ -313,7 +313,7 @@ patternProperties: wakeup-latency-us by this duration. idle-state-name: - $ref: /schemas/types.yaml#definitions/string + $ref: /schemas/types.yaml#/definitions/string description: A string used as a descriptive name for the idle state. diff --git a/dts/Bindings/arm/mediatek.yaml b/dts/Bindings/arm/mediatek.yaml index f736e8c859..53f0d4e3ea 100644 --- a/dts/Bindings/arm/mediatek.yaml +++ b/dts/Bindings/arm/mediatek.yaml @@ -84,6 +84,10 @@ properties: - enum: - mediatek,mt8135-evbp1 - const: mediatek,mt8135 + - items: + - enum: + - mediatek,mt8167-pumpkin + - const: mediatek,mt8167 - description: Google Elm (Acer Chromebook R13) items: - const: google,elm-rev8 diff --git a/dts/Bindings/arm/msm/qcom,llcc.yaml b/dts/Bindings/arm/msm/qcom,llcc.yaml index c3a8604dfa..0a9889debc 100644 --- a/dts/Bindings/arm/msm/qcom,llcc.yaml +++ b/dts/Bindings/arm/msm/qcom,llcc.yaml @@ -23,6 +23,7 @@ properties: enum: - qcom,sc7180-llcc - qcom,sdm845-llcc + - qcom,sm8150-llcc reg: items: diff --git a/dts/Bindings/arm/mstar/mstar,smpctrl.yaml b/dts/Bindings/arm/mstar/mstar,smpctrl.yaml new file mode 100644 index 0000000000..599c65980f --- /dev/null +++ b/dts/Bindings/arm/mstar/mstar,smpctrl.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 thingy.jp. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MStar/SigmaStar Armv7 SoC SMP control registers + +maintainers: + - Daniel Palmer <daniel@thingy.jp> + +description: | + MStar/SigmaStar's Armv7 SoCs that have more than one processor + have a region of registers that allow setting the boot address + and a magic number that allows secondary processors to leave + the loop they are parked in by the boot ROM. + +properties: + compatible: + items: + - enum: + - sstar,ssd201-smpctrl # SSD201/SSD202D + - const: mstar,smpctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + smpctrl@204000 { + compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; + reg = <0x204000 0x200>; + }; diff --git a/dts/Bindings/arm/mstar/mstar.yaml b/dts/Bindings/arm/mstar/mstar.yaml index 7c787405bb..61d08c473e 100644 --- a/dts/Bindings/arm/mstar/mstar.yaml +++ b/dts/Bindings/arm/mstar/mstar.yaml @@ -20,6 +20,12 @@ properties: - thingyjp,breadbee-crust # thingy.jp BreadBee Crust - const: mstar,infinity + - description: infinity2m boards + items: + - enum: + - honestar,ssd201htv2 # Honestar SSD201_HT_V2 devkit + - const: mstar,infinity2m + - description: infinity3 boards items: - enum: diff --git a/dts/Bindings/arm/picoxcell.txt b/dts/Bindings/arm/picoxcell.txt deleted file mode 100644 index e75c0ef51e..0000000000 --- a/dts/Bindings/arm/picoxcell.txt +++ /dev/null @@ -1,24 +0,0 @@ -Picochip picoXcell device tree bindings. -======================================== - -Required root node properties: - - compatible: - - "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device. - - "picochip,pc7302-pc3x2" : PC7302 development board with PC3X2 device. - - "picochip,pc3x3" : picoXcell PC3X3 device based board. - - "picochip,pc3x2" : picoXcell PC3X2 device based board. - -Timers required properties: - - compatible = "picochip,pc3x2-timer" - - interrupts : The single IRQ line for the timer. - - clock-freq : The frequency in HZ of the timer. - - reg : The register bank for the timer. - -Note: two timers are required - one for the scheduler clock and one for the -event tick/NOHZ. - -VIC required properties: - - compatible = "arm,pl192-vic". - - interrupt-controller. - - reg : The register bank for the device. - - #interrupt-cells : Must be 1. diff --git a/dts/Bindings/arm/renesas.yaml b/dts/Bindings/arm/renesas.yaml index ff94c45eef..fe11be6503 100644 --- a/dts/Bindings/arm/renesas.yaml +++ b/dts/Bindings/arm/renesas.yaml @@ -245,6 +245,7 @@ properties: - enum: - renesas,r8a7795 - renesas,r8a7796 + - renesas,r8a77961 - renesas,r8a77965 - description: R-Car M3-N (R8A77965) diff --git a/dts/Bindings/arm/rockchip.yaml b/dts/Bindings/arm/rockchip.yaml index b621752aaa..ef4544ad6f 100644 --- a/dts/Bindings/arm/rockchip.yaml +++ b/dts/Bindings/arm/rockchip.yaml @@ -70,6 +70,24 @@ properties: - const: elgin,rv1108-r1 - const: rockchip,rv1108 + - description: Engicam PX30.Core C.TOUCH 2.0 + items: + - const: engicam,px30-core-ctouch2 + - const: engicam,px30-core + - const: rockchip,px30 + + - description: Engicam PX30.Core C.TOUCH 2.0 10.1" Open Frame + items: + - const: engicam,px30-core-ctouch2-of10 + - const: engicam,px30-core + - const: rockchip,px30 + + - description: Engicam PX30.Core EDIMM2.2 Starter Kit + items: + - const: engicam,px30-core-edimm2.2 + - const: engicam,px30-core + - const: rockchip,px30 + - description: Firefly Firefly-RK3288 items: - enum: @@ -381,6 +399,11 @@ properties: - khadas,edge-v - const: rockchip,rk3399 + - description: Kobol Helios64 + items: + - const: kobol,helios64 + - const: rockchip,rk3399 + - description: Mecer Xtreme Mini S6 items: - const: mecer,xms6 diff --git a/dts/Bindings/arm/samsung/samsung-boards.yaml b/dts/Bindings/arm/samsung/samsung-boards.yaml index 272508010b..0796f0c877 100644 --- a/dts/Bindings/arm/samsung/samsung-boards.yaml +++ b/dts/Bindings/arm/samsung/samsung-boards.yaml @@ -14,6 +14,19 @@ properties: const: '/' compatible: oneOf: + - description: S3C2416 based boards + items: + - enum: + - samsung,smdk2416 # Samsung SMDK2416 + - const: samsung,s3c2416 + + - description: S3C6410 based boards + items: + - enum: + - friendlyarm,mini6410 # FriendlyARM Mini6410 + - samsung,smdk6410 # Samsung SMDK6410 + - const: samsung,s3c6410 + - description: S5PV210 based boards items: - enum: @@ -83,6 +96,14 @@ properties: - const: samsung,exynos4412 - const: samsung,exynos4 + - description: Samsung p4note family boards + items: + - enum: + - samsung,n8010 # Samsung GT-N8010/GT-N8013 + - const: samsung,p4note + - const: samsung,exynos4412 + - const: samsung,exynos4 + - description: Exynos5250 based boards items: - enum: diff --git a/dts/Bindings/arm/stm32/st,stm32-syscon.yaml b/dts/Bindings/arm/stm32/st,stm32-syscon.yaml index 6f1cd0103c..149afb5df5 100644 --- a/dts/Bindings/arm/stm32/st,stm32-syscon.yaml +++ b/dts/Bindings/arm/stm32/st,stm32-syscon.yaml @@ -19,7 +19,12 @@ properties: - st,stm32mp151-pwr-mcu - st,stm32-syscfg - st,stm32-power-config + - st,stm32-tamp - const: syscon + - items: + - const: st,stm32-tamp + - const: syscon + - const: simple-mfd reg: maxItems: 1 diff --git a/dts/Bindings/arm/stm32/stm32.yaml b/dts/Bindings/arm/stm32/stm32.yaml index 009b424e45..e7525a3395 100644 --- a/dts/Bindings/arm/stm32/stm32.yaml +++ b/dts/Bindings/arm/stm32/stm32.yaml @@ -14,6 +14,20 @@ properties: const: "/" compatible: oneOf: + - description: DH STM32MP1 SoM based Boards + items: + - enum: + - arrow,stm32mp157a-avenger96 # Avenger96 + - dh,stm32mp153c-dhcom-drc02 + - dh,stm32mp157c-dhcom-pdk2 + - dh,stm32mp157c-dhcom-picoitx + - enum: + - dh,stm32mp153c-dhcom-som + - dh,stm32mp157a-dhcor-som + - dh,stm32mp157c-dhcom-som + - enum: + - st,stm32mp153 + - st,stm32mp157 - items: - enum: - st,stm32f429i-disco @@ -39,8 +53,6 @@ properties: - const: st,stm32h743 - items: - enum: - - arrow,stm32mp157a-avenger96 # Avenger96 - - lxa,stm32mp157c-mc1 - shiratech,stm32mp157a-iot-box # IoT Box - shiratech,stm32mp157a-stinger96 # Stinger96 - st,stm32mp157c-ed1 @@ -52,6 +64,13 @@ properties: - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 + - description: Octavo OSD32MP15x System-in-Package based boards + items: + - enum: + - lxa,stm32mp157c-mc1 # Linux Automation MC-1 + - const: oct,stm32mp15xx-osd32 + - enum: + - st,stm32mp157 - description: Odyssey STM32MP1 SoM based Boards items: - enum: diff --git a/dts/Bindings/arm/sunxi.yaml b/dts/Bindings/arm/sunxi.yaml index cab8e1b641..6db32fbf81 100644 --- a/dts/Bindings/arm/sunxi.yaml +++ b/dts/Bindings/arm/sunxi.yaml @@ -201,6 +201,19 @@ properties: - const: dserve,dsrv9703c - const: allwinner,sun4i-a10 + - description: Elimo Engineering Impetus SoM + items: + - const: elimo,impetus + - const: sochip,s3 + - const: allwinner,sun8i-v3 + + - description: Elimo Engineering Initium + items: + - const: elimo,initium + - const: elimo,impetus + - const: sochip,s3 + - const: allwinner,sun8i-v3 + - description: Empire Electronix D709 Tablet items: - const: empire-electronix,d709 @@ -251,6 +264,16 @@ properties: - const: friendlyarm,nanopi-neo-plus2 - const: allwinner,sun50i-h5 + - description: FriendlyARM NanoPi R1 + items: + - const: friendlyarm,nanopi-r1 + - const: allwinner,sun8i-h3 + + - description: FriendlyARM ZeroPi + items: + - const: friendlyarm,zeropi + - const: allwinner,sun8i-h3 + - description: Gemei G9 Tablet items: - const: gemei,g9 diff --git a/dts/Bindings/arm/tegra.yaml b/dts/Bindings/arm/tegra.yaml index 767e86354c..c5fbf869aa 100644 --- a/dts/Bindings/arm/tegra.yaml +++ b/dts/Bindings/arm/tegra.yaml @@ -72,6 +72,9 @@ properties: - const: asus,grouper - const: nvidia,tegra30 - items: + - const: ouya,ouya + - const: nvidia,tegra30 + - items: - enum: - nvidia,dalmore - nvidia,roth diff --git a/dts/Bindings/arm/tegra/nvidia,tegra30-actmon.txt b/dts/Bindings/arm/tegra/nvidia,tegra30-actmon.txt index ea670a5d7e..897eedfa2b 100644 --- a/dts/Bindings/arm/tegra/nvidia,tegra30-actmon.txt +++ b/dts/Bindings/arm/tegra/nvidia,tegra30-actmon.txt @@ -18,8 +18,30 @@ clock-names. See ../../clock/clock-bindings.txt for details. ../../reset/reset.txt for details. - reset-names: Must include the following entries: - actmon +- operating-points-v2: See ../bindings/opp/opp.txt for details. +- interconnects: Should contain entries for memory clients sitting on + MC->EMC memory interconnect path. +- interconnect-names: Should include name of the interconnect path for each + interconnect entry. Consult TRM documentation for + information about available memory clients, see MEMORY + CONTROLLER section. + +For each opp entry in 'operating-points-v2' table: +- opp-supported-hw: bitfield indicating SoC speedo ID mask +- opp-peak-kBps: peak bandwidth of the memory channel Example: + dfs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp@12750000 { + opp-hz = /bits/ 64 <12750000>; + opp-supported-hw = <0x000F>; + opp-peak-kBps = <51000>; + }; + ... + }; + actmon@6000c800 { compatible = "nvidia,tegra124-actmon"; reg = <0x0 0x6000c800 0x0 0x400>; @@ -29,4 +51,7 @@ Example: clock-names = "actmon", "emc"; resets = <&tegra_car 119>; reset-names = "actmon"; + operating-points-v2 = <&dfs_opp_table>; + interconnects = <&mc TEGRA124_MC_MPCORER &emc>; + interconnect-names = "cpu"; }; diff --git a/dts/Bindings/arm/vt8500.yaml b/dts/Bindings/arm/vt8500.yaml index 29ff399551..7b762bfc11 100644 --- a/dts/Bindings/arm/vt8500.yaml +++ b/dts/Bindings/arm/vt8500.yaml @@ -21,6 +21,5 @@ properties: - wm,wm8650 - wm,wm8750 - wm,wm8850 - -additionalProperties: true +additionalProperties: true diff --git a/dts/Bindings/auxdisplay/modtronix,lcd2s.yaml b/dts/Bindings/auxdisplay/modtronix,lcd2s.yaml new file mode 100644 index 0000000000..a1d55a2634 --- /dev/null +++ b/dts/Bindings/auxdisplay/modtronix,lcd2s.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/auxdisplay/modtronix,lcd2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Modtronix engineering LCD2S Character LCD Display + +maintainers: + - Lars Poeschel <poeschel@lemonage.de> + +description: + The LCD2S is a Character LCD Display manufactured by Modtronix Engineering. + The display supports a serial I2C and SPI interface. The driver currently + only supports the I2C interface. + +properties: + compatible: + const: modtronix,lcd2s + + reg: + maxItems: 1 + description: + I2C bus address of the display. + + display-height-chars: + description: Height of the display, in character cells. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 4 + + display-width-chars: + description: Width of the display, in character cells. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 16 + maximum: 20 + +required: + - compatible + - reg + - display-height-chars + - display-width-chars + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + lcd2s: auxdisplay@28 { + compatible = "modtronix,lcd2s"; + reg = <0x28>; + display-height-chars = <4>; + display-width-chars = <20>; + }; + }; diff --git a/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml b/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml index 0503651cd2..863a287ebc 100644 --- a/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml +++ b/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -34,7 +34,7 @@ properties: description: The SRAM that needs to be claimed to access the display engine bus. - $ref: /schemas/types.yaml#definitions/phandle-array + $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 ranges: true diff --git a/dts/Bindings/bus/baikal,bt1-axi.yaml b/dts/Bindings/bus/baikal,bt1-axi.yaml index 0bee469457..4ac78b44e4 100644 --- a/dts/Bindings/bus/baikal,bt1-axi.yaml +++ b/dts/Bindings/bus/baikal,bt1-axi.yaml @@ -46,7 +46,7 @@ properties: const: 1 syscon: - $ref: /schemas/types.yaml#definitions/phandle + $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to the Baikal-T1 System Controller DT node interrupts: diff --git a/dts/Bindings/bus/nvidia,tegra210-aconnect.txt b/dts/Bindings/bus/nvidia,tegra210-aconnect.txt deleted file mode 100644 index 3108d03802..0000000000 --- a/dts/Bindings/bus/nvidia,tegra210-aconnect.txt +++ /dev/null @@ -1,44 +0,0 @@ -NVIDIA Tegra ACONNECT Bus - -The Tegra ACONNECT bus is an AXI switch which is used to connnect various -components inside the Audio Processing Engine (APE). All CPU accesses to -the APE subsystem go through the ACONNECT via an APB to AXI wrapper. - -Required properties: -- compatible: Must be "nvidia,tegra210-aconnect". -- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE), - and APE interface clock (TEGRA210_CLK_APB2APE). -- clock-names: Must contain the names "ape" and "apb2ape" for the corresponding - 'clocks' entries. -- power-domains: Must contain a phandle that points to the audio powergate - (namely 'aud') for Tegra210. -- #address-cells: The number of cells used to represent physical base addresses - in the aconnect address space. Should be 1. -- #size-cells: The number of cells used to represent the size of an address - range in the aconnect address space. Should be 1. -- ranges: Mapping of the aconnect address space to the CPU address space. - -All devices accessed via the ACONNNECT are described by child-nodes. - -Example: - - aconnect@702c0000 { - compatible = "nvidia,tegra210-aconnect"; - clocks = <&tegra_car TEGRA210_CLK_APE>, - <&tegra_car TEGRA210_CLK_APB2APE>; - clock-names = "ape", "apb2ape"; - power-domains = <&pd_audio>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; - - - child1 { - ... - }; - - child2 { - ... - }; - }; diff --git a/dts/Bindings/bus/nvidia,tegra210-aconnect.yaml b/dts/Bindings/bus/nvidia,tegra210-aconnect.yaml new file mode 100644 index 0000000000..7b1a08c62a --- /dev/null +++ b/dts/Bindings/bus/nvidia,tegra210-aconnect.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra ACONNECT Bus + +description: | + The Tegra ACONNECT bus is an AXI switch which is used to connnect various + components inside the Audio Processing Engine (APE). All CPU accesses to + the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All + devices accessed via the ACONNNECT are described by child-nodes. + +maintainers: + - Jon Hunter <jonathanh@nvidia.com> + +properties: + compatible: + oneOf: + - const: nvidia,tegra210-aconnect + - items: + - enum: + - nvidia,tegra186-aconnect + - nvidia,tegra194-aconnect + - const: nvidia,tegra210-aconnect + + clocks: + items: + - description: Must contain the entry for APE clock + - description: Must contain the entry for APE interface clock + + clock-names: + items: + - const: ape + - const: apb2ape + + power-domains: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "@[0-9a-f]+$": + type: object + +required: + - compatible + - clocks + - clock-names + - power-domains + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + #include<dt-bindings/clock/tegra210-car.h> + + aconnect@702c0000 { + compatible = "nvidia,tegra210-aconnect"; + clocks = <&tegra_car TEGRA210_CLK_APE>, + <&tegra_car TEGRA210_CLK_APB2APE>; + clock-names = "ape", "apb2ape"; + power-domains = <&pd_audio>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x702c0000 0x702c0000 0x00040000>; + + // Child device nodes follow ... + }; + +... diff --git a/dts/Bindings/clock/adi,axi-clkgen.yaml b/dts/Bindings/clock/adi,axi-clkgen.yaml new file mode 100644 index 0000000000..0d06387184 --- /dev/null +++ b/dts/Bindings/clock/adi,axi-clkgen.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/adi,axi-clkgen.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Binding for Analog Devices AXI clkgen pcore clock generator + +maintainers: + - Lars-Peter Clausen <lars@metafoo.de> + - Michael Hennerich <michael.hennerich@analog.com> + +description: | + The axi_clkgen IP core is a software programmable clock generator, + that can be synthesized on various FPGA platforms. + + Link: https://wiki.analog.com/resources/fpga/docs/axi_clkgen + +properties: + compatible: + enum: + - adi,axi-clkgen-2.00.a + + clocks: + description: + Specifies the reference clock(s) from which the output frequency is + derived. This must either reference one clock if only the first clock + input is connected or two if both clock inputs are connected. + minItems: 1 + maxItems: 2 + + '#clock-cells': + const: 0 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller@ff000000 { + compatible = "adi,axi-clkgen-2.00.a"; + #clock-cells = <0>; + reg = <0xff000000 0x1000>; + clocks = <&osc 1>; + }; diff --git a/dts/Bindings/clock/axi-clkgen.txt b/dts/Bindings/clock/axi-clkgen.txt deleted file mode 100644 index aca94fe941..0000000000 --- a/dts/Bindings/clock/axi-clkgen.txt +++ /dev/null @@ -1,25 +0,0 @@ -Binding for the axi-clkgen clock generator - -This binding uses the common clock binding[1]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be "adi,axi-clkgen-1.00.a" or "adi,axi-clkgen-2.00.a". -- #clock-cells : from common clock binding; Should always be set to 0. -- reg : Address and length of the axi-clkgen register set. -- clocks : Phandle and clock specifier for the parent clock(s). This must - either reference one clock if only the first clock input is connected or two - if both clock inputs are connected. For the later case the clock connected - to the first input must be specified first. - -Optional properties: -- clock-output-names : From common clock binding. - -Example: - clock@ff000000 { - compatible = "adi,axi-clkgen"; - #clock-cells = <0>; - reg = <0xff000000 0x1000>; - clocks = <&osc 1>; - }; diff --git a/dts/Bindings/clock/canaan,k210-clk.yaml b/dts/Bindings/clock/canaan,k210-clk.yaml new file mode 100644 index 0000000000..565ca468cb --- /dev/null +++ b/dts/Bindings/clock/canaan,k210-clk.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan Kendryte K210 Clock Device Tree Bindings + +maintainers: + - Damien Le Moal <damien.lemoal@wdc.com> + +description: | + Canaan Kendryte K210 SoC clocks driver bindings. The clock + controller node must be defined as a child node of the K210 + system controller node. + + See also: + - dt-bindings/clock/k210-clk.h + +properties: + compatible: + const: canaan,k210-clk + + clocks: + description: + Phandle of the SoC 26MHz fixed-rate oscillator clock. + + '#clock-cells': + const: 1 + +required: + - compatible + - '#clock-cells' + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/k210-clk.h> + clocks { + in0: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + }; + + /* ... */ + sysclk: clock-controller { + #clock-cells = <1>; + compatible = "canaan,k210-clk"; + clocks = <&in0>; + }; diff --git a/dts/Bindings/clock/fsl,flexspi-clock.yaml b/dts/Bindings/clock/fsl,flexspi-clock.yaml new file mode 100644 index 0000000000..1fa390ee7b --- /dev/null +++ b/dts/Bindings/clock/fsl,flexspi-clock.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,flexspi-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale FlexSPI clock driver for Layerscape SoCs + +maintainers: + - Michael Walle <michael@walle.cc> + +description: + The Freescale Layerscape SoCs have a special FlexSPI clock which is + derived from the platform PLL. + +properties: + compatible: + enum: + - fsl,ls1028a-flexspi-clk + - fsl,lx2160a-flexspi-clk + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + dcfg { + #address-cells = <1>; + #size-cells = <1>; + + fspi_clk: clock-controller@900 { + compatible = "fsl,ls1028a-flexspi-clk"; + reg = <0x900 0x4>; + #clock-cells = <0>; + clocks = <&parentclk>; + clock-output-names = "fspi_clk"; + }; + }; diff --git a/dts/Bindings/clock/imx8qxp-lpcg.yaml b/dts/Bindings/clock/imx8qxp-lpcg.yaml index 33f3010f48..940486ef10 100644 --- a/dts/Bindings/clock/imx8qxp-lpcg.yaml +++ b/dts/Bindings/clock/imx8qxp-lpcg.yaml @@ -21,27 +21,58 @@ description: | The clock consumer should specify the desired clock by having the clock ID in its "clocks" phandle cell. See the full list of clock IDs from: - include/dt-bindings/clock/imx8-clock.h + include/dt-bindings/clock/imx8-lpcg.h properties: compatible: - enum: - - fsl,imx8qxp-lpcg-adma - - fsl,imx8qxp-lpcg-conn - - fsl,imx8qxp-lpcg-dc - - fsl,imx8qxp-lpcg-dsp - - fsl,imx8qxp-lpcg-gpu - - fsl,imx8qxp-lpcg-hsio - - fsl,imx8qxp-lpcg-img - - fsl,imx8qxp-lpcg-lsio - - fsl,imx8qxp-lpcg-vpu - + oneOf: + - const: fsl,imx8qxp-lpcg + - items: + - enum: + - fsl,imx8qm-lpcg + - const: fsl,imx8qxp-lpcg + - enum: + - fsl,imx8qxp-lpcg-adma + - fsl,imx8qxp-lpcg-conn + - fsl,imx8qxp-lpcg-dc + - fsl,imx8qxp-lpcg-dsp + - fsl,imx8qxp-lpcg-gpu + - fsl,imx8qxp-lpcg-hsio + - fsl,imx8qxp-lpcg-img + - fsl,imx8qxp-lpcg-lsio + - fsl,imx8qxp-lpcg-vpu + deprecated: true reg: maxItems: 1 '#clock-cells': const: 1 + clocks: + description: | + Input parent clocks phandle array for each clock + minItems: 1 + maxItems: 8 + + clock-indices: + description: | + An integer array indicating the bit offset for each clock. + Refer to <include/dt-bindings/clock/imx8-lpcg.h> for the + supported LPCG clock indices. + minItems: 1 + maxItems: 8 + + clock-output-names: + description: | + Shall be the corresponding names of the outputs. + NOTE this property must be specified in the same order + as the clock-indices property. + minItems: 1 + maxItems: 8 + + power-domains: + maxItems: 1 + required: - compatible - reg @@ -51,23 +82,33 @@ additionalProperties: false examples: - | - #include <dt-bindings/clock/imx8-clock.h> + #include <dt-bindings/clock/imx8-lpcg.h> #include <dt-bindings/firmware/imx/rsrc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> - clock-controller@5b200000 { - compatible = "fsl,imx8qxp-lpcg-conn"; - reg = <0x5b200000 0xb0000>; + sdhc0_lpcg: clock-controller@5b200000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5b200000 0x10000>; #clock-cells = <1>; + clocks = <&sdhc0_clk IMX_SC_PM_CLK_PER>, + <&conn_ipg_clk>, + <&conn_axi_clk>; + clock-indices = <IMX_LPCG_CLK_0>, + <IMX_LPCG_CLK_4>, + <IMX_LPCG_CLK_5>; + clock-output-names = "sdhc0_lpcg_per_clk", + "sdhc0_lpcg_ipg_clk", + "sdhc0_lpcg_ahb_clk"; + power-domains = <&pd IMX_SC_R_SDHC_0>; }; mmc@5b010000 { compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc"; interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b010000 0x10000>; - clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>; + clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>, + <&sdhc0_lpcg IMX_LPCG_CLK_0>, + <&sdhc0_lpcg IMX_LPCG_CLK_5>; clock-names = "ipg", "per", "ahb"; power-domains = <&pd IMX_SC_R_SDHC_0>; }; diff --git a/dts/Bindings/clock/ingenic,cgu.yaml b/dts/Bindings/clock/ingenic,cgu.yaml index 5dd7ea8a78..c65b9458c0 100644 --- a/dts/Bindings/clock/ingenic,cgu.yaml +++ b/dts/Bindings/clock/ingenic,cgu.yaml @@ -92,7 +92,7 @@ required: patternProperties: "^usb-phy@[a-f0-9]+$": - allOf: [ $ref: "../usb/ingenic,jz4770-phy.yaml#" ] + allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ] additionalProperties: false diff --git a/dts/Bindings/clock/qcom,aoncc-sm8250.yaml b/dts/Bindings/clock/qcom,aoncc-sm8250.yaml new file mode 100644 index 0000000000..c40a74b5d6 --- /dev/null +++ b/dts/Bindings/clock/qcom,aoncc-sm8250.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: | + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list + of Audio Clock controller clock IDs. + +properties: + compatible: + const: qcom,sm8250-lpass-aon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: LPASS Core voting clock + - description: Glitch Free Mux register clock + + clock-names: + items: + - const: core + - const: bus + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> + #include <dt-bindings/sound/qcom,q6afe.h> + clock-controller@3800000 { + #clock-cells = <1>; + compatible = "qcom,sm8250-lpass-aon"; + reg = <0x03380000 0x40000>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "bus"; + }; diff --git a/dts/Bindings/clock/qcom,audiocc-sm8250.yaml b/dts/Bindings/clock/qcom,audiocc-sm8250.yaml new file mode 100644 index 0000000000..915d76206a --- /dev/null +++ b/dts/Bindings/clock/qcom,audiocc-sm8250.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: | + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list + of Audio Clock controller clock IDs. + +properties: + compatible: + const: qcom,sm8250-lpass-audiocc + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: LPASS Core voting clock + - description: Glitch Free Mux register clock + + clock-names: + items: + - const: core + - const: bus + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h> + #include <dt-bindings/sound/qcom,q6afe.h> + clock-controller@3300000 { + #clock-cells = <1>; + compatible = "qcom,sm8250-lpass-audiocc"; + reg = <0x03300000 0x30000>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "bus"; + }; diff --git a/dts/Bindings/clock/qcom,gcc-sdx55.yaml b/dts/Bindings/clock/qcom,gcc-sdx55.yaml new file mode 100644 index 0000000000..1121b3934c --- /dev/null +++ b/dts/Bindings/clock/qcom,gcc-sdx55.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for SDX55 + +maintainers: + - Vinod Koul <vkoul@kernel.org> + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on SDX55 + + See also: + - dt-bindings/clock/qcom,gcc-sdx55.h + +properties: + compatible: + const: qcom,gcc-sdx55 + + clocks: + items: + - description: Board XO source + - description: Sleep clock source + - description: PLL test clock source (Optional clock) + minItems: 2 + maxItems: 3 + + clock-names: + items: + - const: bi_tcxo + - const: sleep_clk + - const: core_bi_pll_test_se # Optional clock + minItems: 2 + maxItems: 3 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@100000 { + compatible = "qcom,gcc-sdx55"; + reg = <0x00100000 0x1f0000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, <&pll_test_clk>; + clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + +... diff --git a/dts/Bindings/clock/qcom,rpmhcc.yaml b/dts/Bindings/clock/qcom,rpmhcc.yaml index a46a3a799a..12c9cbc0eb 100644 --- a/dts/Bindings/clock/qcom,rpmhcc.yaml +++ b/dts/Bindings/clock/qcom,rpmhcc.yaml @@ -19,8 +19,10 @@ properties: enum: - qcom,sc7180-rpmh-clk - qcom,sdm845-rpmh-clk + - qcom,sdx55-rpmh-clk - qcom,sm8150-rpmh-clk - qcom,sm8250-rpmh-clk + - qcom,sm8350-rpmh-clk clocks: maxItems: 1 diff --git a/dts/Bindings/clock/qcom,sc7180-camcc.yaml b/dts/Bindings/clock/qcom,sc7180-camcc.yaml new file mode 100644 index 0000000000..f49027edfc --- /dev/null +++ b/dts/Bindings/clock/qcom,sc7180-camcc.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7180-camcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Camera Clock & Reset Controller Binding for SC7180 + +maintainers: + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm camera clock control module which supports the clocks, resets and + power domains on SC7180. + + See also: + - dt-bindings/clock/qcom,camcc-sc7180.h + +properties: + compatible: + const: qcom,sc7180-camcc + + clocks: + items: + - description: Board XO source + - description: Camera_ahb clock from GCC + - description: Camera XO clock from GCC + + clock-names: + items: + - const: bi_tcxo + - const: iface + - const: xo + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc7180.h> + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@ad00000 { + compatible = "qcom,sc7180-camcc"; + reg = <0x0ad00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_XO_CLK>; + clock-names = "bi_tcxo", "iface", "xo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/dts/Bindings/clock/renesas,rcar-usb2-clock-sel.txt b/dts/Bindings/clock/renesas,rcar-usb2-clock-sel.txt deleted file mode 100644 index da92f5748d..0000000000 --- a/dts/Bindings/clock/renesas,rcar-usb2-clock-sel.txt +++ /dev/null @@ -1,68 +0,0 @@ -* Renesas R-Car USB 2.0 clock selector - -This file provides information on what the device node for the R-Car USB 2.0 -clock selector. - -If you connect an external clock to the USB_EXTAL pin only, you should set -the clock rate to "usb_extal" node only. -If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module -is not needed because this is default setting. (Of course, you can set the -clock rates to both "usb_extal" and "usb_xtal" nodes. - -Case 1: An external clock connects to R-Car SoC - +----------+ +--- R-Car ---------------------+ - |External |---|USB_EXTAL ---> all usb channels| - |clock | |USB_XTAL | - +----------+ +-------------------------------+ -In this case, we need this driver with "usb_extal" clock. - -Case 2: An oscillator connects to R-Car SoC - +----------+ +--- R-Car ---------------------+ - |Oscillator|---|USB_EXTAL -+-> all usb channels| - | |---|USB_XTAL --+ | - +----------+ +-------------------------------+ -In this case, we don't need this selector. - -Required properties: -- compatible: "renesas,r8a7795-rcar-usb2-clock-sel" if the device is a part of - an R8A7795 SoC. - "renesas,r8a7796-rcar-usb2-clock-sel" if the device if a part of - an R8A77960 SoC. - "renesas,r8a77961-rcar-usb2-clock-sel" if the device if a part of - an R8A77961 SoC. - "renesas,rcar-gen3-usb2-clock-sel" for a generic R-Car Gen3 - compatible device. - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first - followed by the generic version. - -- reg: offset and length of the USB 2.0 clock selector register block. -- clocks: A list of phandles and specifier pairs. -- clock-names: Name of the clocks. - - The functional clock of USB 2.0 host side must be "ehci_ohci" - - The functional clock of HS-USB side must be "hs-usb-if" - - The USB_EXTAL clock pin must be "usb_extal" - - The USB_XTAL clock pin must be "usb_xtal" -- #clock-cells: Must be 0 -- power-domains: A phandle and symbolic PM domain specifier. - See power/renesas,rcar-sysc.yaml. -- resets: A list of phandles and specifier pairs. -- reset-names: Name of the resets. - - The reset of USB 2.0 host side must be "ehci_ohci" - - The reset of HS-USB side must be "hs-usb-if" - -Example (R-Car H3): - - usb2_clksel: clock-controller@e6590630 { - compatible = "renesas,r8a7795-rcar-usb2-clock-sel", - "renesas,rcar-gen3-usb2-clock-sel"; - reg = <0 0xe6590630 0 0x02>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, - <&usb_extal>, <&usb_xtal>; - clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal"; - #clock-cells = <0>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - reset-names = "ehci_ohci", "hs-usb-if"; - }; diff --git a/dts/Bindings/clock/renesas,rcar-usb2-clock-sel.yaml b/dts/Bindings/clock/renesas,rcar-usb2-clock-sel.yaml new file mode 100644 index 0000000000..5be1229b3d --- /dev/null +++ b/dts/Bindings/clock/renesas,rcar-usb2-clock-sel.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas R-Car USB 2.0 clock selector + +maintainers: + - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> + +description: | + If you connect an external clock to the USB_EXTAL pin only, you should set + the clock rate to "usb_extal" node only. + If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module + is not needed because this is default setting. (Of course, you can set the + clock rates to both "usb_extal" and "usb_xtal" nodes. + + Case 1: An external clock connects to R-Car SoC + +----------+ +--- R-Car ---------------------+ + |External |---|USB_EXTAL ---> all usb channels| + |clock | |USB_XTAL | + +----------+ +-------------------------------+ + + In this case, we need this driver with "usb_extal" clock. + + Case 2: An oscillator connects to R-Car SoC + +----------+ +--- R-Car ---------------------+ + |Oscillator|---|USB_EXTAL -+-> all usb channels| + | |---|USB_XTAL --+ | + +----------+ +-------------------------------+ + In this case, we don't need this selector. + +properties: + compatible: + items: + - enum: + - renesas,r8a7795-rcar-usb2-clock-sel # R-Car H3 + - renesas,r8a7796-rcar-usb2-clock-sel # R-Car M3-W + - renesas,r8a77961-rcar-usb2-clock-sel # R-Car M3-W+ + - const: renesas,rcar-gen3-usb2-clock-sel + + reg: + maxItems: 1 + + clocks: + minItems: 4 + maxItems: 4 + + clock-names: + items: + - const: ehci_ohci + - const: hs-usb-if + - const: usb_extal + - const: usb_xtal + + '#clock-cells': + const: 0 + + power-domains: + maxItems: 1 + + resets: + minItems: 2 + maxItems: 2 + + reset-names: + items: + - const: ehci_ohci + - const: hs-usb-if + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - power-domains + - resets + - reset-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r8a7795-cpg-mssr.h> + #include <dt-bindings/power/r8a7795-sysc.h> + + usb2_clksel: clock-controller@e6590630 { + compatible = "renesas,r8a7795-rcar-usb2-clock-sel", + "renesas,rcar-gen3-usb2-clock-sel"; + reg = <0xe6590630 0x02>; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, + <&usb_extal>, <&usb_xtal>; + clock-names = "ehci_ohci", "hs-usb-if", "usb_extal", "usb_xtal"; + #clock-cells = <0>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 703>, <&cpg 704>; + reset-names = "ehci_ohci", "hs-usb-if"; + }; diff --git a/dts/Bindings/clock/sifive/fu740-prci.yaml b/dts/Bindings/clock/sifive/fu740-prci.yaml new file mode 100644 index 0000000000..e17143cac3 --- /dev/null +++ b/dts/Bindings/clock/sifive/fu740-prci.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sifive/fu740-prci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive FU740 Power Reset Clock Interrupt Controller (PRCI) + +maintainers: + - Zong Li <zong.li@sifive.com> + - Paul Walmsley <paul.walmsley@sifive.com> + +description: + On the FU740 family of SoCs, most system-wide clock and reset integration + is via the PRCI IP block. + The clock consumer should specify the desired clock via the clock ID + macros defined in include/dt-bindings/clock/sifive-fu740-prci.h. + These macros begin with PRCI_CLK_. + + The hfclk and rtcclk nodes are required, and represent physical + crystals or resonators located on the PCB. These nodes should be present + underneath /, rather than /soc. + +properties: + compatible: + const: sifive,fu740-c000-prci + + reg: + maxItems: 1 + + clocks: + items: + - description: high frequency clock. + - description: RTL clock. + + clock-names: + items: + - const: hfclk + - const: rtcclk + + "#clock-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - "#clock-cells" + +additionalProperties: false + +examples: + - | + prci: clock-controller@10000000 { + compatible = "sifive,fu740-c000-prci"; + reg = <0x10000000 0x1000>; + clocks = <&hfclk>, <&rtcclk>; + #clock-cells = <1>; + }; diff --git a/dts/Bindings/connector/usb-connector.yaml b/dts/Bindings/connector/usb-connector.yaml index 728f82db07..4286ed767a 100644 --- a/dts/Bindings/connector/usb-connector.yaml +++ b/dts/Bindings/connector/usb-connector.yaml @@ -37,7 +37,7 @@ properties: description: Size of the connector, should be specified in case of non-fullsize 'usb-a-connector' or 'usb-b-connector' compatible connectors. - $ref: /schemas/types.yaml#definitions/string + $ref: /schemas/types.yaml#/definitions/string enum: - mini @@ -67,7 +67,7 @@ properties: power-role: description: Determines the power role that the Type C connector will support. "dual" refers to Dual Role Port (DRP). - $ref: /schemas/types.yaml#definitions/string + $ref: /schemas/types.yaml#/definitions/string enum: - source @@ -76,7 +76,7 @@ properties: try-power-role: description: Preferred power role. - $ref: /schemas/types.yaml#definitions/string + $ref: /schemas/types.yaml#/definitions/string enum: - source @@ -86,13 +86,31 @@ properties: data-role: description: Data role if Type C connector supports USB data. "dual" refers Dual Role Device (DRD). - $ref: /schemas/types.yaml#definitions/string + $ref: /schemas/types.yaml#/definitions/string enum: - host - device - dual + typec-power-opmode: + description: Determines the power operation mode that the Type C connector + will support and will advertise through CC pins when it has no power + delivery support. + - "default" corresponds to default USB voltage and current defined by the + USB 2.0 and USB 3.2 specifications, 5V 500mA for USB 2.0 ports and + 5V 900mA or 1500mA for USB 3.2 ports in single-lane or dual-lane + operation respectively. + - "1.5A" and "3.0A", 5V 1.5A and 5V 3.0A respectively, as defined in USB + Type-C Cable and Connector specification, when Power Delivery is not + supported. + allOf: + - $ref: /schemas/types.yaml#/definitions/string + enum: + - default + - 1.5A + - 3.0A + # The following are optional properties for "usb-c-connector" with power # delivery support. source-pdos: @@ -147,6 +165,25 @@ properties: required: - port@0 + new-source-frs-typec-current: + description: Initial current capability of the new source when vSafe5V + is applied during PD3.0 Fast Role Swap. "Table 6-14 Fixed Supply PDO - Sink" + of "USB Power Delivery Specification Revision 3.0, Version 1.2" provides the + different power levels and "6.4.1.3.1.6 Fast Role Swap USB Type-C Current" + provides a detailed description of the field. The sink PDO from current source + reflects the current source's(i.e. transmitter of the FRS signal) power + requirement during fr swap. The current sink (i.e. receiver of the FRS signal), + a.k.a new source, should check if it will be able to satisfy the current source's, + new sink's, requirement during frswap before enabling the frs signal reception. + This property refers to maximum current capability that the current sink can + satisfy. During FRS, VBUS voltage is at 5V, as the partners are in implicit + contract, hence, the power level is only a function of the current capability. + "1" refers to default USB power level as described by "Table 6-14 Fixed Supply PDO - Sink". + "2" refers to 1.5A@5V. + "3" refers to 3.0A@5V. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 3] + required: - compatible @@ -173,6 +210,12 @@ allOf: type: const: micro +anyOf: + - not: + required: + - typec-power-opmode + - new-source-frs-typec-current + additionalProperties: true examples: diff --git a/dts/Bindings/crypto/intel,keembay-ocs-aes.yaml b/dts/Bindings/crypto/intel,keembay-ocs-aes.yaml new file mode 100644 index 0000000000..ee2c099981 --- /dev/null +++ b/dts/Bindings/crypto/intel,keembay-ocs-aes.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Keem Bay OCS AES Device Tree Bindings + +maintainers: + - Daniele Alessandrelli <daniele.alessandrelli@intel.com> + +description: + The Intel Keem Bay Offload and Crypto Subsystem (OCS) AES engine provides + hardware-accelerated AES/SM4 encryption/decryption. + +properties: + compatible: + const: intel,keembay-ocs-aes + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + crypto@30008000 { + compatible = "intel,keembay-ocs-aes"; + reg = <0x30008000 0x1000>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 95>; + }; diff --git a/dts/Bindings/crypto/picochip-spacc.txt b/dts/Bindings/crypto/picochip-spacc.txt deleted file mode 100644 index df1151f877..0000000000 --- a/dts/Bindings/crypto/picochip-spacc.txt +++ /dev/null @@ -1,21 +0,0 @@ -Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings - -Picochip picoXcell devices contain crypto offload engines that may be used for -IPSEC and femtocell layer 2 ciphering. - -Required properties: - - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine - "picochip,spacc-l2" for the femtocell layer 2 ciphering engine. - - reg : Offset and length of the register set for this device - - interrupts : The interrupt line from the SPAcc. - - ref-clock : The input clock that drives the SPAcc. - -Example SPAcc node: - -spacc@10000 { - compatible = "picochip,spacc-ipsec"; - reg = <0x100000 0x10000>; - interrupt-parent = <&vic0>; - interrupts = <24>; - ref-clock = <&ipsec_clk>, "ref"; -}; diff --git a/dts/Bindings/devfreq/exynos-bus.txt b/dts/Bindings/devfreq/exynos-bus.txt index e71f752cc1..bcaa2c08ac 100644 --- a/dts/Bindings/devfreq/exynos-bus.txt +++ b/dts/Bindings/devfreq/exynos-bus.txt @@ -51,6 +51,19 @@ Optional properties only for parent bus device: - exynos,saturation-ratio: the percentage value which is used to calibrate the performance count against total cycle count. +Optional properties for the interconnect functionality (QoS frequency +constraints): +- #interconnect-cells: should be 0. +- interconnects: as documented in ../interconnect.txt, describes a path at the + higher level interconnects used by this interconnect provider. + If this interconnect provider is directly linked to a top level interconnect + provider the property contains only one phandle. The provider extends + the interconnect graph by linking its node to a node registered by provider + pointed to by first phandle in the 'interconnects' property. + +- samsung,data-clock-ratio: ratio of the data throughput in B/s to minimum data + clock frequency in Hz, default value is 8 when this property is missing. + Detailed correlation between sub-blocks and power line according to Exynos SoC: - In case of Exynos3250, there are two power line as following: VDD_MIF |--- DMC @@ -135,7 +148,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC: |--- PERIC (Fixed clock rate) |--- FSYS (Fixed clock rate) -Example1: +Example 1: Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to power line (regulator). The MIF (Memory Interface) AXI bus is used to transfer data between DRAM and CPU and uses the VDD_MIF regulator. @@ -184,7 +197,7 @@ Example1: |L5 |200000 |200000 |400000 |300000 | ||1000000 | ---------------------------------------------------------- -Example2 : +Example 2: The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is listed below: @@ -419,3 +432,57 @@ Example2 : devfreq = <&bus_leftbus>; status = "okay"; }; + +Example 3: + An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on + Exynos4412 SoC with video mixer as an interconnect consumer device. + + soc { + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + samsung,data-clock-ratio = <4>; + #interconnect-cells = <0>; + }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_dmc>; + }; + + bus_display: bus_display { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK160>; + clock-names = "bus"; + operating-points-v2 = <&bus_display_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_leftbus &bus_dmc>; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + /* ... */ + } + + bus_leftbus_opp_table: opp_table3 { + compatible = "operating-points-v2"; + /* ... */ + }; + + bus_display_opp_table: opp_table4 { + compatible = "operating-points-v2"; + /* .. */ + }; + + &mixer { + compatible = "samsung,exynos4212-mixer"; + interconnects = <&bus_display &bus_dmc>; + /* ... */ + }; + }; diff --git a/dts/Bindings/display/bridge/analogix,anx7625.yaml b/dts/Bindings/display/bridge/analogix,anx7625.yaml new file mode 100644 index 0000000000..9392b5502a --- /dev/null +++ b/dts/Bindings/display/bridge/analogix,anx7625.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Analogix Semiconductor, Inc. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter) + +maintainers: + - Xin Ji <xji@analogixsemi.com> + +description: | + The ANX7625 is an ultra-low power 4K Mobile HD Transmitter + designed for portable devices. + +properties: + compatible: + items: + - const: analogix,anx7625 + + reg: + maxItems: 1 + + interrupts: + description: used for interrupt pin B8. + maxItems: 1 + + enable-gpios: + description: used for power on chip control, POWER_EN pin D2. + maxItems: 1 + + reset-gpios: + description: used for reset chip control, RESET_N pin B7. + maxItems: 1 + + ports: + type: object + + properties: + port@0: + type: object + description: + Video port for MIPI DSI input. + + port@1: + type: object + description: + Video port for panel or connector. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + encoder@58 { + compatible = "analogix,anx7625"; + reg = <0x58>; + enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi2dp_bridge_in: port@0 { + reg = <0>; + anx7625_in: endpoint { + remote-endpoint = <&mipi_dsi>; + }; + }; + + mipi2dp_bridge_out: port@1 { + reg = <1>; + anx7625_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + }; diff --git a/dts/Bindings/display/bridge/anx6345.yaml b/dts/Bindings/display/bridge/anx6345.yaml index 8c0e4f285f..fccd63521a 100644 --- a/dts/Bindings/display/bridge/anx6345.yaml +++ b/dts/Bindings/display/bridge/anx6345.yaml @@ -26,11 +26,9 @@ properties: description: GPIO connected to active low reset dvdd12-supply: - maxItems: 1 description: Regulator for 1.2V digital core power. dvdd25-supply: - maxItems: 1 description: Regulator for 2.5V digital core power. ports: diff --git a/dts/Bindings/display/bridge/intel,keembay-dsi.yaml b/dts/Bindings/display/bridge/intel,keembay-dsi.yaml new file mode 100644 index 0000000000..35c9dfd866 --- /dev/null +++ b/dts/Bindings/display/bridge/intel,keembay-dsi.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/intel,keembay-dsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Devicetree bindings for Intel Keem Bay mipi dsi controller + +maintainers: + - Anitha Chrisanthus <anitha.chrisanthus@intel.com> + - Edmond J Dea <edmund.j.dea@intel.com> + +properties: + compatible: + const: intel,keembay-dsi + + reg: + items: + - description: MIPI registers range + + reg-names: + items: + - const: mipi + + clocks: + items: + - description: MIPI DSI clock + - description: MIPI DSI econfig clock + - description: MIPI DSI config clock + + clock-names: + items: + - const: clk_mipi + - const: clk_mipi_ecfg + - const: clk_mipi_cfg + + ports: + type: object + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + type: object + description: MIPI DSI input port. + + port@1: + type: object + description: DSI output port. + + required: + - port@0 + - port@1 + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + mipi-dsi@20900000 { + compatible = "intel,keembay-dsi"; + reg = <0x20900000 0x4000>; + reg-names = "mipi"; + clocks = <&scmi_clk 0x86>, + <&scmi_clk 0x88>, + <&scmi_clk 0x89>; + clock-names = "clk_mipi", "clk_mipi_ecfg", + "clk_mipi_cfg"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <&disp_out>; + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint { + remote-endpoint = <&adv7535_input>; + }; + }; + }; + }; diff --git a/dts/Bindings/display/bridge/ite,it6505.yaml b/dts/Bindings/display/bridge/ite,it6505.yaml index efbb3d0117..02cfc0a3b5 100644 --- a/dts/Bindings/display/bridge/ite,it6505.yaml +++ b/dts/Bindings/display/bridge/ite,it6505.yaml @@ -35,11 +35,9 @@ properties: maxItems: 1 ovdd-supply: - maxItems: 1 description: I/O voltage pwr18-supply: - maxItems: 1 description: core voltage interrupts: diff --git a/dts/Bindings/display/bridge/lontium,lt9611.yaml b/dts/Bindings/display/bridge/lontium,lt9611.yaml index d602083592..7a1c89b995 100644 --- a/dts/Bindings/display/bridge/lontium,lt9611.yaml +++ b/dts/Bindings/display/bridge/lontium,lt9611.yaml @@ -4,18 +4,19 @@ $id: http://devicetree.org/schemas/display/bridge/lontium,lt9611.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Lontium LT9611 2 Port MIPI to HDMI Bridge +title: Lontium LT9611(UXC) 2 Port MIPI to HDMI Bridge maintainers: - Vinod Koul <vkoul@kernel.org> description: | - The LT9611 is a bridge device which converts DSI to HDMI + The LT9611 and LT9611UXC are bridge devices which convert DSI to HDMI properties: compatible: enum: - lontium,lt9611 + - lontium,lt9611uxc reg: maxItems: 1 diff --git a/dts/Bindings/display/bridge/lvds-codec.yaml b/dts/Bindings/display/bridge/lvds-codec.yaml index e5e3c72630..66a14d60ce 100644 --- a/dts/Bindings/display/bridge/lvds-codec.yaml +++ b/dts/Bindings/display/bridge/lvds-codec.yaml @@ -79,8 +79,7 @@ properties: The GPIO used to control the power down line of this device. maxItems: 1 - power-supply: - maxItems: 1 + power-supply: true required: - compatible diff --git a/dts/Bindings/display/bridge/ps8640.yaml b/dts/Bindings/display/bridge/ps8640.yaml index 7e27cfcf77..763c790947 100644 --- a/dts/Bindings/display/bridge/ps8640.yaml +++ b/dts/Bindings/display/bridge/ps8640.yaml @@ -35,11 +35,9 @@ properties: description: GPIO connected to active low reset. vdd12-supply: - maxItems: 1 description: Regulator for 1.2V digital core power. vdd33-supply: - maxItems: 1 description: Regulator for 3.3V digital core power. ports: diff --git a/dts/Bindings/display/bridge/sii902x.txt b/dts/Bindings/display/bridge/sii902x.txt index 0d1db3f9da..02c21b5847 100644 --- a/dts/Bindings/display/bridge/sii902x.txt +++ b/dts/Bindings/display/bridge/sii902x.txt @@ -8,6 +8,8 @@ Optional properties: - interrupts: describe the interrupt line used to inform the host about hotplug events. - reset-gpios: OF device-tree gpio specification for RST_N pin. + - iovcc-supply: I/O Supply Voltage (1.8V or 3.3V) + - cvcc12-supply: Digital Core Supply Voltage (1.2V) HDMI audio properties: - #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin @@ -54,6 +56,8 @@ Example: compatible = "sil,sii9022"; reg = <0x39>; reset-gpios = <&pioA 1 0>; + iovcc-supply = <&v3v3_hdmi>; + cvcc12-supply = <&v1v2_hdmi>; #sound-dai-cells = <0>; sil,i2s-data-lanes = < 0 1 2 >; diff --git a/dts/Bindings/display/bridge/simple-bridge.yaml b/dts/Bindings/display/bridge/simple-bridge.yaml index 3ddb35fcf0..64e8a1c24b 100644 --- a/dts/Bindings/display/bridge/simple-bridge.yaml +++ b/dts/Bindings/display/bridge/simple-bridge.yaml @@ -60,7 +60,6 @@ properties: description: GPIO controlling bridge enable vdd-supply: - maxItems: 1 description: Power supply for the bridge required: diff --git a/dts/Bindings/display/bridge/thine,thc63lvd1024.yaml b/dts/Bindings/display/bridge/thine,thc63lvd1024.yaml index 469ac4a342..3d5ce08a57 100644 --- a/dts/Bindings/display/bridge/thine,thc63lvd1024.yaml +++ b/dts/Bindings/display/bridge/thine,thc63lvd1024.yaml @@ -74,7 +74,6 @@ properties: description: Power down GPIO signal, pin name "/PDWN", active low. vcc-supply: - maxItems: 1 description: Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and digital circuitry. diff --git a/dts/Bindings/display/bridge/toshiba,tc358775.yaml b/dts/Bindings/display/bridge/toshiba,tc358775.yaml index fd3113aa9c..b5959cc78b 100644 --- a/dts/Bindings/display/bridge/toshiba,tc358775.yaml +++ b/dts/Bindings/display/bridge/toshiba,tc358775.yaml @@ -28,11 +28,9 @@ properties: description: i2c address of the bridge, 0x0f vdd-supply: - maxItems: 1 description: 1.2V LVDS Power Supply vddio-supply: - maxItems: 1 description: 1.8V IO Power Supply stby-gpios: diff --git a/dts/Bindings/display/imx/fsl-imx-drm.txt b/dts/Bindings/display/imx/fsl-imx-drm.txt index 5a99490c17..3c35338a28 100644 --- a/dts/Bindings/display/imx/fsl-imx-drm.txt +++ b/dts/Bindings/display/imx/fsl-imx-drm.txt @@ -12,7 +12,7 @@ Required properties: example: display-subsystem { - compatible = "fsl,display-subsystem"; + compatible = "fsl,imx-display-subsystem"; ports = <&ipu_di0>; }; diff --git a/dts/Bindings/display/intel,keembay-display.yaml b/dts/Bindings/display/intel,keembay-display.yaml new file mode 100644 index 0000000000..0a697d45c2 --- /dev/null +++ b/dts/Bindings/display/intel,keembay-display.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/intel,keembay-display.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Devicetree bindings for Intel Keem Bay display controller + +maintainers: + - Anitha Chrisanthus <anitha.chrisanthus@intel.com> + - Edmond J Dea <edmund.j.dea@intel.com> + +properties: + compatible: + const: intel,keembay-display + + reg: + items: + - description: LCD registers range + + reg-names: + items: + - const: lcd + + clocks: + items: + - description: LCD controller clock + - description: pll0 clock + + clock-names: + items: + - const: clk_lcd + - const: clk_pll0 + + interrupts: + maxItems: 1 + + port: + type: object + description: Display output node to DSI. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + display@20930000 { + compatible = "intel,keembay-display"; + reg = <0x20930000 0x3000>; + reg-names = "lcd"; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scmi_clk 0x83>, + <&scmi_clk 0x0>; + clock-names = "clk_lcd", "clk_pll0"; + + port { + disp_out: endpoint { + remote-endpoint = <&dsi_in>; + }; + }; + }; diff --git a/dts/Bindings/display/intel,keembay-msscam.yaml b/dts/Bindings/display/intel,keembay-msscam.yaml new file mode 100644 index 0000000000..a222b52d8b --- /dev/null +++ b/dts/Bindings/display/intel,keembay-msscam.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/intel,keembay-msscam.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Devicetree bindings for Intel Keem Bay MSSCAM + +maintainers: + - Anitha Chrisanthus <anitha.chrisanthus@intel.com> + - Edmond J Dea <edmund.j.dea@intel.com> + +description: | + MSSCAM controls local clocks in the display subsystem namely LCD clocks and + MIPI DSI clocks. It also configures the interconnect between LCD and + MIPI DSI. + +properties: + compatible: + items: + - const: intel,keembay-msscam + - const: syscon + + reg: + maxItems: 1 + + reg-io-width: + const: 4 + +required: + - compatible + - reg + - reg-io-width + +additionalProperties: false + +examples: + - | + msscam:msscam@20910000 { + compatible = "intel,keembay-msscam", "syscon"; + reg = <0x20910000 0x30>; + reg-io-width = <4>; + }; diff --git a/dts/Bindings/display/mediatek/mediatek,disp.txt b/dts/Bindings/display/mediatek/mediatek,disp.txt index 121220745d..33977e15be 100644 --- a/dts/Bindings/display/mediatek/mediatek,disp.txt +++ b/dts/Bindings/display/mediatek/mediatek,disp.txt @@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-od" - overdrive - the supported chips are mt2701, mt7623, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712, mt8167 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks). @@ -59,7 +59,7 @@ Required properties (DMA function blocks): "mediatek,<chip>-disp-ovl" "mediatek,<chip>-disp-rdma" "mediatek,<chip>-disp-wdma" - the supported chips are mt2701 and mt8173. + the supported chips are mt2701, mt8167 and mt8173. - larb: Should contain a phandle pointing to the local arbiter device as defined in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt - iommus: Should point to the respective IOMMU block with master port as diff --git a/dts/Bindings/display/mediatek/mediatek,dpi.txt b/dts/Bindings/display/mediatek/mediatek,dpi.txt deleted file mode 100644 index dc1ebd13cc..0000000000 --- a/dts/Bindings/display/mediatek/mediatek,dpi.txt +++ /dev/null @@ -1,42 +0,0 @@ -Mediatek DPI Device -=================== - -The Mediatek DPI function block is a sink of the display subsystem and -provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel -output bus. - -Required properties: -- compatible: "mediatek,<chip>-dpi" - the supported chips are mt2701, mt7623, mt8173 and mt8183. -- reg: Physical base address and length of the controller's registers -- interrupts: The interrupt signal from the function block. -- clocks: device clocks - See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. -- clock-names: must contain "pixel", "engine", and "pll" -- port: Output port node with endpoint definitions as described in - Documentation/devicetree/bindings/graph.txt. This port should be connected - to the input port of an attached HDMI or LVDS encoder chip. - -Optional properties: -- pinctrl-names: Contain "default" and "sleep". - -Example: - -dpi0: dpi@1401d000 { - compatible = "mediatek,mt8173-dpi"; - reg = <0 0x1401d000 0 0x1000>; - interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; - clocks = <&mmsys CLK_MM_DPI_PIXEL>, - <&mmsys CLK_MM_DPI_ENGINE>, - <&apmixedsys CLK_APMIXED_TVDPLL>; - clock-names = "pixel", "engine", "pll"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&dpi_pin_func>; - pinctrl-1 = <&dpi_pin_idle>; - - port { - dpi0_out: endpoint { - remote-endpoint = <&hdmi0_in>; - }; - }; -}; diff --git a/dts/Bindings/display/mediatek/mediatek,dpi.yaml b/dts/Bindings/display/mediatek/mediatek,dpi.yaml new file mode 100644 index 0000000000..6cdb734c91 --- /dev/null +++ b/dts/Bindings/display/mediatek/mediatek,dpi.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: mediatek DPI Controller Device Tree Bindings + +maintainers: + - CK Hu <ck.hu@mediatek.com> + - Jitao shi <jitao.shi@mediatek.com> + +description: | + The Mediatek DPI function block is a sink of the display subsystem and + provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel + output bus. + +properties: + compatible: + enum: + - mediatek,mt2701-dpi + - mediatek,mt7623-dpi + - mediatek,mt8173-dpi + - mediatek,mt8183-dpi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Pixel Clock + - description: Engine Clock + - description: DPI PLL + + clock-names: + items: + - const: pixel + - const: engine + - const: pll + + pinctrl-0: true + pinctrl-1: true + + pinctrl-names: + items: + - const: default + - const: sleep + + port: + type: object + description: + Output port node with endpoint definitions as described in + Documentation/devicetree/bindings/graph.txt. This port should be connected + to the input port of an attached HDMI or LVDS encoder chip. + + properties: + endpoint: + type: object + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + dpi0: dpi@1401d000 { + compatible = "mediatek,mt8173-dpi"; + reg = <0x1401d000 0x1000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DPI_PIXEL>, + <&mmsys CLK_MM_DPI_ENGINE>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dpi_pin_func>; + pinctrl-1 = <&dpi_pin_idle>; + + port { + dpi0_out: endpoint { + remote-endpoint = <&hdmi0_in>; + }; + }; + }; + +... diff --git a/dts/Bindings/display/msm/gpu.txt b/dts/Bindings/display/msm/gpu.txt index 1af0ff102b..090dcb3fc3 100644 --- a/dts/Bindings/display/msm/gpu.txt +++ b/dts/Bindings/display/msm/gpu.txt @@ -39,6 +39,10 @@ Required properties: a4xx Snapdragon SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml. +Optional properties: +- #cooling-cells: The value must be 2. For details, please refer + Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml. + Example 3xx/4xx: / { @@ -61,6 +65,7 @@ Example 3xx/4xx: power-domains = <&mmcc OXILICX_GDSC>; operating-points-v2 = <&gpu_opp_table>; iommus = <&gpu_iommu 0>; + #cooling-cells = <2>; }; gpu_sram: ocmem@fdd00000 { @@ -98,6 +103,8 @@ Example a6xx (with GMU): reg = <0x5000000 0x40000>, <0x509e000 0x10>; reg-names = "kgsl_3d0_reg_memory", "cx_mem"; + #cooling-cells = <2>; + /* * Look ma, no clocks! The GPU clocks and power are * controlled entirely by the GMU diff --git a/dts/Bindings/display/panel/abt,y030xx067a.yaml b/dts/Bindings/display/panel/abt,y030xx067a.yaml new file mode 100644 index 0000000000..a108029ecf --- /dev/null +++ b/dts/Bindings/display/panel/abt,y030xx067a.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/abt,y030xx067a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Asia Better Technology 3.0" (320x480 pixels) 24-bit IPS LCD panel + +description: | + The panel must obey the rules for a SPI slave device as specified in + spi/spi-controller.yaml + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: abt,y030xx067a + + backlight: true + port: true + power-supply: true + reg: true + reset-gpios: true + +required: + - compatible + - reg + - power-supply + - reset-gpios + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "abt,y030xx067a"; + reg = <0>; + + spi-max-frequency = <3125000>; + + reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>; + + backlight = <&backlight>; + power-supply = <&vcc>; + + port { + panel_input: endpoint { + remote-endpoint = <&panel_output>; + }; + }; + }; + }; diff --git a/dts/Bindings/display/panel/novatek,nt36672a.yaml b/dts/Bindings/display/panel/novatek,nt36672a.yaml new file mode 100644 index 0000000000..2f5df1d235 --- /dev/null +++ b/dts/Bindings/display/panel/novatek,nt36672a.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/novatek,nt36672a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Novatek NT36672A based DSI display Panels + +maintainers: + - Sumit Semwal <sumit.semwal@linaro.org> + +description: | + The nt36672a IC from Novatek is a generic DSI Panel IC used to drive dsi + panels. + Right now, support is added only for a Tianma FHD+ LCD display panel with a + resolution of 1080x2246. It is a video mode DSI panel. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - enum: + - tianma,fhd-video + - const: novatek,nt36672a + description: This indicates the panel manufacturer of the panel that is + in turn using the NT36672A panel driver. This compatible string + determines how the NT36672A panel driver is configured for the indicated + panel. The novatek,nt36672a compatible shall always be provided as a fallback. + + reset-gpios: + description: phandle of gpio for reset line - This should be 8mA, gpio + can be configured using mux, pinctrl, pinctrl-names (active high) + + vddio-supply: + description: phandle of the regulator that provides the supply voltage + Power IC supply + + vddpos-supply: + description: phandle of the positive boost supply regulator + + vddneg-supply: + description: phandle of the negative boost supply regulator + + reg: true + port: true + +required: + - compatible + - reg + - vddi0-supply + - vddpos-supply + - vddneg-supply + - reset-gpios + - port + +unevaluatedProperties: false + +examples: + - |+ + #include <dt-bindings/gpio/gpio.h> + + dsi0 { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "tianma,fhd-video", "novatek,nt36672a"; + reg = <0>; + vddi0-supply = <&vreg_l14a_1p88>; + vddpos-supply = <&lab>; + vddneg-supply = <&ibb>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + port { + tianma_nt36672a_in_0: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/panel-simple-dsi.yaml b/dts/Bindings/display/panel/panel-simple-dsi.yaml index c0dd9fa29f..72e4b6d4d5 100644 --- a/dts/Bindings/display/panel/panel-simple-dsi.yaml +++ b/dts/Bindings/display/panel/panel-simple-dsi.yaml @@ -47,6 +47,12 @@ properties: - panasonic,vvx10f004b00 # Panasonic 10" WUXGA TFT LCD panel - panasonic,vvx10f034n00 + # Samsung s6e3fc2x01 1080x2340 AMOLED panel + - samsung,s6e3fc2x01 + # Samsung sofef00 1080x2280 AMOLED panel + - samsung,sofef00 + # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel + - tdo,tl070wsh30 reg: maxItems: 1 @@ -54,6 +60,7 @@ properties: backlight: true enable-gpios: true + reset-gpios: true port: true power-supply: true diff --git a/dts/Bindings/display/panel/panel-simple.yaml b/dts/Bindings/display/panel/panel-simple.yaml index edb53ab0d9..27fffafe5b 100644 --- a/dts/Bindings/display/panel/panel-simple.yaml +++ b/dts/Bindings/display/panel/panel-simple.yaml @@ -159,6 +159,8 @@ properties: - innolux,g121x1-l03 # Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel - innolux,n116bge + # InnoLux 13.3" FHD (1920x1080) eDP TFT LCD panel + - innolux,n125hce-gn1 # InnoLux 15.6" WXGA TFT LCD panel - innolux,n156bge-l21 # Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel @@ -282,6 +284,8 @@ properties: - vxt,vl050-8048nt-c01 # Winstar Display Corporation 3.5" QVGA (320x240) TFT LCD panel - winstar,wf35ltiacd + # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel + - yes-optoelectronics,ytc700tlag-05-201c backlight: true enable-gpios: true diff --git a/dts/Bindings/display/tegra/nvidia,tegra20-host1x.txt b/dts/Bindings/display/tegra/nvidia,tegra20-host1x.txt index ac63ae4a38..34d9933384 100644 --- a/dts/Bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/dts/Bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -20,6 +20,10 @@ Required properties: - reset-names: Must include the following entries: - host1x +Each host1x client module having to perform DMA through the Memory Controller +should have the interconnect endpoints set to the Memory Client and External +Memory respectively. + The host1x top-level node defines a number of children, each representing one of the following host1x client modules: @@ -36,6 +40,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - mpe + Optional properties: + - interconnects: Must contain entry for the MPE memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - vi: video input Required properties: @@ -113,6 +123,12 @@ of the following host1x client modules: Required properties: - remote-endpoint: phandle to vi port 'endpoint' node. + Optional properties: + - interconnects: Must contain entry for the VI memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - epp: encoder pre-processor Required properties: @@ -126,6 +142,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - epp + Optional properties: + - interconnects: Must contain entry for the EPP memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - isp: image signal processor Required properties: @@ -139,6 +161,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - isp + Optional properties: + - interconnects: Must contain entry for the ISP memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - gr2d: 2D graphics engine Required properties: @@ -152,6 +180,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - 2d + Optional properties: + - interconnects: Must contain entry for the GR2D memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - gr3d: 3D graphics engine Required properties: @@ -170,6 +204,12 @@ of the following host1x client modules: - 3d - 3d2 (Only required on SoCs with two 3D clocks) + Optional properties: + - interconnects: Must contain entry for the GR3D memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + - dc: display controller Required properties: @@ -197,6 +237,10 @@ of the following host1x client modules: - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection - nvidia,edid: supplies a binary EDID blob - nvidia,panel: phandle of a display panel + - interconnects: Must contain entry for the DC memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. - hdmi: High Definition Multimedia Interface @@ -345,6 +389,12 @@ of the following host1x client modules: - reset-names: Must include the following entries: - vic + Optional properties: + - interconnects: Must contain entry for the VIC memory clients. + - interconnect-names: Must include name of the interconnect path for each + interconnect entry. Consult TRM documentation for information about + available memory clients, see MEMORY CONTROLLER section. + Example: / { @@ -498,6 +548,15 @@ Example: resets = <&tegra_car 27>; reset-names = "dc"; + interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>, + <&mc TEGRA20_MC_DISPLAY0B &emc>, + <&mc TEGRA20_MC_DISPLAY0C &emc>, + <&mc TEGRA20_MC_DISPLAYHC &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; @@ -513,6 +572,15 @@ Example: resets = <&tegra_car 26>; reset-names = "dc"; + interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>, + <&mc TEGRA20_MC_DISPLAY0BB &emc>, + <&mc TEGRA20_MC_DISPLAY0CB &emc>, + <&mc TEGRA20_MC_DISPLAYHCB &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; + rgb { status = "disabled"; }; diff --git a/dts/Bindings/display/ti/ti,am65x-dss.yaml b/dts/Bindings/display/ti/ti,am65x-dss.yaml index 4f9185462e..4dc30738ee 100644 --- a/dts/Bindings/display/ti/ti,am65x-dss.yaml +++ b/dts/Bindings/display/ti/ti,am65x-dss.yaml @@ -55,6 +55,14 @@ properties: - const: vp1 - const: vp2 + assigned-clocks: + minItems: 1 + maxItems: 3 + + assigned-clock-parents: + minItems: 1 + maxItems: 3 + interrupts: maxItems: 1 @@ -62,6 +70,9 @@ properties: maxItems: 1 description: phandle to the associated power domain + dma-coherent: + type: boolean + ports: type: object description: diff --git a/dts/Bindings/display/ti/ti,j721e-dss.yaml b/dts/Bindings/display/ti/ti,j721e-dss.yaml index 173730d563..c9a947d55f 100644 --- a/dts/Bindings/display/ti/ti,j721e-dss.yaml +++ b/dts/Bindings/display/ti/ti,j721e-dss.yaml @@ -77,6 +77,14 @@ properties: - const: vp3 - const: vp4 + assigned-clocks: + minItems: 1 + maxItems: 5 + + assigned-clock-parents: + minItems: 1 + maxItems: 5 + interrupts: items: - description: common_m DSS Master common @@ -95,6 +103,9 @@ properties: maxItems: 1 description: phandle to the associated power domain + dma-coherent: + type: boolean + ports: type: object description: diff --git a/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml b/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml index 7b9d468c3e..403d57977e 100644 --- a/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml +++ b/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml @@ -98,7 +98,6 @@ properties: maxItems: 1 dmas: - maxItems: 4 items: - description: Video layer, plane 0 (RGB or luma) - description: Video layer, plane 1 (U/V or U) diff --git a/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml b/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml index 372679dbd2..b6e1ebfaf3 100644 --- a/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml +++ b/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -21,6 +21,7 @@ properties: compatible: oneOf: - const: allwinner,sun50i-a64-dma + - const: allwinner,sun50i-a100-dma - const: allwinner,sun50i-h6-dma - items: - const: allwinner,sun8i-r40-dma @@ -56,7 +57,9 @@ required: if: properties: compatible: - const: allwinner,sun50i-h6-dma + enum: + - allwinner,sun50i-a100-dma + - allwinner,sun50i-h6-dma then: properties: diff --git a/dts/Bindings/dma/atmel-xdma.txt b/dts/Bindings/dma/atmel-xdma.txt index 4dc398e1a3..510b7f25ba 100644 --- a/dts/Bindings/dma/atmel-xdma.txt +++ b/dts/Bindings/dma/atmel-xdma.txt @@ -2,7 +2,8 @@ * XDMA Controller Required properties: -- compatible: Should be "atmel,sama5d4-dma" or "microchip,sam9x60-dma". +- compatible: Should be "atmel,sama5d4-dma", "microchip,sam9x60-dma" or + "microchip,sama7g5-dma". - reg: Should contain DMA registers location and length. - interrupts: Should contain DMA interrupt. - #dma-cells: Must be <1>, used to represent the number of integer cells in diff --git a/dts/Bindings/dma/dma-common.yaml b/dts/Bindings/dma/dma-common.yaml index 307b499e89..ad06d36af2 100644 --- a/dts/Bindings/dma/dma-common.yaml +++ b/dts/Bindings/dma/dma-common.yaml @@ -38,12 +38,12 @@ properties: maxItems: 255 dma-channels: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: Number of DMA channels supported by the controller. dma-requests: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: Number of DMA request signals supported by the controller. diff --git a/dts/Bindings/dma/dma-router.yaml b/dts/Bindings/dma/dma-router.yaml index 4cee5667b8..e72748496f 100644 --- a/dts/Bindings/dma/dma-router.yaml +++ b/dts/Bindings/dma/dma-router.yaml @@ -23,7 +23,7 @@ properties: pattern: "^dma-router(@.*)?$" dma-masters: - $ref: /schemas/types.yaml#definitions/phandle-array + $ref: /schemas/types.yaml#/definitions/phandle-array description: Array of phandles to the DMA controllers the router can direct the signal to. diff --git a/dts/Bindings/dma/ingenic,dma.yaml b/dts/Bindings/dma/ingenic,dma.yaml index 00f19b3cac..6a2043721b 100644 --- a/dts/Bindings/dma/ingenic,dma.yaml +++ b/dts/Bindings/dma/ingenic,dma.yaml @@ -48,7 +48,7 @@ properties: ingenic,reserved-channels property. ingenic,reserved-channels: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: > Bitmask of channels to reserve for devices that need a specific channel. These channels will only be assigned when explicitely diff --git a/dts/Bindings/dma/mtk-uart-apdma.txt b/dts/Bindings/dma/mtk-uart-apdma.txt index 2117db0ce4..fef9c1eeb2 100644 --- a/dts/Bindings/dma/mtk-uart-apdma.txt +++ b/dts/Bindings/dma/mtk-uart-apdma.txt @@ -4,6 +4,7 @@ Required properties: - compatible should contain: * "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA * "mediatek,mt6577-uart-dma" for MT6577 and all of the above + * "mediatek,mt8516-uart-dma", "mediatek,mt6577" for MT8516 SoC - reg: The base address of the APDMA register bank. diff --git a/dts/Bindings/dma/nvidia,tegra210-adma.txt b/dts/Bindings/dma/nvidia,tegra210-adma.txt deleted file mode 100644 index 245d306371..0000000000 --- a/dts/Bindings/dma/nvidia,tegra210-adma.txt +++ /dev/null @@ -1,56 +0,0 @@ -* NVIDIA Tegra Audio DMA (ADMA) controller - -The Tegra Audio DMA controller that is used for transferring data -between system memory and the Audio Processing Engine (APE). - -Required properties: -- compatible: Should contain one of the following: - - "nvidia,tegra210-adma": for Tegra210 - - "nvidia,tegra186-adma": for Tegra186 and Tegra194 -- reg: Should contain DMA registers location and length. This should be - a single entry that includes all of the per-channel registers in one - contiguous bank. -- interrupts: Should contain all of the per-channel DMA interrupts in - ascending order with respect to the DMA channel index. -- clocks: Must contain one entry for the ADMA module clock - (TEGRA210_CLK_D_AUDIO). -- clock-names: Must contain the name "d_audio" for the corresponding - 'clocks' entry. -- #dma-cells : Must be 1. The first cell denotes the receive/transmit - request number and should be between 1 and the maximum number of - requests supported. This value corresponds to the RX/TX_REQUEST_SELECT - fields in the ADMA_CHn_CTRL register. - - -Example: - -adma: dma@702e2000 { - compatible = "nvidia,tegra210-adma"; - reg = <0x0 0x702e2000 0x0 0x2000>; - interrupt-parent = <&tegra_agic>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; - clock-names = "d_audio"; - #dma-cells = <1>; -}; diff --git a/dts/Bindings/dma/nvidia,tegra210-adma.yaml b/dts/Bindings/dma/nvidia,tegra210-adma.yaml new file mode 100644 index 0000000000..5c2e2f156e --- /dev/null +++ b/dts/Bindings/dma/nvidia,tegra210-adma.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Audio DMA (ADMA) controller + +description: | + The Tegra Audio DMA controller is used for transferring data + between system memory and the Audio Processing Engine (APE). + +maintainers: + - Jon Hunter <jonathanh@nvidia.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + oneOf: + - enum: + - nvidia,tegra210-adma + - nvidia,tegra186-adma + - items: + - const: nvidia,tegra194-adma + - const: nvidia,tegra186-adma + + reg: + maxItems: 1 + + interrupts: + description: | + Should contain all of the per-channel DMA interrupts in + ascending order with respect to the DMA channel index. + minItems: 1 + maxItems: 32 + + clocks: + description: Must contain one entry for the ADMA module clock + maxItems: 1 + + clock-names: + const: d_audio + + "#dma-cells": + description: | + The first cell denotes the receive/transmit request number and + should be between 1 and the maximum number of requests supported. + This value corresponds to the RX/TX_REQUEST_SELECT fields in the + ADMA_CHn_CTRL register. + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include<dt-bindings/clock/tegra210-car.h> + + dma-controller@702e2000 { + compatible = "nvidia,tegra210-adma"; + reg = <0x702e2000 0x2000>; + interrupt-parent = <&tegra_agic>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; + clock-names = "d_audio"; + #dma-cells = <1>; + }; + +... diff --git a/dts/Bindings/dma/qcom,gpi.yaml b/dts/Bindings/dma/qcom,gpi.yaml new file mode 100644 index 0000000000..f8142adf9a --- /dev/null +++ b/dts/Bindings/dma/qcom,gpi.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies Inc GPI DMA controller + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: | + QCOM GPI DMA controller provides DMA capabilities for + peripheral buses such as I2C, UART, and SPI. + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + enum: + - qcom,sdm845-gpi-dma + + reg: + maxItems: 1 + + interrupts: + description: + Interrupt lines for each GPI instance + maxItems: 13 + + "#dma-cells": + const: 3 + description: > + DMA clients must use the format described in dma.txt, giving a phandle + to the DMA controller plus the following 3 integer cells: + - channel: if set to 0xffffffff, any available channel will be allocated + for the client. Otherwise, the exact channel specified will be used. + - seid: serial id of the client as defined in the SoC documentation. + - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h + + iommus: + maxItems: 1 + + dma-channels: + maximum: 31 + + dma-channel-mask: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + - iommus + - dma-channels + - dma-channel-mask + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/dma/qcom-gpi.h> + gpi_dma0: dma-controller@800000 { + compatible = "qcom,gpi-dma"; + #dma-cells = <3>; + reg = <0x00800000 0x60000>; + iommus = <&apps_smmu 0x0016 0x0>; + dma-channels = <13>; + dma-channel-mask = <0xfa>; + interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; + }; + +... diff --git a/dts/Bindings/dma/renesas,rcar-dmac.yaml b/dts/Bindings/dma/renesas,rcar-dmac.yaml index b548e47239..c07eb6f2fc 100644 --- a/dts/Bindings/dma/renesas,rcar-dmac.yaml +++ b/dts/Bindings/dma/renesas,rcar-dmac.yaml @@ -73,7 +73,6 @@ properties: maxItems: 1 clock-names: - maxItems: 1 items: - const: fck diff --git a/dts/Bindings/dma/snps,dma-spear1340.yaml b/dts/Bindings/dma/snps,dma-spear1340.yaml index ef1d6879c1..6b35089ac0 100644 --- a/dts/Bindings/dma/snps,dma-spear1340.yaml +++ b/dts/Bindings/dma/snps,dma-spear1340.yaml @@ -54,7 +54,7 @@ properties: maximum: 16 dma-masters: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: | Number of DMA masters supported by the controller. In case if not specified the driver will try to auto-detect this and @@ -63,7 +63,7 @@ properties: maximum: 4 chan_allocation_order: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: | DMA channels allocation order specifier. Zero means ascending order (first free allocated), while one - descending (last free allocated). @@ -71,7 +71,7 @@ properties: enum: [0, 1] chan_priority: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: | DMA channels priority order. Zero means ascending channels priority so the very first channel has the highest priority. While 1 means @@ -80,7 +80,7 @@ properties: enum: [0, 1] block_size: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: Maximum block size supported by the DMA controller. enum: [3, 7, 15, 31, 63, 127, 255, 511, 1023, 2047, 4095] @@ -139,7 +139,7 @@ properties: default: 256 snps,dma-protection-control: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: | Bits one-to-one passed to the AHB HPROT[3:1] bus. Each bit setting indicates the following features: bit 0 - privileged mode, diff --git a/dts/Bindings/dma/ti/k3-bcdma.yaml b/dts/Bindings/dma/ti/k3-bcdma.yaml new file mode 100644 index 0000000000..b15f68c499 --- /dev/null +++ b/dts/Bindings/dma/ti/k3-bcdma.yaml @@ -0,0 +1,164 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 DMSS BCDMA Device Tree Bindings + +maintainers: + - Peter Ujfalusi <peter.ujfalusi@ti.com> + +description: | + The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR + mode channels of K3 UDMA-P. + BCDMA includes block copy channels and Split channels. + + Block copy channels mainly used for memory to memory transfers, but with + optional triggers a block copy channel can service peripherals by accessing + directly to memory mapped registers or area. + + Split channels can be used to service PSI-L based peripherals. + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the + legacy peripheral. + + PDMAs can be configured via BCDMA split channel's peer registers to match with + the configuration of the legacy peripheral. + +allOf: + - $ref: /schemas/dma/dma-controller.yaml# + +properties: + compatible: + const: ti,am64-dmss-bcdma + + "#dma-cells": + const: 3 + description: | + cell 1: type of the BCDMA channel to be used to service the peripheral: + 0 - split channel + 1 - block copy channel using global trigger 1 + 2 - block copy channel using global trigger 2 + 3 - block copy channel using local trigger + + cell 2: parameter for the channel: + if cell 1 is 0 (split channel): + PSI-L thread ID of the remote (to BCDMA) end. + Valid ranges for thread ID depends on the data movement direction: + for source thread IDs (rx): 0 - 0x7fff + for destination thread IDs (tx): 0x8000 - 0xffff + + Please refer to the device documentation for the PSI-L thread map and + also the PSI-L peripheral chapter for the correct thread ID. + if cell 1 is 1 or 2 (block copy channel using global trigger): + Unused, ignored + + The trigger must be configured for the channel externally to BCDMA, + channels using global triggers should not be requested directly, but + via DMA event router. + if cell 1 is 3 (block copy channel using local trigger): + bchan number of the locally triggered channel + + cell 3: ASEL value for the channel + + reg: + maxItems: 5 + + reg-names: + items: + - const: gcfg + - const: bchanrt + - const: rchanrt + - const: tchanrt + - const: ringrt + + msi-parent: true + + ti,asel: + $ref: /schemas/types.yaml#/definitions/uint32 + description: ASEL value for non slave channels + + ti,sci-rm-range-bchan: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of BCDMA block-copy channel resource subtypes for resource + allocation for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + + ti,sci-rm-range-tchan: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of BCDMA split tx channel resource subtypes for resource allocation + for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + + ti,sci-rm-range-rchan: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of BCDMA split rx channel resource subtypes for resource allocation + for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + +required: + - compatible + - "#dma-cells" + - reg + - reg-names + - msi-parent + - ti,sci + - ti,sci-dev-id + - ti,sci-rm-range-bchan + - ti,sci-rm-range-tchan + - ti,sci-rm-range-rchan + +unevaluatedProperties: false + +examples: + - |+ + cbass_main { + #address-cells = <2>; + #size-cells = <2>; + + main_dmss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges; + ranges; + + ti,sci-dev-id = <25>; + + main_bcdma: dma-controller@485c0100 { + compatible = "ti,am64-dmss-bcdma"; + + reg = <0x0 0x485c0100 0x0 0x100>, + <0x0 0x4c000000 0x0 0x20000>, + <0x0 0x4a820000 0x0 0x20000>, + <0x0 0x4aa40000 0x0 0x20000>, + <0x0 0x4bc00000 0x0 0x100000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; + msi-parent = <&inta_main_dmss>; + #dma-cells = <3>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <26>; + + ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */ + ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */ + ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */ + }; + }; + }; diff --git a/dts/Bindings/dma/ti/k3-pktdma.yaml b/dts/Bindings/dma/ti/k3-pktdma.yaml new file mode 100644 index 0000000000..b13ab60cd7 --- /dev/null +++ b/dts/Bindings/dma/ti/k3-pktdma.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings + +maintainers: + - Peter Ujfalusi <peter.ujfalusi@ti.com> + +description: | + The Packet DMA (PKTDMA) is intended to perform similar functions as the packet + mode channels of K3 UDMA-P. + PKTDMA only includes Split channels to service PSI-L based peripherals. + + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the + legacy peripheral. + + PDMAs can be configured via PKTDMA split channel's peer registers to match + with the configuration of the legacy peripheral. + +allOf: + - $ref: /schemas/dma/dma-controller.yaml# + +properties: + compatible: + const: ti,am64-dmss-pktdma + + "#dma-cells": + const: 2 + description: | + The first cell is the PSI-L thread ID of the remote (to PKTDMA) end. + Valid ranges for thread ID depends on the data movement direction: + for source thread IDs (rx): 0 - 0x7fff + for destination thread IDs (tx): 0x8000 - 0xffff + + Please refer to the device documentation for the PSI-L thread map and also + the PSI-L peripheral chapter for the correct thread ID. + + The second cell is the ASEL value for the channel + + reg: + maxItems: 4 + + reg-names: + items: + - const: gcfg + - const: rchanrt + - const: tchanrt + - const: ringrt + + msi-parent: true + + ti,sci-rm-range-tchan: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of PKTDMA split tx channel resource subtypes for resource allocation + for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + + ti,sci-rm-range-tflow: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of PKTDMA split tx flow resource subtypes for resource allocation + for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + + ti,sci-rm-range-rchan: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of PKTDMA split rx channel resource subtypes for resource allocation + for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + + ti,sci-rm-range-rflow: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Array of PKTDMA split rx flow resource subtypes for resource allocation + for this host + minItems: 1 + # Should be enough + maxItems: 255 + items: + maximum: 0x3f + +required: + - compatible + - "#dma-cells" + - reg + - reg-names + - msi-parent + - ti,sci + - ti,sci-dev-id + - ti,sci-rm-range-tchan + - ti,sci-rm-range-tflow + - ti,sci-rm-range-rchan + - ti,sci-rm-range-rflow + +unevaluatedProperties: false + +examples: + - |+ + cbass_main { + #address-cells = <2>; + #size-cells = <2>; + + main_dmss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges; + ranges; + + ti,sci-dev-id = <25>; + + main_pktdma: dma-controller@485c0000 { + compatible = "ti,am64-dmss-pktdma"; + + reg = <0x0 0x485c0000 0x0 0x100>, + <0x0 0x4a800000 0x0 0x20000>, + <0x0 0x4aa00000 0x0 0x40000>, + <0x0 0x4b800000 0x0 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; + msi-parent = <&inta_main_dmss>; + #dma-cells = <2>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <30>; + + ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */ + <0x24>, /* CPSW_TX_CHAN */ + <0x25>, /* SAUL_TX_0_CHAN */ + <0x26>, /* SAUL_TX_1_CHAN */ + <0x27>, /* ICSSG_0_TX_CHAN */ + <0x28>; /* ICSSG_1_TX_CHAN */ + ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */ + <0x11>, /* RING_CPSW_TX_CHAN */ + <0x12>, /* RING_SAUL_TX_0_CHAN */ + <0x13>, /* RING_SAUL_TX_1_CHAN */ + <0x14>, /* RING_ICSSG_0_TX_CHAN */ + <0x15>; /* RING_ICSSG_1_TX_CHAN */ + ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */ + <0x2b>, /* CPSW_RX_CHAN */ + <0x2d>, /* SAUL_RX_0_CHAN */ + <0x2f>, /* SAUL_RX_1_CHAN */ + <0x31>, /* SAUL_RX_2_CHAN */ + <0x33>, /* SAUL_RX_3_CHAN */ + <0x35>, /* ICSSG_0_RX_CHAN */ + <0x37>; /* ICSSG_1_RX_CHAN */ + ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */ + <0x2c>, /* FLOW_CPSW_RX_CHAN */ + <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */ + <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */ + <0x36>, /* FLOW_ICSSG_0_RX_CHAN */ + <0x38>; /* FLOW_ICSSG_1_RX_CHAN */ + }; + }; + }; diff --git a/dts/Bindings/edac/aspeed-sdram-edac.txt b/dts/Bindings/edac/aspeed-sdram-edac.txt index 6a0f3d90d6..8ca9e0a049 100644 --- a/dts/Bindings/edac/aspeed-sdram-edac.txt +++ b/dts/Bindings/edac/aspeed-sdram-edac.txt @@ -1,6 +1,6 @@ -Aspeed AST2500 SoC EDAC node +Aspeed BMC SoC EDAC node -The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error +The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error correction check). The memory controller supports SECDED (single bit error correction, double bit @@ -11,7 +11,10 @@ Note, the bootloader must configure ECC mode in the memory controller. Required properties: -- compatible: should be "aspeed,ast2500-sdram-edac" +- compatible: should be one of + - "aspeed,ast2400-sdram-edac" + - "aspeed,ast2500-sdram-edac" + - "aspeed,ast2600-sdram-edac" - reg: sdram controller register set should be <0x1e6e0000 0x174> - interrupts: should be AVIC interrupt #0 diff --git a/dts/Bindings/eeprom/at24.yaml b/dts/Bindings/eeprom/at24.yaml index 6edfa705b4..d5117c638b 100644 --- a/dts/Bindings/eeprom/at24.yaml +++ b/dts/Bindings/eeprom/at24.yaml @@ -131,7 +131,7 @@ properties: default: 1 read-only: - $ref: /schemas/types.yaml#definitions/flag + $ref: /schemas/types.yaml#/definitions/flag description: Disables writes to the eeprom. @@ -141,7 +141,7 @@ properties: Total eeprom size in bytes. no-read-rollover: - $ref: /schemas/types.yaml#definitions/flag + $ref: /schemas/types.yaml#/definitions/flag description: Indicates that the multi-address eeprom does not automatically roll over reads to the next slave address. Please consult the manual of diff --git a/dts/Bindings/eeprom/at25.yaml b/dts/Bindings/eeprom/at25.yaml index 7449736376..121a601db2 100644 --- a/dts/Bindings/eeprom/at25.yaml +++ b/dts/Bindings/eeprom/at25.yaml @@ -45,13 +45,13 @@ properties: spi-max-frequency: true pagesize: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072] description: Size of the eeprom page. size: - $ref: /schemas/types.yaml#definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32 description: Total eeprom size in bytes. diff --git a/dts/Bindings/extcon/extcon-fsa9480.txt b/dts/Bindings/extcon/extcon-fsa9480.txt deleted file mode 100644 index 624bd76f46..0000000000 --- a/dts/Bindings/extcon/extcon-fsa9480.txt +++ /dev/null @@ -1,21 +0,0 @@ -FAIRCHILD SEMICONDUCTOR FSA9480 MICROUSB SWITCH - -The FSA9480 is a USB port accessory detector and switch. The FSA9480 is fully -controlled using I2C and enables USB data, stereo and mono audio, video, -microphone, and UART data to use a common connector port. - -Required properties: - - compatible : Must be one of - "fcs,fsa9480" - "fcs,fsa880" - - reg : Specifies i2c slave address. Must be 0x25. - - interrupts : Should contain one entry specifying interrupt signal of - interrupt parent to which interrupt pin of the chip is connected. - - Example: - musb@25 { - compatible = "fcs,fsa9480"; - reg = <0x25>; - interrupt-parent = <&gph2>; - interrupts = <7 0>; - }; diff --git a/dts/Bindings/extcon/extcon-usbc-tusb320.yaml b/dts/Bindings/extcon/extcon-usbc-tusb320.yaml new file mode 100644 index 0000000000..9875b4d5c3 --- /dev/null +++ b/dts/Bindings/extcon/extcon-usbc-tusb320.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/extcon/extcon-usbc-tusb320.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI TUSB320 USB Type-C CC Logic controller + +maintainers: + - Michael Auchter <michael.auchter@ni.com> + +properties: + compatible: + const: ti,tusb320 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + tusb320@61 { + compatible = "ti,tusb320"; + reg = <0x61>; + interrupt-parent = <&gpio>; + interrupts = <27 1>; + }; + }; +... diff --git a/dts/Bindings/extcon/fcs,fsa880.yaml b/dts/Bindings/extcon/fcs,fsa880.yaml new file mode 100644 index 0000000000..ef6a246a13 --- /dev/null +++ b/dts/Bindings/extcon/fcs,fsa880.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/extcon/fcs,fsa880.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Fairchild Semiconductor FSA880, FSA9480 and compatibles + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: + The FSA880 and FSA9480 are USB port accessory detectors and switches. + The switch is fully controlled using I2C and enables USB data, stereo + and mono audio, video, microphone, and UART data to use a common + connector port. Compatible switches exist from other manufacturers. + +properties: + compatible: + enum: + - fcs,fsa880 + - fcs,fsa9480 + - ti,tsu6111 + + reg: + maxItems: 1 + description: The I2C address for an FSA880 compatible device is + usually 0x25. + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + usb-switch@25 { + compatible = "fcs,fsa880"; + reg = <0x25>; + interrupt-parent = <&gpio>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + }; + }; diff --git a/dts/Bindings/fsi/ibm,p9-occ.txt b/dts/Bindings/fsi/ibm,p9-occ.txt index 99ca9862a5..e73358075a 100644 --- a/dts/Bindings/fsi/ibm,p9-occ.txt +++ b/dts/Bindings/fsi/ibm,p9-occ.txt @@ -1,13 +1,13 @@ -Device-tree bindings for FSI-attached POWER9 On-Chip Controller (OCC) ---------------------------------------------------------------------- +Device-tree bindings for FSI-attached POWER9/POWER10 On-Chip Controller (OCC) +----------------------------------------------------------------------------- -This is the binding for the P9 On-Chip Controller accessed over FSI from a -service processor. See fsi.txt for details on bindings for FSI slave and CFAM +This is the binding for the P9 or P10 On-Chip Controller accessed over FSI from +a service processor. See fsi.txt for details on bindings for FSI slave and CFAM nodes. The OCC is not an FSI slave device itself, rather it is accessed -through the SBE fifo. +through the SBE FIFO. Required properties: - - compatible = "ibm,p9-occ" + - compatible = "ibm,p9-occ" or "ibm,p10-occ" Examples: diff --git a/dts/Bindings/gpio/gpio-pca95xx.yaml b/dts/Bindings/gpio/gpio-pca95xx.yaml index 183ec23eda..f5ee23c2df 100644 --- a/dts/Bindings/gpio/gpio-pca95xx.yaml +++ b/dts/Bindings/gpio/gpio-pca95xx.yaml @@ -48,6 +48,7 @@ properties: - nxp,pcal6416 - nxp,pcal6524 - nxp,pcal9535 + - nxp,pcal9554b - nxp,pcal9555a - onnn,cat9554 - onnn,pca9654 diff --git a/dts/Bindings/gpio/gpio-xilinx.txt b/dts/Bindings/gpio/gpio-xilinx.txt index 08eed2335d..e506f30e1a 100644 --- a/dts/Bindings/gpio/gpio-xilinx.txt +++ b/dts/Bindings/gpio/gpio-xilinx.txt @@ -13,6 +13,7 @@ Required properties: - gpio-controller : Marks the device node as a GPIO controller. Optional properties: +- clocks : Input clock specifier. Refer to common clock bindings. - interrupts : Interrupt mapping for GPIO IRQ. - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 @@ -29,6 +30,7 @@ Example: gpio: gpio@40000000 { #gpio-cells = <2>; compatible = "xlnx,xps-gpio-1.00.a"; + clocks = <&clkc25>; gpio-controller ; interrupt-parent = <µblaze_0_intc>; interrupts = < 6 2 >; diff --git a/dts/Bindings/gpio/mediatek,mt7621-gpio.txt b/dts/Bindings/gpio/mediatek,mt7621-gpio.txt deleted file mode 100644 index e1c49b660d..0000000000 --- a/dts/Bindings/gpio/mediatek,mt7621-gpio.txt +++ /dev/null @@ -1,35 +0,0 @@ -Mediatek MT7621 SoC GPIO controller bindings - -The IP core used inside these SoCs has 3 banks of 32 GPIOs each. -The registers of all the banks are interwoven inside one single IO range. -We load one GPIO controller instance per bank. Also the GPIO controller can receive -interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU -using GIC INT12. - -Required properties for the top level node: -- #gpio-cells : Should be two. The first cell is the GPIO pin number and the - second cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. - Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt. Should be 2. The first cell defines the interrupt number, - the second encodes the trigger flags encoded as described in - Documentation/devicetree/bindings/interrupt-controller/interrupts.txt -- compatible: - - "mediatek,mt7621-gpio" for Mediatek controllers -- reg : Physical base address and length of the controller's registers -- interrupt-parent : phandle of the parent interrupt controller. -- interrupts : Interrupt specifier for the controllers interrupt. -- interrupt-controller : Mark the device node as an interrupt controller. -- gpio-controller : Marks the device node as a GPIO controller. - -Example: - gpio@600 { - #gpio-cells = <2>; - #interrupt-cells = <2>; - compatible = "mediatek,mt7621-gpio"; - gpio-controller; - interrupt-controller; - reg = <0x600 0x100>; - interrupt-parent = <&gic>; - interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>; - }; diff --git a/dts/Bindings/gpio/mediatek,mt7621-gpio.yaml b/dts/Bindings/gpio/mediatek,mt7621-gpio.yaml new file mode 100644 index 0000000000..5bbb2a3126 --- /dev/null +++ b/dts/Bindings/gpio/mediatek,mt7621-gpio.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT7621 SoC GPIO controller + +maintainers: + - Sergio Paracuellos <sergio.paracuellos@gmail.com> + +description: | + The IP core used inside these SoCs has 3 banks of 32 GPIOs each. + The registers of all the banks are interwoven inside one single IO range. + We load one GPIO controller instance per bank. Also the GPIO controller can receive + interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU + using GIC INT12. + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: mediatek,mt7621-gpio + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + gpio-ranges: true + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + - gpio-ranges + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/mips-gic.h> + + gpio@600 { + compatible = "mediatek,mt7621-gpio"; + reg = <0x600 0x100>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 95>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>; + }; + +... diff --git a/dts/Bindings/gpio/mstar,msc313-gpio.yaml b/dts/Bindings/gpio/mstar,msc313-gpio.yaml new file mode 100644 index 0000000000..1f2ef408bb --- /dev/null +++ b/dts/Bindings/gpio/mstar,msc313-gpio.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/mstar,msc313-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar/SigmaStar GPIO controller + +maintainers: + - Daniel Palmer <daniel@thingy.jp> + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: mstar,msc313-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: true + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/msc313-gpio.h> + + gpio: gpio@207800 { + compatible = "mstar,msc313e-gpio"; + #gpio-cells = <2>; + reg = <0x207800 0x200>; + gpio-controller; + gpio-ranges = <&pinctrl 0 36 22>, + <&pinctrl 22 63 4>, + <&pinctrl 26 68 6>; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&intc_fiq>; + }; diff --git a/dts/Bindings/gpu/arm,mali-bifrost.yaml b/dts/Bindings/gpu/arm,mali-bifrost.yaml index b1844b9c29..184492162e 100644 --- a/dts/Bindings/gpu/arm,mali-bifrost.yaml +++ b/dts/Bindings/gpu/arm,mali-bifrost.yaml @@ -52,6 +52,23 @@ properties: "#cooling-cells": const: 2 + dynamic-power-coefficient: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + A u32 value that represents the running time dynamic + power coefficient in units of uW/MHz/V^2. The + coefficient can either be calculated from power + measurements or derived by analysis. + + The dynamic power consumption of the GPU is + proportional to the square of the Voltage (V) and + the clock frequency (f). The coefficient is used to + calculate the dynamic power as below - + + Pdyn = dynamic-power-coefficient * V^2 * f + + where voltage is in V, frequency is in MHz. + required: - compatible - reg diff --git a/dts/Bindings/gpu/arm,mali-midgard.yaml b/dts/Bindings/gpu/arm,mali-midgard.yaml index e9c42b59f3..696c17aedb 100644 --- a/dts/Bindings/gpu/arm,mali-midgard.yaml +++ b/dts/Bindings/gpu/arm,mali-midgard.yaml @@ -90,6 +90,23 @@ properties: dma-coherent: true + dynamic-power-coefficient: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + A u32 value that represents the running time dynamic + power coefficient in units of uW/MHz/V^2. The + coefficient can either be calculated from power + measurements or derived by analysis. + + The dynamic power consumption of the GPU is + proportional to the square of the Voltage (V) and + the clock frequency (f). The coefficient is used to + calculate the dynamic power as below - + + Pdyn = dynamic-power-coefficient * V^2 * f + + where voltage is in V, frequency is in MHz. + required: - compatible - reg diff --git a/dts/Bindings/gpu/nvidia,gk20a.txt b/dts/Bindings/gpu/nvidia,gk20a.txt index 662a3c8a7d..cc6ce5221a 100644 --- a/dts/Bindings/gpu/nvidia,gk20a.txt +++ b/dts/Bindings/gpu/nvidia,gk20a.txt @@ -97,8 +97,8 @@ Example for GV11B: gpu@17000000 { compatible = "nvidia,gv11b"; - reg = <0x17000000 0x10000000>, - <0x18000000 0x10000000>; + reg = <0x17000000 0x1000000>, + <0x18000000 0x1000000>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "stall", "nonstall"; diff --git a/dts/Bindings/hwmon/ad741x.txt b/dts/Bindings/hwmon/ad741x.txt deleted file mode 100644 index 9102152c84..0000000000 --- a/dts/Bindings/hwmon/ad741x.txt +++ /dev/null @@ -1,15 +0,0 @@ -* AD7416/AD7417/AD7418 Temperature Sensor Device Tree Bindings - -Required properties: -- compatible: one of - "adi,ad7416" - "adi,ad7417" - "adi,ad7418" -- reg: I2C address - -Example: - -hwmon@28 { - compatible = "adi,ad7418"; - reg = <0x28>; -}; diff --git a/dts/Bindings/hwmon/adi,ad741x.yaml b/dts/Bindings/hwmon/adi,ad741x.yaml new file mode 100644 index 0000000000..ce7f8ce9da --- /dev/null +++ b/dts/Bindings/hwmon/adi,ad741x.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/adi,ad741x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7416/AD7417/AD7418 temperature sensors + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +properties: + compatible: + enum: + - adi,ad7416 + - adi,ad7417 + - adi,ad7418 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + temperature-sensor@28 { + compatible = "adi,ad7418"; + reg = <0x28>; + }; + }; diff --git a/dts/Bindings/hwmon/adi,adm1275.yaml b/dts/Bindings/hwmon/adi,adm1275.yaml new file mode 100644 index 0000000000..223393d7ca --- /dev/null +++ b/dts/Bindings/hwmon/adi,adm1275.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/adi,adm1275.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADM1075/ADM127x/ADM129x digital power monitors + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +description: | + The ADM1293 and ADM1294 are high accuracy integrated digital power monitors + that offer digital current, voltage, and power monitoring using an on-chip, + 12-bit analog-to-digital converter (ADC), communicated through a PMBus + compliant I2C interface. + + Datasheets: + https://www.analog.com/en/products/adm1294.html + +properties: + compatible: + enum: + - adi,adm1075 + - adi,adm1272 + - adi,adm1275 + - adi,adm1276 + - adi,adm1278 + - adi,adm1293 + - adi,adm1294 + + reg: + maxItems: 1 + + shunt-resistor-micro-ohms: + description: + Shunt resistor value in micro-Ohm. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + power-sensor@10 { + compatible = "adi,adm1272"; + reg = <0x10>; + shunt-resistor-micro-ohms = <500>; + }; + }; diff --git a/dts/Bindings/hwmon/adi,ltc2992.yaml b/dts/Bindings/hwmon/adi,ltc2992.yaml new file mode 100644 index 0000000000..64a8fcb7bc --- /dev/null +++ b/dts/Bindings/hwmon/adi,ltc2992.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/adi,ltc2992.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Linear Technology 2992 Power Monitor + +maintainers: + - Alexandru Tachici <alexandru.tachici@analog.com> + +description: | + Linear Technology 2992 Dual Wide Range Power Monitor + https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf + +properties: + compatible: + enum: + - adi,ltc2992 + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + avcc-supply: true + +patternProperties: + "^channel@([0-1])$": + type: object + description: | + Represents the two supplies to be monitored. + + properties: + reg: + description: | + The channel number. LTC2992 can monitor two supplies. + items: + minimum: 0 + maximum: 1 + + shunt-resistor-micro-ohms: + description: + The value of curent sense resistor in microohms. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + ltc2992@6F { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "adi,ltc2992"; + reg = <0x6F>; + + channel@0 { + reg = <0x0>; + shunt-resistor-micro-ohms = <10000>; + }; + + channel@1 { + reg = <0x1>; + shunt-resistor-micro-ohms = <10000>; + }; + }; + }; +... diff --git a/dts/Bindings/hwmon/adm1275.txt b/dts/Bindings/hwmon/adm1275.txt deleted file mode 100644 index 1ecd03f3da..0000000000 --- a/dts/Bindings/hwmon/adm1275.txt +++ /dev/null @@ -1,25 +0,0 @@ -adm1275 properties - -Required properties: -- compatible: Must be one of the supported compatible strings: - - "adi,adm1075" for adm1075 - - "adi,adm1272" for adm1272 - - "adi,adm1275" for adm1275 - - "adi,adm1276" for adm1276 - - "adi,adm1278" for adm1278 - - "adi,adm1293" for adm1293 - - "adi,adm1294" for adm1294 -- reg: I2C address - -Optional properties: - -- shunt-resistor-micro-ohms - Shunt resistor value in micro-Ohm - -Example: - -adm1272@10 { - compatible = "adi,adm1272"; - reg = <0x10>; - shunt-resistor-micro-ohms = <500>; -}; diff --git a/dts/Bindings/hwmon/ads7828.txt b/dts/Bindings/hwmon/ads7828.txt deleted file mode 100644 index fe0cc4ad7e..0000000000 --- a/dts/Bindings/hwmon/ads7828.txt +++ /dev/null @@ -1,25 +0,0 @@ -ads7828 properties - -Required properties: -- compatible: Should be one of - ti,ads7828 - ti,ads7830 -- reg: I2C address - -Optional properties: - -- ti,differential-input - Set to use the device in differential mode. -- vref-supply - The external reference on the device is set to this regulators output. If it - does not exists the internal reference will be used and output by the ads78xx - on the "external vref" pin. - - Example ADS7828 node: - - ads7828: ads@48 { - comatible = "ti,ads7828"; - reg = <0x48>; - vref-supply = <&vref>; - ti,differential-input; - }; diff --git a/dts/Bindings/hwmon/amd,sbtsi.yaml b/dts/Bindings/hwmon/amd,sbtsi.yaml new file mode 100644 index 0000000000..446b09f1ce --- /dev/null +++ b/dts/Bindings/hwmon/amd,sbtsi.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/amd,sbtsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: > + Sideband interface Temperature Sensor Interface (SB-TSI) compliant + AMD SoC temperature device + +maintainers: + - Kun Yi <kunyi@google.com> + - Supreeth Venkatesh <supreeth.venkatesh@amd.com> + +description: | + SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible + interface that reports AMD SoC's Ttcl (normalized temperature), + and resembles a typical 8-pin remote temperature sensor's I2C interface + to BMC. The emulated thermal sensor can report temperatures in increments + of 0.125 degrees, ranging from 0 to 255.875. + +properties: + compatible: + enum: + - amd,sbtsi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section 6.3.1 of the + SoC register reference. The SB-TSI address is normally 98h for socket + 0 and 90h for socket 1, but it could vary based on hardware address + select pins. + \[open source SoC register reference\] + https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbtsi@4c { + compatible = "amd,sbtsi"; + reg = <0x4c>; + }; + }; +... diff --git a/dts/Bindings/hwmon/ina2xx.txt b/dts/Bindings/hwmon/ina2xx.txt deleted file mode 100644 index 02af0d94e9..0000000000 --- a/dts/Bindings/hwmon/ina2xx.txt +++ /dev/null @@ -1,24 +0,0 @@ -ina2xx properties - -Required properties: -- compatible: Must be one of the following: - - "ti,ina209" for ina209 - - "ti,ina219" for ina219 - - "ti,ina220" for ina220 - - "ti,ina226" for ina226 - - "ti,ina230" for ina230 - - "ti,ina231" for ina231 -- reg: I2C address - -Optional properties: - -- shunt-resistor - Shunt resistor value in micro-Ohm - -Example: - -ina220@44 { - compatible = "ti,ina220"; - reg = <0x44>; - shunt-resistor = <1000>; -}; diff --git a/dts/Bindings/hwmon/moortec,mr75203.yaml b/dts/Bindings/hwmon/moortec,mr75203.yaml index 6f3e3c01f7..b79f069a04 100644 --- a/dts/Bindings/hwmon/moortec,mr75203.yaml +++ b/dts/Bindings/hwmon/moortec,mr75203.yaml @@ -32,7 +32,7 @@ properties: PVT controller has 5 VM (voltage monitor) sensors. vm-map defines CPU core to VM instance mapping. A value of 0xff means that VM sensor is unused. - $ref: /schemas/types.yaml#definitions/uint8-array + $ref: /schemas/types.yaml#/definitions/uint8-array maxItems: 5 clocks: diff --git a/dts/Bindings/hwmon/pwm-fan.txt b/dts/Bindings/hwmon/pwm-fan.txt index 41b7676295..4509e68862 100644 --- a/dts/Bindings/hwmon/pwm-fan.txt +++ b/dts/Bindings/hwmon/pwm-fan.txt @@ -8,15 +8,16 @@ Required properties: Optional properties: - fan-supply : phandle to the regulator that provides power to the fan -- interrupts : This contains a single interrupt specifier which - describes the tachometer output of the fan as an - interrupt source. The output signal must generate a - defined number of interrupts per fan revolution, which - require that it must be self resetting edge interrupts. - See interrupt-controller/interrupts.txt for the format. -- pulses-per-revolution : define the tachometer pulses per fan revolution as - an integer (default is 2 interrupts per revolution). - The value must be greater than zero. +- interrupts : This contains an interrupt specifier for each fan + tachometer output connected to an interrupt source. + The output signal must generate a defined number of + interrupts per fan revolution, which require that + it must be self resetting edge interrupts. See + interrupt-controller/interrupts.txt for the format. +- pulses-per-revolution : define the number of pulses per fan revolution for + each tachometer input as an integer (default is 2 + interrupts per revolution). The value must be + greater than zero. Example: fan0: pwm-fan { @@ -55,3 +56,12 @@ Example 2: interrupts = <1 IRQ_TYPE_EDGE_FALLING>; pulses-per-revolution = <2>; }; + +Example 3: + fan0: pwm-fan { + compatible = "pwm-fan"; + pwms = <&pwm1 0 25000 0>; + interrupts-extended = <&gpio1 1 IRQ_TYPE_EDGE_FALLING>, + <&gpio2 5 IRQ_TYPE_EDGE_FALLING>; + pulses-per-revolution = <2>, <1>; + }; diff --git a/dts/Bindings/hwmon/sensirion,shtc1.yaml b/dts/Bindings/hwmon/sensirion,shtc1.yaml index c523a1beb2..7d49478d96 100644 --- a/dts/Bindings/hwmon/sensirion,shtc1.yaml +++ b/dts/Bindings/hwmon/sensirion,shtc1.yaml @@ -29,12 +29,12 @@ properties: const: 0x70 sensirion,blocking-io: - $ref: /schemas/types.yaml#definitions/flag + $ref: /schemas/types.yaml#/definitions/flag description: If set, the driver hold the i2c bus until measurement is finished. sensirion,low-precision: - $ref: /schemas/types.yaml#definitions/flag + $ref: /schemas/types.yaml#/definitions/flag description: If set, the sensor aquire data with low precision (not recommended). The driver aquire data with high precision by default. diff --git a/dts/Bindings/hwmon/ti,ads7828.yaml b/dts/Bindings/hwmon/ti,ads7828.yaml new file mode 100644 index 0000000000..33ee575bb0 --- /dev/null +++ b/dts/Bindings/hwmon/ti,ads7828.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/ti,ads7828.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS7828/ADS7830 Analog to Digital Converter (ADC) + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +description: | + The ADS7828 is 12-Bit, 8-Channel Sampling Analog to Digital Converter (ADC) + with an I2C interface. + + Datasheets: + https://www.ti.com/product/ADS7828 + +properties: + compatible: + enum: + - ti,ads7828 + - ti,ads7830 + + reg: + maxItems: 1 + + ti,differential-input: + description: + Set to use the device in differential mode. + type: boolean + + vref-supply: + description: + The regulator to use as an external reference. If it does not exists the + internal reference will be used. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@48 { + comatible = "ti,ads7828"; + reg = <0x48>; + vref-supply = <&vref>; + ti,differential-input; + }; + }; diff --git a/dts/Bindings/hwmon/ti,ina2xx.yaml b/dts/Bindings/hwmon/ti,ina2xx.yaml new file mode 100644 index 0000000000..6f0443322a --- /dev/null +++ b/dts/Bindings/hwmon/ti,ina2xx.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/ti,ina2xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments INA209 family of power/voltage monitors + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +description: | + The INA209 is a high-side current shunt and power monitor with + an I2C interface. + + Datasheets: + https://www.ti.com/product/INA209 + +properties: + compatible: + enum: + - ti,ina209 + - ti,ina219 + - ti,ina220 + - ti,ina226 + - ti,ina230 + - ti,ina231 + + reg: + maxItems: 1 + + shunt-resistor: + description: + Shunt resistor value in micro-Ohm. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + power-sensor@44 { + compatible = "ti,ina220"; + reg = <0x44>; + shunt-resistor = <1000>; + }; + }; diff --git a/dts/Bindings/hwmon/ti,tmp513.yaml b/dts/Bindings/hwmon/ti,tmp513.yaml index c17e5d3ee3..8020d739a0 100644 --- a/dts/Bindings/hwmon/ti,tmp513.yaml +++ b/dts/Bindings/hwmon/ti,tmp513.yaml @@ -61,7 +61,7 @@ properties: Array of three(TMP513) or two(TMP512) n-Factor value for each remote temperature channel. See datasheet Table 11 for n-Factor range list and value interpretation. - $ref: /schemas/types.yaml#definitions/uint32-array + $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 maxItems: 3 items: diff --git a/dts/Bindings/i2c/i2c-gate.txt b/dts/Bindings/i2c/i2c-gate.txt deleted file mode 100644 index 1846d236e6..0000000000 --- a/dts/Bindings/i2c/i2c-gate.txt +++ /dev/null @@ -1,41 +0,0 @@ -An i2c gate is useful to e.g. reduce the digital noise for RF tuners connected -to the i2c bus. Gates are similar to arbitrators in that you need to perform -some kind of operation to access the i2c bus past the arbitrator/gate, but -there are no competing masters to consider for gates and therefore there is -no arbitration happening for gates. - -Common i2c gate properties. - -- i2c-gate child node - -Required properties for the i2c-gate child node: -- #address-cells = <1>; -- #size-cells = <0>; - -Optional properties for i2c-gate child node: -- Child nodes conforming to i2c bus binding - - -Example : - - /* - An Invensense mpu9150 at address 0x68 featuring an on-chip Asahi - Kasei ak8975 compass behind a gate. - */ - - mpu9150@68 { - compatible = "invensense,mpu9150"; - reg = <0x68>; - interrupt-parent = <&gpio1>; - interrupts = <18 1>; - - i2c-gate { - #address-cells = <1>; - #size-cells = <0>; - - ax8975@c { - compatible = "ak,ak8975"; - reg = <0x0c>; - }; - }; - }; diff --git a/dts/Bindings/i2c/i2c-gate.yaml b/dts/Bindings/i2c/i2c-gate.yaml new file mode 100644 index 0000000000..66472f12a7 --- /dev/null +++ b/dts/Bindings/i2c/i2c-gate.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-gate.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common i2c gate properties + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + An i2c gate is useful to e.g. reduce the digital noise for RF tuners connected + to the i2c bus. Gates are similar to arbitrators in that you need to perform + some kind of operation to access the i2c bus past the arbitrator/gate, but + there are no competing masters to consider for gates and therefore there is + no arbitration happening for gates. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml + +properties: + $nodename: + const: i2c-gate + +additionalProperties: true + +examples: + - | + i2c-gate { + #address-cells = <1>; + #size-cells = <0>; + ak8975@c { + compatible = "ak,ak8975"; + reg = <0x0c>; + }; + }; +... + diff --git a/dts/Bindings/i2c/i2c-ocores.txt b/dts/Bindings/i2c/i2c-ocores.txt index 6b25a80ae8..a37c9455b2 100644 --- a/dts/Bindings/i2c/i2c-ocores.txt +++ b/dts/Bindings/i2c/i2c-ocores.txt @@ -5,8 +5,12 @@ Required properties: "aeroflexgaisler,i2cmst" "sifive,fu540-c000-i2c", "sifive,i2c0" For Opencore based I2C IP block reimplemented in - FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt - for additional details. + FU540-C000 SoC. + "sifive,fu740-c000-i2c", "sifive,i2c0" + For Opencore based I2C IP block reimplemented in + FU740-C000 SoC. + Please refer to sifive-blocks-ip-versioning.txt for + additional details. - reg : bus address start and address range size of device - clocks : handle to the controller clock; see the note below. Mutually exclusive with opencores,ip-clock-frequency diff --git a/dts/Bindings/i2c/i2c-omap.txt b/dts/Bindings/i2c/i2c-omap.txt index a44573d7c1..a425b91af4 100644 --- a/dts/Bindings/i2c/i2c-omap.txt +++ b/dts/Bindings/i2c/i2c-omap.txt @@ -8,6 +8,7 @@ Required properties : "ti,omap4-i2c" for OMAP4+ SoCs "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs "ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs + "ti,am64-i2c", "ti,omap4-i2c" for AM64 SoCs - ti,hwmods : Must be "i2c<n>", n being the instance number (1-based) - #address-cells = <1>; - #size-cells = <0>; diff --git a/dts/Bindings/i2c/i2c-owl.txt b/dts/Bindings/i2c/i2c-owl.txt deleted file mode 100644 index 54c05dbdb2..0000000000 --- a/dts/Bindings/i2c/i2c-owl.txt +++ /dev/null @@ -1,29 +0,0 @@ -Actions Semiconductor Owl I2C controller - -Required properties: - -- compatible : Should be one of the following: - - "actions,s700-i2c" for S700 SoC - - "actions,s900-i2c" for S900 SoC -- reg : Offset and length of the register set for the device. -- #address-cells : Should be 1. -- #size-cells : Should be 0. -- interrupts : A single interrupt specifier. -- clocks : Phandle of the clock feeding the I2C controller. - -Optional properties: - -- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and - Fast modes are supported, possible values are 100000 and - 400000. -Examples: - - i2c0: i2c@e0170000 { - compatible = "actions,s900-i2c"; - reg = <0 0xe0170000 0 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clock CLK_I2C0>; - clock-frequency = <100000>; - }; diff --git a/dts/Bindings/i2c/i2c-owl.yaml b/dts/Bindings/i2c/i2c-owl.yaml new file mode 100644 index 0000000000..d96908badf --- /dev/null +++ b/dts/Bindings/i2c/i2c-owl.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-owl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl I2C Controller + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: | + This I2C controller is found in the Actions Semi Owl SoCs: + S500, S700 and S900. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - actions,s500-i2c # Actions Semi S500 compatible SoCs + - actions,s700-i2c # Actions Semi S700 compatible SoCs + - actions,s900-i2c # Actions Semi S900 compatible SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: Phandle of the clock feeding the I2C controller. + minItems: 1 + + clock-frequency: + description: | + Desired I2C bus clock frequency in Hz. As only Standard and Fast + modes are supported, possible values are 100000 and 400000. + enum: [100000, 400000] + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/actions,s900-cmu.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + i2c@e0170000 { + compatible = "actions,s900-i2c"; + reg = <0xe0170000 0x1000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu CLK_I2C0>; + clock-frequency = <100000>; + }; + +... diff --git a/dts/Bindings/i2c/mellanox,i2c-mlxbf.txt b/dts/Bindings/i2c/mellanox,i2c-mlxbf.txt deleted file mode 100644 index 566ea861aa..0000000000 --- a/dts/Bindings/i2c/mellanox,i2c-mlxbf.txt +++ /dev/null @@ -1,42 +0,0 @@ -Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs - -Required Properties: - -- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2". - -- reg : address offset and length of the device registers. The - registers consist of the following set of resources: - 1) Smbus block registers. - 2) Cause master registers. - 3) Cause slave registers. - 4) Cause coalesce registers (if compatible isn't set - to "mellanox,i2c-mlxbf1"). - -- interrupts : interrupt number. - -Optional Properties: - -- clock-frequency : bus frequency used to configure timing registers; - allowed values are 100000, 400000 and 1000000; - those are expressed in Hz. Default is 100000. - -Example: - -i2c@2804000 { - compatible = "mellanox,i2c-mlxbf1"; - reg = <0x02804000 0x800>, - <0x02801200 0x020>, - <0x02801260 0x020>; - interrupts = <57>; - clock-frequency = <100000>; -}; - -i2c@2808800 { - compatible = "mellanox,i2c-mlxbf2"; - reg = <0x02808800 0x600>, - <0x02808e00 0x020>, - <0x02808e20 0x020>, - <0x02808e40 0x010>; - interrupts = <57>; - clock-frequency = <400000>; -}; diff --git a/dts/Bindings/i2c/mellanox,i2c-mlxbf.yaml b/dts/Bindings/i2c/mellanox,i2c-mlxbf.yaml new file mode 100644 index 0000000000..d2b401d062 --- /dev/null +++ b/dts/Bindings/i2c/mellanox,i2c-mlxbf.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mellanox I2C SMBus on BlueField SoCs + +maintainers: + - Khalil Blaiech <kblaiech@nvidia.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - mellanox,i2c-mlxbf1 + - mellanox,i2c-mlxbf2 + + reg: + minItems: 3 + maxItems: 4 + items: + - description: Smbus block registers + - description: Cause master registers + - description: Cause slave registers + - description: Cause coalesce registers + + interrupts: + maxItems: 1 + + clock-frequency: + enum: [ 100000, 400000, 1000000 ] + description: + bus frequency used to configure timing registers; + The frequency is expressed in Hz. Default is 100000. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +if: + properties: + compatible: + contains: + enum: + - mellanox,i2c-mlxbf1 + +then: + properties: + reg: + maxItems: 3 + +examples: + - | + i2c@2804000 { + compatible = "mellanox,i2c-mlxbf1"; + reg = <0x02804000 0x800>, + <0x02801200 0x020>, + <0x02801260 0x020>; + interrupts = <57>; + clock-frequency = <100000>; + }; + + - | + i2c@2808800 { + compatible = "mellanox,i2c-mlxbf2"; + reg = <0x02808800 0x600>, + <0x02808e00 0x020>, + <0x02808e20 0x020>, + <0x02808e40 0x010>; + interrupts = <57>; + clock-frequency = <400000>; + }; diff --git a/dts/Bindings/i2c/snps,designware-i2c.yaml b/dts/Bindings/i2c/snps,designware-i2c.yaml index 4f746bef23..c22b66b621 100644 --- a/dts/Bindings/i2c/snps,designware-i2c.yaml +++ b/dts/Bindings/i2c/snps,designware-i2c.yaml @@ -101,8 +101,6 @@ unevaluatedProperties: false required: - compatible - reg - - "#address-cells" - - "#size-cells" - interrupts examples: @@ -110,8 +108,6 @@ examples: i2c@f0000 { compatible = "snps,designware-i2c"; reg = <0xf0000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; interrupts = <11>; clock-frequency = <400000>; }; @@ -119,8 +115,6 @@ examples: i2c@1120000 { compatible = "snps,designware-i2c"; reg = <0x1120000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; interrupts = <12 1>; clock-frequency = <400000>; i2c-sda-hold-time-ns = <300>; @@ -148,8 +142,6 @@ examples: reg = <0x100400 0x100>, <0x198 0x8>; pinctrl-0 = <&i2c_pins>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; interrupts = <8>; clocks = <&ahb_clk>; }; diff --git a/dts/Bindings/i3c/mipi-i3c-hci.yaml b/dts/Bindings/i3c/mipi-i3c-hci.yaml new file mode 100644 index 0000000000..07a7b10163 --- /dev/null +++ b/dts/Bindings/i3c/mipi-i3c-hci.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MIPI I3C HCI Device Tree Bindings + +maintainers: + - Nicolas Pitre <npitre@baylibre.com> + +description: | + MIPI I3C Host Controller Interface + + The MIPI I3C HCI (Host Controller Interface) specification defines + a common software driver interface to support compliant MIPI I3C + host controller hardware implementations from multiple vendors. + + The hardware is self-advertising for differences in implementation + capabilities, including the spec version it is based on, so there + isn't much to describe here (yet). + + For details, please see: + https://www.mipi.org/specifications/i3c-hci + +properties: + compatible: + const: mipi-i3c-hci + reg: + maxItems: 1 + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + i3c@a0000000 { + compatible = "mipi-i3c-hci"; + reg = <0xa0000000 0x2000>; + interrupts = <89>; + }; diff --git a/dts/Bindings/iio/accel/bma180.txt b/dts/Bindings/iio/accel/bma180.txt deleted file mode 100644 index 33da4a6fdb..0000000000 --- a/dts/Bindings/iio/accel/bma180.txt +++ /dev/null @@ -1,35 +0,0 @@ -* Bosch BMA023 / BMA150/ BMA180 / BMA25x / SMB380 triaxial acceleration sensor - -https://media.digikey.com/pdf/Data%20Sheets/Bosch/BMA150.pdf -http://omapworld.com/BMA180_111_1002839.pdf -http://ae-bst.resource.bosch.com/media/products/dokumente/bma250/bst-bma250-ds002-05.pdf - -Required properties: - - - compatible : should be one of: - "bosch,bma023" - "bosch,bma150" - "bosch,bma180" - "bosch,bma250" - "bosch,bma254" - "bosch,smb380" - - reg : the I2C address of the sensor - - vdd-supply : regulator phandle connected to the VDD pin - - vddio-supply : regulator phandle connected to the VDDIO pin - -Optional properties: - - - interrupts : interrupt mapping for GPIO IRQ, it should by configured with - flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING - For the bma250 the first interrupt listed must be the one - connected to the INT1 pin, the second (optional) interrupt - listed must be the one connected to the INT2 pin. - -Example: - -bma180@40 { - compatible = "bosch,bma180"; - reg = <0x40>; - interrupt-parent = <&gpio6>; - interrupts = <18 (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)>; -}; diff --git a/dts/Bindings/iio/accel/bosch,bma180.yaml b/dts/Bindings/iio/accel/bosch,bma180.yaml new file mode 100644 index 0000000000..45b3abde29 --- /dev/null +++ b/dts/Bindings/iio/accel/bosch,bma180.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/accel/bosch,bma180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bosch BMA023 / BMA150/ BMA180 / BMA25x / SMB380 triaxial accelerometers + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + https://media.digikey.com/pdf/Data%20Sheets/Bosch/BMA150.pdf + http://omapworld.com/BMA180_111_1002839.pdf + http://ae-bst.resource.bosch.com/media/products/dokumente/bma250/bst-bma250-ds002-05.pdf + +properties: + compatible: + enum: + - bosch,bma023 + - bosch,bma150 + - bosch,bma180 + - bosch,bma250 + - bosch,bma254 + - bosch,smb380 + + reg: + maxItems: 1 + + vdd-supply: true + + vddio-supply: true + + interrupts: + minItems: 1 + maxItems: 2 + description: | + Type should be either IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_EDGE_RISING. + For the bma250 the first interrupt listed must be the one + connected to the INT1 pin, the second (optional) interrupt + listed must be the one connected to the INT2 pin. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + accel@40 { + compatible = "bosch,bma180"; + reg = <0x40>; + interrupt-parent = <&gpio6>; + interrupts = <18 (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)>; + }; + }; +... diff --git a/dts/Bindings/iio/accel/bosch,bma255.yaml b/dts/Bindings/iio/accel/bosch,bma255.yaml new file mode 100644 index 0000000000..6eef3480ea --- /dev/null +++ b/dts/Bindings/iio/accel/bosch,bma255.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/accel/bosch,bma255.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bosch BMA255 and Similar Accelerometers + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: + 3 axis accelerometers with varying range and I2C or SPI + 4-wire interface. + +properties: + compatible: + enum: + - bosch,bmc150 + - bosch,bmi055 + - bosch,bma255 + - bosch,bma250e + - bosch,bma222 + - bosch,bma222e + - bosch,bma280 + + reg: + maxItems: 1 + + vdd-supply: true + vddio-supply: true + + interrupts: + maxItems: 1 + + mount-matrix: + description: an optional 3x3 mounting rotation matrix. + + spi-max-frequency: + maximum: 10000000 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + accelerometer@8 { + compatible = "bosch,bma222"; + reg = <0x08>; + vddio-supply = <&vddio>; + vdd-supply = <&vdd>; + interrupts = <57 IRQ_TYPE_EDGE_FALLING>; + }; + }; + - | + # include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + accel@0 { + compatible = "bosch,bma222"; + reg = <0>; + spi-max-frequency = <10000000>; + }; + }; +... diff --git a/dts/Bindings/iio/accel/dmard06.txt b/dts/Bindings/iio/accel/dmard06.txt deleted file mode 100644 index ce105a12c6..0000000000 --- a/dts/Bindings/iio/accel/dmard06.txt +++ /dev/null @@ -1,19 +0,0 @@ -Device tree bindings for Domintech DMARD05, DMARD06, DMARD07 accelerometers - -Required properties: - - compatible : Should be "domintech,dmard05" - or "domintech,dmard06" - or "domintech,dmard07" - - reg : I2C address of the chip. Should be 0x1c - -Example: - &i2c1 { - /* ... */ - - accelerometer@1c { - compatible = "domintech,dmard06"; - reg = <0x1c>; - }; - - /* ... */ - }; diff --git a/dts/Bindings/iio/accel/fsl,mma8452.yaml b/dts/Bindings/iio/accel/fsl,mma8452.yaml new file mode 100644 index 0000000000..b0dd2b4e11 --- /dev/null +++ b/dts/Bindings/iio/accel/fsl,mma8452.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/accel/fsl,mma8452.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Freescale MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC or FXLS8471Q + triaxial accelerometer + +maintainers: + - Martin Kepplinger <martin.kepplinger@theobroma-systems.com> + +properties: + compatible: + enum: + - fsl,mma8451 + - fsl,mma8452 + - fsl,mma8453 + - fsl,mma8652 + - fsl,mma8653 + - fsl,fxls8471 + + reg: + maxItems: 1 + + interrupts: + description: + 2 highly configurable interrupt lines exist. + minItems: 1 + maxItems: 2 + + interrupt-names: + description: Specify which interrupt line is in use. + items: + enum: + - INT1 + - INT2 + minItems: 1 + maxItems: 2 + + vdd-supply: true + vddio-supply: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + accel@1d { + compatible = "fsl,mma8453"; + reg = <0x1d>; + interrupt-parent = <&gpio1>; + interrupts = <5 0>; + interrupt-names = "INT2"; + }; + }; +... diff --git a/dts/Bindings/iio/accel/kionix,kxcjk1013.txt b/dts/Bindings/iio/accel/kionix,kxcjk1013.txt deleted file mode 100644 index ce950e162d..0000000000 --- a/dts/Bindings/iio/accel/kionix,kxcjk1013.txt +++ /dev/null @@ -1,24 +0,0 @@ -Kionix KXCJK-1013 Accelerometer device tree bindings - -Required properties: - -- compatible: Must be one of: - "kionix,kxcjk1013" - "kionix,kxcj91008" - "kionix,kxtj21009" - "kionix,kxtf9" - - reg: i2c slave address - -Optional properties: - - - mount-matrix: an optional 3x3 mounting rotation matrix - -Example: - -kxtf9@f { - compatible = "kionix,kxtf9"; - reg = <0x0F>; - mount-matrix = "0", "1", "0", - "1", "0", "0", - "0", "0", "1"; -}; diff --git a/dts/Bindings/iio/accel/kionix,kxcjk1013.yaml b/dts/Bindings/iio/accel/kionix,kxcjk1013.yaml new file mode 100644 index 0000000000..5667d09dfe --- /dev/null +++ b/dts/Bindings/iio/accel/kionix,kxcjk1013.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/accel/kionix,kxcjk1013.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kionix KXCJK-1013 Accelerometer + +maintainers: + - Robert Yang <decatf@gmail.com> + +properties: + compatible: + enum: + - kionix,kxcjk1013 + - kionix,kxcj91008 + - kionix,kxtj21009 + - kionix,kxtf9 + + reg: + maxItems: 1 + + mount-matrix: + description: an optional 3x3 mounting rotation matrix. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + accel@f { + compatible = "kionix,kxtf9"; + reg = <0x0F>; + mount-matrix = "0", "1", "0", + "1", "0", "0", + "0", "0", "1"; + }; + }; +... diff --git a/dts/Bindings/iio/accel/mma8452.txt b/dts/Bindings/iio/accel/mma8452.txt deleted file mode 100644 index e132394375..0000000000 --- a/dts/Bindings/iio/accel/mma8452.txt +++ /dev/null @@ -1,35 +0,0 @@ -Freescale MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC or FXLS8471Q -triaxial accelerometer - -Required properties: - - - compatible: should contain one of - * "fsl,mma8451" - * "fsl,mma8452" - * "fsl,mma8453" - * "fsl,mma8652" - * "fsl,mma8653" - * "fsl,fxls8471" - - - reg: the I2C address of the chip - -Optional properties: - - - interrupts: interrupt mapping for GPIO IRQ - - - interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's - interrupt line in use. - - - vdd-supply: phandle to the regulator that provides vdd power to the accelerometer. - - - vddio-supply: phandle to the regulator that provides vddio power to the accelerometer. - -Example: - - mma8453fc@1d { - compatible = "fsl,mma8453"; - reg = <0x1d>; - interrupt-parent = <&gpio1>; - interrupts = <5 0>; - interrupt-names = "INT2"; - }; diff --git a/dts/Bindings/iio/adc/adc.txt b/dts/Bindings/iio/adc/adc.txt deleted file mode 100644 index 5bbaa330a2..0000000000 --- a/dts/Bindings/iio/adc/adc.txt +++ /dev/null @@ -1,23 +0,0 @@ -Common ADCs properties - -Optional properties for child nodes: -- bipolar : Boolean, if set the channel is used in bipolar mode. -- diff-channels : Differential channels muxed for this ADC. The first value - specifies the positive input pin, the second value the negative - input pin. - -Example: - adc@0 { - compatible = "some,adc"; - ... - channel@0 { - bipolar; - diff-channels = <0 1>; - ... - }; - - channel@1 { - diff-channels = <2 3>; - ... - }; - }; diff --git a/dts/Bindings/iio/adc/adc.yaml b/dts/Bindings/iio/adc/adc.yaml new file mode 100644 index 0000000000..912a7635ed --- /dev/null +++ b/dts/Bindings/iio/adc/adc.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic IIO bindings for ADC channels + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: + A few properties are defined in a common way ADC channels. + +properties: + $nodename: + pattern: "^channel(@[0-9a-f]+)?$" + description: + A channel index should match reg. + + reg: + maxItems: 1 + + label: + $ref: /schemas/types.yaml#/definitions/string + description: Unique name to identify which channel this is. + + bipolar: + $ref: /schemas/types.yaml#/definitions/flag + description: If provided, the channel is to be used in bipolar mode. + + diff-channels: + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 2 + minItems: 2 + description: + Many ADCs have dual Muxes to allow different input pins to be routed + to both the positive and negative inputs of a differential ADC. + The first value specifies the positive input pin, the second + specifies the negative input pin. + +additionalProperties: true diff --git a/dts/Bindings/iio/adc/adi,ad7124.yaml b/dts/Bindings/iio/adc/adi,ad7124.yaml index f1c574c896..fb3d0dae9b 100644 --- a/dts/Bindings/iio/adc/adi,ad7124.yaml +++ b/dts/Bindings/iio/adc/adi,ad7124.yaml @@ -63,10 +63,10 @@ required: patternProperties: "^channel@([0-9]|1[0-5])$": + $ref: "adc.yaml" type: object description: | Represents the external channels which are connected to the ADC. - See Documentation/devicetree/bindings/iio/adc/adc.txt. properties: reg: @@ -88,15 +88,9 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 3] - diff-channels: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt - items: - minimum: 0 - maximum: 15 + diff-channels: true - bipolar: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt - type: boolean + bipolar: true adi,buffered-positive: description: Enable buffered mode for positive input. @@ -110,6 +104,8 @@ patternProperties: - reg - diff-channels + additionalProperties: false + additionalProperties: false examples: diff --git a/dts/Bindings/iio/adc/adi,ad7292.yaml b/dts/Bindings/iio/adc/adi,ad7292.yaml index 108d202b28..a3e39a40c9 100644 --- a/dts/Bindings/iio/adc/adi,ad7292.yaml +++ b/dts/Bindings/iio/adc/adi,ad7292.yaml @@ -45,10 +45,10 @@ required: patternProperties: "^channel@[0-7]$": + $ref: "adc.yaml" type: object description: | Represents the external channels which are connected to the ADC. - See Documentation/devicetree/bindings/iio/adc/adc.txt. properties: reg: @@ -58,13 +58,13 @@ patternProperties: - minimum: 0 maximum: 7 - diff-channels: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt - maxItems: 1 + diff-channels: true required: - reg + additionalProperties: true + additionalProperties: false examples: diff --git a/dts/Bindings/iio/adc/adi,ad7768-1.yaml b/dts/Bindings/iio/adc/adi,ad7768-1.yaml index 8f32800fe5..924477dfb8 100644 --- a/dts/Bindings/iio/adc/adi,ad7768-1.yaml +++ b/dts/Bindings/iio/adc/adi,ad7768-1.yaml @@ -29,6 +29,12 @@ properties: interrupts: maxItems: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + vref-supply: description: ADC reference voltage supply @@ -62,6 +68,24 @@ required: - spi-cpha - adi,sync-in-gpios +patternProperties: + "^channel@([0-9]|1[0-5])$": + type: object + description: | + Represents the external channels which are connected to the device. + + properties: + reg: + description: | + The channel number. + + label: + description: | + Unique name to identify which channel this is. + required: + - reg + additionalProperties: false + additionalProperties: false examples: @@ -85,6 +109,14 @@ examples: reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; clocks = <&ad7768_mclk>; clock-names = "mclk"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + label = "channel_0"; + }; }; }; ... diff --git a/dts/Bindings/iio/adc/at91-sama5d2_adc.txt b/dts/Bindings/iio/adc/at91-sama5d2_adc.txt deleted file mode 100644 index 07c59f301b..0000000000 --- a/dts/Bindings/iio/adc/at91-sama5d2_adc.txt +++ /dev/null @@ -1,50 +0,0 @@ -* AT91 SAMA5D2 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "atmel,sama5d2-adc" or "microchip,sam9x60-adc". - - reg: Should contain ADC registers location and length. - - interrupts: Should contain the IRQ line for the ADC. - - clocks: phandle to device clock. - - clock-names: Must be "adc_clk". - - vref-supply: Supply used as reference for conversions. - - vddana-supply: Supply for the adc device. - - atmel,min-sample-rate-hz: Minimum sampling rate, it depends on SoC. - - atmel,max-sample-rate-hz: Maximum sampling rate, it depends on SoC. - - atmel,startup-time-ms: Startup time expressed in ms, it depends on SoC. - - atmel,trigger-edge-type: One of possible edge types for the ADTRG hardware - trigger pin. When the specific edge type is detected, the conversion will - start. Possible values are rising, falling, or both. - This property uses the IRQ edge types values: IRQ_TYPE_EDGE_RISING , - IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH - -Optional properties: - - dmas: Phandle to dma channel for the ADC. - - dma-names: Must be "rx" when dmas property is being used. - See ../../dma/dma.txt for details. - - #io-channel-cells: in case consumer drivers are attached, this must be 1. - See <Documentation/devicetree/bindings/iio/iio-bindings.txt> for details. - -Properties for consumer drivers: - - Consumer drivers can be connected to this producer device, as specified - in <Documentation/devicetree/bindings/iio/iio-bindings.txt> - - Channels exposed are specified in: - <dt-bindings/iio/adc/at91-sama5d2_adc.txt> - -Example: - -adc: adc@fc030000 { - compatible = "atmel,sama5d2-adc"; - reg = <0xfc030000 0x100>; - interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&adc_clk>; - clock-names = "adc_clk"; - atmel,min-sample-rate-hz = <200000>; - atmel,max-sample-rate-hz = <20000000>; - atmel,startup-time-ms = <4>; - vddana-supply = <&vdd_3v3_lp_reg>; - vref-supply = <&vdd_3v3_lp_reg>; - atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>; - dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; - dma-names = "rx"; - #io-channel-cells = <1>; -} diff --git a/dts/Bindings/iio/adc/at91_adc.txt b/dts/Bindings/iio/adc/at91_adc.txt deleted file mode 100644 index f65b04fb79..0000000000 --- a/dts/Bindings/iio/adc/at91_adc.txt +++ /dev/null @@ -1,83 +0,0 @@ -* AT91's Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "atmel,<chip>-adc" - <chip> can be "at91sam9260", "at91sam9g45" or "at91sam9x5" - - reg: Should contain ADC registers location and length - - interrupts: Should contain the IRQ line for the ADC - - clock-names: tuple listing input clock names. - Required elements: "adc_clk", "adc_op_clk". - - clocks: phandles to input clocks. - - atmel,adc-channels-used: Bitmask of the channels muxed and enabled for this - device - - atmel,adc-startup-time: Startup Time of the ADC in microseconds as - defined in the datasheet - - atmel,adc-vref: Reference voltage in millivolts for the conversions - - atmel,adc-res: List of resolutions in bits supported by the ADC. List size - must be two at least. - - atmel,adc-res-names: Contains one identifier string for each resolution - in atmel,adc-res property. "lowres" and "highres" - identifiers are required. - -Optional properties: - - atmel,adc-use-external-triggers: Boolean to enable the external triggers - - atmel,adc-use-res: String corresponding to an identifier from - atmel,adc-res-names property. If not specified, the highest - resolution will be used. - - atmel,adc-sleep-mode: Boolean to enable sleep mode when no conversion - - atmel,adc-sample-hold-time: Sample and Hold Time in microseconds - - atmel,adc-ts-wires: Number of touchscreen wires. Should be 4 or 5. If this - value is set, then the adc driver will enable touchscreen - support. - NOTE: when adc touchscreen is enabled, the adc hardware trigger will be - disabled. Since touchscreen will occupy the trigger register. - - atmel,adc-ts-pressure-threshold: a pressure threshold for touchscreen. It - makes touch detection more precise. - -Optional trigger Nodes: - - Required properties: - * trigger-name: Name of the trigger exposed to the user - * trigger-value: Value to put in the Trigger register - to activate this trigger - - Optional properties: - * trigger-external: Is the trigger an external trigger? - -Examples: -adc0: adc@fffb0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "atmel,at91sam9260-adc"; - reg = <0xfffb0000 0x100>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&adc_clk>, <&adc_op_clk>; - clock-names = "adc_clk", "adc_op_clk"; - atmel,adc-channels-used = <0xff>; - atmel,adc-startup-time = <40>; - atmel,adc-use-external-triggers; - atmel,adc-vref = <3300>; - atmel,adc-res = <8 10>; - atmel,adc-res-names = "lowres", "highres"; - atmel,adc-use-res = "lowres"; - - trigger0 { - trigger-name = "external-rising"; - trigger-value = <0x1>; - trigger-external; - }; - trigger1 { - trigger-name = "external-falling"; - trigger-value = <0x2>; - trigger-external; - }; - - trigger2 { - trigger-name = "external-any"; - trigger-value = <0x3>; - trigger-external; - }; - - trigger3 { - trigger-name = "continuous"; - trigger-value = <0x6>; - }; -}; diff --git a/dts/Bindings/iio/adc/atmel,sama5d2-adc.yaml b/dts/Bindings/iio/adc/atmel,sama5d2-adc.yaml new file mode 100644 index 0000000000..79c13b408e --- /dev/null +++ b/dts/Bindings/iio/adc/atmel,sama5d2-adc.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AT91 SAMA5D2 Analog to Digital Converter (ADC) + +maintainers: + - Ludovic Desroches <ludovic.desroches@atmel.com> + - Eugen Hristev <eugen.hristev@microchip.com> + +properties: + compatible: + enum: + - atmel,sama5d2-adc + - microchip,sam9x60-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: adc_clk + + vref-supply: true + vddana-supply: true + + atmel,min-sample-rate-hz: + description: Minimum sampling rate, it depends on SoC. + + atmel,max-sample-rate-hz: + description: Maximum sampling rate, it depends on SoC. + + atmel,startup-time-ms: + description: Startup time expressed in ms, it depends on SoC. + + atmel,trigger-edge-type: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + One of possible edge types for the ADTRG hardware trigger pin. + When the specific edge type is detected, the conversion will + start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING + or IRQ_TYPE_EDGE_BOTH. + enum: [1, 2, 3] + + dmas: + maxItems: 1 + + dma-names: + const: rx + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - vddana-supply + - atmel,min-sample-rate-hz + - atmel,max-sample-rate-hz + - atmel,startup-time-ms + - atmel,trigger-edge-type + +examples: + - | + #include <dt-bindings/dma/at91.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + + adc@fc030000 { + compatible = "atmel,sama5d2-adc"; + reg = <0xfc030000 0x100>; + interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&adc_clk>; + clock-names = "adc_clk"; + atmel,min-sample-rate-hz = <200000>; + atmel,max-sample-rate-hz = <20000000>; + atmel,startup-time-ms = <4>; + vddana-supply = <&vdd_3v3_lp_reg>; + vref-supply = <&vdd_3v3_lp_reg>; + atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>; + dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; + dma-names = "rx"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/atmel,sama9260-adc.yaml b/dts/Bindings/iio/adc/atmel,sama9260-adc.yaml new file mode 100644 index 0000000000..e6a1f915b5 --- /dev/null +++ b/dts/Bindings/iio/adc/atmel,sama9260-adc.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AT91 sama9260 and similar Analog to Digital Converter (ADC) + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +properties: + compatible: + enum: + - atmel,at91sam9260-adc + - atmel,at91sam9rl-adc + - atmel,at91sam9g45-adc + - atmel,at91sam9x5-adc + - atmel,at91sama5d3-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: adc_clk + - const: adc_op_clk + + atmel,adc-channels-used: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Bitmask of the channels muxed and enabled for this device + + atmel,adc-startup-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Startup Time of the ADC in microseconds as defined in the datasheet + + atmel,adc-vref: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Reference voltage in millivolts for the conversions + + atmel,adc-use-external-triggers: + $ref: /schemas/types.yaml#/definitions/flag + description: Enable the external triggers + + atmel,adc-use-res: + $ref: /schemas/types.yaml#/definitions/string + description: + String corresponding to an identifier from atmel,adc-res-names property. + If not specified, the highest resolution will be used. + enum: + - "lowres" + - "highres" + + atmel,adc-sleep-mode: + $ref: /schemas/types.yaml#/definitions/flag + description: Enable sleep mode when no conversion + + atmel,adc-sample-hold-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Sample and Hold Time in microseconds + + atmel,adc-ts-wires: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Number of touchscreen wires. Must be set to enable touchscreen. + NOTE: when adc touchscreen is enabled, the adc hardware trigger will be + disabled. Since touchscreen will occupy the trigger register. + enum: + - 4 + - 5 + + atmel,adc-ts-pressure-threshold: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Pressure threshold for touchscreen. + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - atmel,adc-channels-used + - atmel,adc-startup-time + - atmel,adc-vref + +examples: + - | + #include <dt-bindings/dma/at91.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + + adc@fffb0000 { + compatible = "atmel,at91sam9260-adc"; + reg = <0xfffb0000 0x100>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&adc_clk>, <&adc_op_clk>; + clock-names = "adc_clk", "adc_op_clk"; + atmel,adc-channels-used = <0xff>; + atmel,adc-startup-time = <40>; + atmel,adc-use-external-triggers; + atmel,adc-vref = <3300>; + atmel,adc-use-res = "lowres"; + }; + }; +... diff --git a/dts/Bindings/iio/adc/axp20x_adc.txt b/dts/Bindings/iio/adc/axp20x_adc.txt deleted file mode 100644 index 7a63139139..0000000000 --- a/dts/Bindings/iio/adc/axp20x_adc.txt +++ /dev/null @@ -1,48 +0,0 @@ -* X-Powers AXP ADC bindings - -Required properties: - - compatible: should be one of: - - "x-powers,axp209-adc", - - "x-powers,axp221-adc", - - "x-powers,axp813-adc", - - #io-channel-cells: should be 1, - -Example: - -&axp22x { - adc { - compatible = "x-powers,axp221-adc"; - #io-channel-cells = <1>; - }; -}; - -ADC channels and their indexes per variant: - -AXP209 ------- - 0 | acin_v - 1 | acin_i - 2 | vbus_v - 3 | vbus_i - 4 | pmic_temp - 5 | gpio0_v - 6 | gpio1_v - 7 | ipsout_v - 8 | batt_v - 9 | batt_chrg_i -10 | batt_dischrg_i - -AXP22x ------- - 0 | pmic_temp - 1 | batt_v - 2 | batt_chrg_i - 3 | batt_dischrg_i - -AXP813 ------- - 0 | pmic_temp - 1 | gpio0_v - 2 | batt_v - 3 | batt_chrg_i - 4 | batt_dischrg_i diff --git a/dts/Bindings/iio/adc/brcm,iproc-static-adc.txt b/dts/Bindings/iio/adc/brcm,iproc-static-adc.txt deleted file mode 100644 index 7b1b1e4086..0000000000 --- a/dts/Bindings/iio/adc/brcm,iproc-static-adc.txt +++ /dev/null @@ -1,40 +0,0 @@ -* Broadcom's IPROC Static ADC controller - -Broadcom iProc ADC controller has 8 channels 10bit ADC. -Allows user to convert analog input voltage values to digital. - -Required properties: - -- compatible: Must be "brcm,iproc-static-adc" - -- adc-syscon: Handler of syscon node defining physical base address of the - controller and length of memory mapped region. - -- #io-channel-cells = <1>; As ADC has multiple outputs - refer to Documentation/devicetree/bindings/iio/iio-bindings.txt for details. - -- io-channel-ranges: - refer to Documentation/devicetree/bindings/iio/iio-bindings.txt for details. - -- clocks: Clock used for this block. - -- clock-names: Clock name should be given as tsc_clk. - -- interrupts: interrupt line number. - -For example: - - ts_adc_syscon: ts_adc_syscon@180a6000 { - compatible = "brcm,iproc-ts-adc-syscon","syscon"; - reg = <0x180a6000 0xc30>; - }; - - adc: adc@180a6000 { - compatible = "brcm,iproc-static-adc"; - adc-syscon = <&ts_adc_syscon>; - #io-channel-cells = <1>; - io-channel-ranges; - clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>; - clock-names = "tsc_clk"; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - }; diff --git a/dts/Bindings/iio/adc/brcm,iproc-static-adc.yaml b/dts/Bindings/iio/adc/brcm,iproc-static-adc.yaml new file mode 100644 index 0000000000..c562d25bee --- /dev/null +++ b/dts/Bindings/iio/adc/brcm,iproc-static-adc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/brcm,iproc-static-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom's IPROC Static ADC controller + +maintainers: + - Raveendra Padasalagi <raveendra.padasalagi@broadcom.com> + +description: | + Broadcom iProc ADC controller has 8 10bit channels + +properties: + compatible: + const: brcm,iproc-static-adc + + adc-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + syscon node defining physical base address of the controller and length + of memory mapped region. + + "#io-channel-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + const: tsc_clk + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - adc-syscon + - "#io-channel-cells" + - clocks + - clock-names + - interrupts + +examples: + - | + #include <dt-bindings/clock/bcm-cygnus.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + + ts_adc_syscon: ts_adc_syscon@180a6000 { + compatible = "brcm,iproc-ts-adc-syscon","syscon"; + reg = <0x180a6000 0xc30>; + }; + + adc { + compatible = "brcm,iproc-static-adc"; + adc-syscon = <&ts_adc_syscon>; + #io-channel-cells = <1>; + clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>; + clock-names = "tsc_clk"; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/envelope-detector.txt b/dts/Bindings/iio/adc/envelope-detector.txt deleted file mode 100644 index 27544bdd44..0000000000 --- a/dts/Bindings/iio/adc/envelope-detector.txt +++ /dev/null @@ -1,54 +0,0 @@ -Bindings for ADC envelope detector using a DAC and a comparator - -The DAC is used to find the peak level of an alternating voltage input -signal by a binary search using the output of a comparator wired to -an interrupt pin. Like so: - _ - | \ - input +------>-------|+ \ - | \ - .-------. | }---. - | | | / | - | dac|-->--|- / | - | | |_/ | - | | | - | | | - | irq|------<-------' - | | - '-------' - -Required properties: -- compatible: Should be "axentia,tse850-envelope-detector" -- io-channels: Channel node of the dac to be used for comparator input. -- io-channel-names: Should be "dac". -- interrupt specification for one client interrupt, - see ../../interrupt-controller/interrupts.txt for details. -- interrupt-names: Should be "comp". - -Example: - - &i2c { - dpot: mcp4651-104@28 { - compatible = "microchip,mcp4651-104"; - reg = <0x28>; - #io-channel-cells = <1>; - }; - }; - - dac: dac { - compatible = "dpot-dac"; - vref-supply = <®_3v3>; - io-channels = <&dpot 0>; - io-channel-names = "dpot"; - #io-channel-cells = <1>; - }; - - envelope-detector { - compatible = "axentia,tse850-envelope-detector"; - io-channels = <&dac 0>; - io-channel-names = "dac"; - - interrupt-parent = <&gpio>; - interrupts = <3 IRQ_TYPE_EDGE_FALLING>; - interrupt-names = "comp"; - }; diff --git a/dts/Bindings/iio/adc/envelope-detector.yaml b/dts/Bindings/iio/adc/envelope-detector.yaml new file mode 100644 index 0000000000..296d5459b4 --- /dev/null +++ b/dts/Bindings/iio/adc/envelope-detector.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/envelope-detector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC envelope detector using a DAC and a comparator + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + The DAC is used to find the peak level of an alternating voltage input + signal by a binary search using the output of a comparator wired to + an interrupt pin. Like so: + _ + | \ + input +------>-------|+ \ + | \ + .-------. | }---. + | | | / | + | dac|-->--|- / | + | | |_/ | + | | | + | | | + | irq|------<-------' + | | + '-------' + +properties: + compatible: + const: axentia,tse850-envelope-detector + + io-channels: + maxItems: 1 + description: Channel node of the dac to be used for comparator input. + + io-channel-names: + const: dac + + interrupts: + maxItems: 1 + + interrupt-names: + const: comp + +required: + - compatible + - io-channels + - io-channel-names + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + dpot: dpot@28 { + compatible = "microchip,mcp4651-104"; + reg = <0x28>; + #io-channel-cells = <1>; + }; + }; + + dac: dac { + compatible = "dpot-dac"; + vref-supply = <®_3v3>; + io-channels = <&dpot 0>; + io-channel-names = "dpot"; + #io-channel-cells = <1>; + }; + + envelope-detector { + compatible = "axentia,tse850-envelope-detector"; + io-channels = <&dac 0>; + io-channel-names = "dac"; + + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "comp"; + }; +... diff --git a/dts/Bindings/iio/adc/lltc,ltc2496.yaml b/dts/Bindings/iio/adc/lltc,ltc2496.yaml index 6a991e9f78..2716d4e953 100644 --- a/dts/Bindings/iio/adc/lltc,ltc2496.yaml +++ b/dts/Bindings/iio/adc/lltc,ltc2496.yaml @@ -17,8 +17,7 @@ properties: - lltc,ltc2496 vref-supply: - description: phandle to an external regulator providing the reference voltage - $ref: /schemas/types.yaml#/definitions/phandle + description: Power supply for the reference voltage reg: description: spi chipselect number according to the usual spi bindings diff --git a/dts/Bindings/iio/adc/maxim,max1027.yaml b/dts/Bindings/iio/adc/maxim,max1027.yaml new file mode 100644 index 0000000000..46b7747076 --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max1027.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max1027.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX1027 and similar ADCs + +maintainers: + - Miquel Raynal <miquel.raynal@bootlin.com> + - Philippe Reynes <tremyfr@yahoo.fr> + +description: | + 300ks/s SPI ADCs with temperature sensors. + +properties: + compatible: + enum: + # 10-bit 8 channels + - maxim,max1027 + # 10-bit 12 channels + - maxim,max1029 + # 10-bit 16 channels + - maxim,max1031 + # 12-bit 8 channels + - maxim,max1227 + # 12-bit 12 channels + - maxim,max1229 + # 12-bit 16 channels + - maxim,max1231 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + spi-max-frequency: + maximum: 10000000 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + maxadc: adc@0 { + compatible = "maxim,max1027"; + reg = <0>; + #io-channel-cells = <1>; + interrupt-parent = <&gpio5>; + interrupts = <15 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/mediatek,mt2701-auxadc.yaml b/dts/Bindings/iio/adc/mediatek,mt2701-auxadc.yaml new file mode 100644 index 0000000000..5b21a9fba5 --- /dev/null +++ b/dts/Bindings/iio/adc/mediatek,mt2701-auxadc.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx) + +maintainers: + - Zhiyong Tao <zhiyong.tao@mediatek.com> + - Matthias Brugger <matthias.bgg@gmail.com> + +description: | + The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found + in some Mediatek SoCs which among other things measures the temperatures + in the SoC. It can be used directly with register accesses, but it is also + used by thermal controller which reads the temperatures from the AUXADC + directly via its own bus interface. See mediatek-thermal bindings + for the Thermal Controller which holds a phandle to the AUXADC. + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt2701-auxadc + - mediatek,mt2712-auxadc + - mediatek,mt6765-auxadc + - mediatek,mt7622-auxadc + - mediatek,mt8173-auxadc + - items: + - enum: + - mediatek,mt7623-auxadc + - const: mediatek,mt2701-auxadc + - items: + - enum: + - mediatek,mt8183-auxadc + - mediatek,mt8516-auxadc + - const: mediatek,mt8173-auxadc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: main + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - "#io-channel-cells" + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + adc@11001000 { + compatible = "mediatek,mt8183-auxadc", + "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_AUXADC>; + clock-names = "main"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/mediatek,mt6360-adc.yaml b/dts/Bindings/iio/adc/mediatek,mt6360-adc.yaml new file mode 100644 index 0000000000..db4e3613c1 --- /dev/null +++ b/dts/Bindings/iio/adc/mediatek,mt6360-adc.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/mediatek,mt6360-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT6360 and similar ADCs + +maintainers: + - Gene Chen <gene_chen@richtek.com> + +properties: + compatible: + const: mediatek,mt6360-adc + + "#io-channel-cells": + const: 1 + +required: + - compatible + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + adc { + compatible = "mediatek,mt6360-adc"; + #io-channel-cells = <1>; + }; +... diff --git a/dts/Bindings/iio/adc/mt6577_auxadc.txt b/dts/Bindings/iio/adc/mt6577_auxadc.txt deleted file mode 100644 index 78c06e05c8..0000000000 --- a/dts/Bindings/iio/adc/mt6577_auxadc.txt +++ /dev/null @@ -1,33 +0,0 @@ -* Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc (mt65xx/mt81xx/mt27xx) -=============== - -The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found -in some Mediatek SoCs which among other things measures the temperatures -in the SoC. It can be used directly with register accesses, but it is also -used by thermal controller which reads the temperatures from the AUXADC -directly via its own bus interface. See -Documentation/devicetree/bindings/thermal/mediatek-thermal.txt -for the Thermal Controller which holds a phandle to the AUXADC. - -Required properties: - - compatible: Should be one of: - - "mediatek,mt2701-auxadc": For MT2701 family of SoCs - - "mediatek,mt2712-auxadc": For MT2712 family of SoCs - - "mediatek,mt6765-auxadc": For MT6765 family of SoCs - - "mediatek,mt7622-auxadc": For MT7622 family of SoCs - - "mediatek,mt8173-auxadc": For MT8173 family of SoCs - - "mediatek,mt8183-auxadc", "mediatek,mt8173-auxadc": For MT8183 family of SoCs - - reg: Address range of the AUXADC unit. - - clocks: Should contain a clock specifier for each entry in clock-names - - clock-names: Should contain "main". - - #io-channel-cells: Should be 1, see ../iio-bindings.txt - -Example: - -auxadc: adc@11001000 { - compatible = "mediatek,mt2701-auxadc"; - reg = <0 0x11001000 0 0x1000>; - clocks = <&pericfg CLK_PERI_AUXADC>; - clock-names = "main"; - #io-channel-cells = <1>; -}; diff --git a/dts/Bindings/iio/adc/palmas-gpadc.txt b/dts/Bindings/iio/adc/palmas-gpadc.txt deleted file mode 100644 index 4bb9a86065..0000000000 --- a/dts/Bindings/iio/adc/palmas-gpadc.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Palmas general purpose ADC IP block devicetree bindings - -Channels list: - 0 battery type - 1 battery temp NTC (optional current source) - 2 GP - 3 temp (with ext. diode, optional current source) - 4 GP - 5 GP - 6 VBAT_SENSE - 7 VCC_SENSE - 8 Backup Battery voltage - 9 external charger (VCHG) - 10 VBUS - 11 DC-DC current probe (how does this work?) - 12 internal die temp - 13 internal die temp - 14 USB ID pin voltage - 15 test network - -Required properties: -- compatible : Must be "ti,palmas-gpadc". -- #io-channel-cells: Should be set to <1>. - -Optional sub-nodes: -ti,channel0-current-microamp: Channel 0 current in uA. - Values are rounded to derive 0uA, 5uA, 15uA, 20uA. -ti,channel3-current-microamp: Channel 3 current in uA. - Values are rounded to derive 0uA, 10uA, 400uA, 800uA. -ti,enable-extended-delay: Enable extended delay. - -Example: - -pmic { - compatible = "ti,twl6035-pmic", "ti,palmas-pmic"; - ... - gpadc { - compatible = "ti,palmas-gpadc"; - interrupts = <18 0 - 16 0 - 17 0>; - #io-channel-cells = <1>; - ti,channel0-current-microamp = <5>; - ti,channel3-current-microamp = <10>; - }; - }; - ... -}; diff --git a/dts/Bindings/iio/adc/qcom,pm8018-adc.yaml b/dts/Bindings/iio/adc/qcom,pm8018-adc.yaml new file mode 100644 index 0000000000..d186b713d6 --- /dev/null +++ b/dts/Bindings/iio/adc/qcom,pm8018-adc.yaml @@ -0,0 +1,166 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's PM8xxx voltage XOADC + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: | + The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal + oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921. + +properties: + compatible: + enum: + - qcom,pm8018-adc + - qcom,pm8038-adc + - qcom,pm8058-adc + - qcom,pm8921-adc + + reg: + maxItems: 1 + description: + ADC base address in the PMIC, typically 0x197. + + xoadc-ref-supply: + description: + The reference voltage may vary with PMIC variant but is typically + something like 2.2 or 1.8V. + + interrupts: + maxItems: 1 + + "#address-cells": + const: 2 + description: + The first cell is the prescaler (on PM8058) or premux (on PM8921) + with two valid bits so legal values are 0x00, 0x01 or 0x02. + The second cell is the main analog mux setting (0x00..0x0f). + The combination of prescaler/premux and analog mux uniquely addresses + a hardware channel on all systems. + + "#size-cells": + const: 0 + + "#io-channel-cells": + const: 2 + description: + The cells are precaler or premux followed by the analog muxing line. + +additionalProperties: false + +required: + - compatible + - reg + - "#io-channel-cells" + - "#address-cells" + - "#size-cells" + - adc-channel@c + - adc-channel@d + - adc-channel@f + +patternProperties: + "^(adc-channel@)[0-9a-f]$": + type: object + description: | + ADC channel specific configuration. + Note that channels c, d and f must be present for calibration. + These three nodes are used for absolute and ratiometric calibration + and only need to have these reg values: they are by hardware definition + 1:1 ratio converters that sample 625, 1250 and 0 milliV and create + an interpolation calibration for all other ADCs. + + properties: + reg: + maxItems: 1 + + qcom,decimation: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + This parameter is used to decrease the ADC sampling rate. + Quicker measurements can be made by reducing the decimation ratio. + Valid values are 512, 1024, 2048, 4096. + If the property is not found, a default value of 512 will be used. + + qcom,ratiometric: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Channel calibration type. If this property is specified + VADC will use a special voltage references for channel + calibration. The available references are specified in the + as a u32 value setting (see below) and it is compulsory + to also specify this reference if ratiometric calibration + is selected. + + If the property is not found, the channel will be + calibrated with the 0.625V and 1.25V reference channels, also + known as an absolute calibration. + + The reference voltage pairs when using ratiometric calibration: + 0 = XO_IN/XOADC_GND + 1 = PMIC_IN/XOADC_GND + 2 = PMIC_IN/BMS_CSP + 3 (invalid) + 4 = XOADC_GND/XOADC_GND + 5 = XOADC_VREF/XOADC_GND + + additionalProperties: false + + required: + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + pmic { + #address-cells = <1>; + #size-cells = <0>; + + adc@197 { + compatible = "qcom,pm8058-adc"; + reg = <0x197>; + interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>; + #address-cells = <2>; + #size-cells = <0>; + #io-channel-cells = <2>; + + vcoin: adc-channel@0 { + reg = <0x00 0x00>; + }; + vbat: adc-channel@1 { + reg = <0x00 0x01>; + }; + dcin: adc-channel@2 { + reg = <0x00 0x02>; + }; + ichg: adc-channel@3 { + reg = <0x00 0x03>; + }; + vph_pwr: adc-channel@4 { + reg = <0x00 0x04>; + }; + usb_vbus: adc-channel@a { + reg = <0x00 0x0a>; + }; + die_temp: adc-channel@b { + reg = <0x00 0x0b>; + }; + ref_625mv: adc-channel@c { + reg = <0x00 0x0c>; + }; + ref_1250mv: adc-channel@d { + reg = <0x00 0x0d>; + }; + ref_325mv: adc-channel@e { + reg = <0x00 0x0e>; + }; + ref_muxoff: adc-channel@f { + reg = <0x00 0x0f>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/qcom,pm8xxx-xoadc.txt b/dts/Bindings/iio/adc/qcom,pm8xxx-xoadc.txt deleted file mode 100644 index 3ae0612778..0000000000 --- a/dts/Bindings/iio/adc/qcom,pm8xxx-xoadc.txt +++ /dev/null @@ -1,157 +0,0 @@ -Qualcomm's PM8xxx voltage XOADC - -The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal -oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921. - -Required properties: - -- compatible: should be one of: - "qcom,pm8018-adc" - "qcom,pm8038-adc" - "qcom,pm8058-adc" - "qcom,pm8921-adc" - -- reg: should contain the ADC base address in the PMIC, typically - 0x197. - -- xoadc-ref-supply: should reference a regulator that can supply - a reference voltage on demand. The reference voltage may vary - with PMIC variant but is typically something like 2.2 or 1.8V. - -The following required properties are standard for IO channels, see -iio-bindings.txt for more details, but notice that this particular -ADC has a special addressing scheme that require two cells for -identifying each ADC channel: - -- #address-cells: should be set to <2>, the first cell is the - prescaler (on PM8058) or premux (on PM8921) with two valid bits - so legal values are 0x00, 0x01 or 0x02. The second cell - is the main analog mux setting (0x00..0x0f). The combination - of prescaler/premux and analog mux uniquely addresses a hardware - channel on all systems. - -- #size-cells: should be set to <0> - -- #io-channel-cells: should be set to <2>, again the cells are - precaler or premux followed by the analog muxing line. - -- interrupts: should refer to the parent PMIC interrupt controller - and reference the proper ADC interrupt. - -Required subnodes: - -The ADC channels are configured as subnodes of the ADC. - -Since some of them are used for calibrating the ADC, these nodes are -compulsory: - -adc-channel@c { - reg = <0x00 0x0c>; -}; - -adc-channel@d { - reg = <0x00 0x0d>; -}; - -adc-channel@f { - reg = <0x00 0x0f>; -}; - -These three nodes are used for absolute and ratiometric calibration -and only need to have these reg values: they are by hardware definition -1:1 ratio converters that sample 625, 1250 and 0 milliV and create -an interpolation calibration for all other ADCs. - -Optional subnodes: any channels other than channels [0x00 0x0c], -[0x00 0x0d] and [0x00 0x0f] are optional. - -Required channel node properties: - -- reg: should contain the hardware channel number in the range - 0 .. 0xff (8 bits). - -Optional channel node properties: - -- qcom,decimation: - Value type: <u32> - Definition: This parameter is used to decrease the ADC sampling rate. - Quicker measurements can be made by reducing the decimation ratio. - Valid values are 512, 1024, 2048, 4096. - If the property is not found, a default value of 512 will be used. - -- qcom,ratiometric: - Value type: <u32> - Definition: Channel calibration type. If this property is specified - VADC will use a special voltage references for channel - calibration. The available references are specified in the - as a u32 value setting (see below) and it is compulsory - to also specify this reference if ratiometric calibration - is selected. - - If the property is not found, the channel will be - calibrated with the 0.625V and 1.25V reference channels, also - known as an absolute calibration. - The reference voltage pairs when using ratiometric calibration: - 0 = XO_IN/XOADC_GND - 1 = PMIC_IN/XOADC_GND - 2 = PMIC_IN/BMS_CSP - 3 (invalid) - 4 = XOADC_GND/XOADC_GND - 5 = XOADC_VREF/XOADC_GND - -Example: - -xoadc: xoadc@197 { - compatible = "qcom,pm8058-adc"; - reg = <0x197>; - interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>; - #address-cells = <2>; - #size-cells = <0>; - #io-channel-cells = <2>; - - vcoin: adc-channel@0 { - reg = <0x00 0x00>; - }; - vbat: adc-channel@1 { - reg = <0x00 0x01>; - }; - dcin: adc-channel@2 { - reg = <0x00 0x02>; - }; - ichg: adc-channel@3 { - reg = <0x00 0x03>; - }; - vph_pwr: adc-channel@4 { - reg = <0x00 0x04>; - }; - usb_vbus: adc-channel@a { - reg = <0x00 0x0a>; - }; - die_temp: adc-channel@b { - reg = <0x00 0x0b>; - }; - ref_625mv: adc-channel@c { - reg = <0x00 0x0c>; - }; - ref_1250mv: adc-channel@d { - reg = <0x00 0x0d>; - }; - ref_325mv: adc-channel@e { - reg = <0x00 0x0e>; - }; - ref_muxoff: adc-channel@f { - reg = <0x00 0x0f>; - }; -}; - -/* IIO client node */ -iio-hwmon { - compatible = "iio-hwmon"; - io-channels = <&xoadc 0x00 0x01>, /* Battery */ - <&xoadc 0x00 0x02>, /* DC in (charger) */ - <&xoadc 0x00 0x04>, /* VPH the main system voltage */ - <&xoadc 0x00 0x0b>, /* Die temperature */ - <&xoadc 0x00 0x0c>, /* Reference voltage 1.25V */ - <&xoadc 0x00 0x0d>, /* Reference voltage 0.625V */ - <&xoadc 0x00 0x0e>; /* Reference voltage 0.325V */ -}; diff --git a/dts/Bindings/iio/adc/qcom,spmi-iadc.txt b/dts/Bindings/iio/adc/qcom,spmi-iadc.txt deleted file mode 100644 index 4e36d6e2f7..0000000000 --- a/dts/Bindings/iio/adc/qcom,spmi-iadc.txt +++ /dev/null @@ -1,46 +0,0 @@ -Qualcomm's SPMI PMIC current ADC - -QPNP PMIC current ADC (IADC) provides interface to clients to read current. -A 16 bit ADC is used for current measurements. IADC can measure the current -through an external resistor (channel 1) or internal (built-in) resistor -(channel 0). When using an external resistor it is to be described by -qcom,external-resistor-micro-ohms property. - -IADC node: - -- compatible: - Usage: required - Value type: <string> - Definition: Should contain "qcom,spmi-iadc". - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: IADC base address and length in the SPMI PMIC register map - -- interrupts: - Usage: optional - Value type: <prop-encoded-array> - Definition: End of ADC conversion. - -- qcom,external-resistor-micro-ohms: - Usage: optional - Value type: <u32> - Definition: Sense resister value in micro Ohm. - If not defined value of 10000 micro Ohms will be used. - -Example: - /* IADC node */ - pmic_iadc: iadc@3600 { - compatible = "qcom,spmi-iadc"; - reg = <0x3600 0x100>; - interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; - qcom,external-resistor-micro-ohms = <10000>; - #io-channel-cells = <1>; - }; - - /* IIO client node */ - bat { - io-channels = <&pmic_iadc 0>; - io-channel-names = "iadc"; - }; diff --git a/dts/Bindings/iio/adc/qcom,spmi-iadc.yaml b/dts/Bindings/iio/adc/qcom,spmi-iadc.yaml new file mode 100644 index 0000000000..27e3108661 --- /dev/null +++ b/dts/Bindings/iio/adc/qcom,spmi-iadc.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-iadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC current ADC + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + QPNP PMIC current ADC (IADC) provides interface to clients to read current. + A 16 bit ADC is used for current measurements. IADC can measure the current + through an external resistor (channel 1) or internal (built-in) resistor + (channel 0). When using an external resistor it is to be described by + qcom,external-resistor-micro-ohms property. + +properties: + compatible: + const: qcom,spmi-iadc + + reg: + description: IADC base address and length in the SPMI PMIC register map + maxItems: 1 + + qcom,external-resistor-micro-ohms: + description: + Sensor resistor value. If not defined value of 10000 micro Ohms + will be used. + + interrupts: + maxItems: 1 + description: + End of conversion interrupt. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spmi_bus { + #address-cells = <1>; + #size-cells = <0>; + pmic_iadc: adc@3600 { + compatible = "qcom,spmi-iadc"; + reg = <0x3600 0x100>; + interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; + qcom,external-resistor-micro-ohms = <10000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml b/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml index 7f4f827c57..95cc705b96 100644 --- a/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml +++ b/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml @@ -48,8 +48,6 @@ properties: description: End of conversion interrupt. - io-channel-ranges: true - required: - compatible - reg @@ -249,7 +247,6 @@ examples: #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; - io-channel-ranges; /* Channel node */ adc-chan@39 { diff --git a/dts/Bindings/iio/adc/renesas,gyroadc.txt b/dts/Bindings/iio/adc/renesas,gyroadc.txt deleted file mode 100644 index df5b9f2ad8..0000000000 --- a/dts/Bindings/iio/adc/renesas,gyroadc.txt +++ /dev/null @@ -1,98 +0,0 @@ -* Renesas R-Car GyroADC device driver - -The GyroADC block is a reduced SPI block with up to 8 chipselect lines, -which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs -are sampled by the GyroADC block in a round-robin fashion and the result -presented in the GyroADC registers. - -Required properties: -- compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc". - The <soc-specific> should be one of: - renesas,r8a7791-gyroadc - for the GyroADC block present - in r8a7791 SoC - renesas,r8a7792-gyroadc - for the GyroADC with interrupt - block present in r8a7792 SoC -- reg: Address and length of the register set for the device -- clocks: References to all the clocks specified in the clock-names - property as specified in - Documentation/devicetree/bindings/clock/clock-bindings.txt. -- clock-names: Shall contain "fck". The "fck" is the GyroADC block clock. -- power-domains: Must contain a reference to the PM domain, if available. -- #address-cells: Should be <1> (setting for the subnodes) for all ADCs - except for "fujitsu,mb88101a". Should be <0> (setting for - only subnode) for "fujitsu,mb88101a". -- #size-cells: Should be <0> (setting for the subnodes) - -Sub-nodes: -You must define subnode(s) which select the connected ADC type and reference -voltage for the GyroADC channels. - -Required properties for subnodes: -- compatible: Should be either of: - "fujitsu,mb88101a" - - Fujitsu MB88101A compatible mode, - 12bit sampling, up to 4 channels can be sampled in - round-robin fashion. One Fujitsu chip supplies four - GyroADC channels with data as it contains four ADCs - on the chip and thus for 4-channel operation, single - MB88101A is required. The Cx chipselect lines of the - MB88101A connect directly to two CHS lines of the - GyroADC, no demuxer is required. The data out line - of each MB88101A connects to a shared input pin of - the GyroADC. - "ti,adcs7476" or "ti,adc121" or "adi,ad7476" - - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, - 15bit sampling, up to 8 channels can be sampled in - round-robin fashion. One TI/ADI chip supplies single - ADC channel with data, thus for 8-channel operation, - 8 chips are required. A 3:8 chipselect demuxer is - required to connect the nCS line of the TI/ADI chips - to the GyroADC, while MISO line of each TI/ADI ADC - connects to a shared input pin of the GyroADC. - "maxim,max1162" or "maxim,max11100" - - Maxim MAX1162 / Maxim MAX11100 compatible mode, - 16bit sampling, up to 8 channels can be sampled in - round-robin fashion. One Maxim chip supplies single - ADC channel with data, thus for 8-channel operation, - 8 chips are required. A 3:8 chipselect demuxer is - required to connect the nCS line of the MAX chips - to the GyroADC, while MISO line of each Maxim ADC - connects to a shared input pin of the GyroADC. -- reg: Should be the number of the analog input. Should be present - for all ADCs except "fujitsu,mb88101a". -- vref-supply: Reference to the channel reference voltage regulator. - -Example: - vref_max1162: regulator-vref-max1162 { - compatible = "regulator-fixed"; - - regulator-name = "MAX1162 Vref"; - regulator-min-microvolt = <4096000>; - regulator-max-microvolt = <4096000>; - }; - - adc@e6e54000 { - compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; - reg = <0 0xe6e54000 0 64>; - clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - - pinctrl-0 = <&adc_pins>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - - adc@0 { - reg = <0>; - compatible = "maxim,max1162"; - vref-supply = <&vref_max1162>; - }; - - adc@1 { - reg = <1>; - compatible = "maxim,max1162"; - vref-supply = <&vref_max1162>; - }; - }; diff --git a/dts/Bindings/iio/adc/renesas,rcar-gyroadc.yaml b/dts/Bindings/iio/adc/renesas,rcar-gyroadc.yaml new file mode 100644 index 0000000000..c115e2e99b --- /dev/null +++ b/dts/Bindings/iio/adc/renesas,rcar-gyroadc.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R-Car GyroADC + +maintainers: + - Marek Vasut <marek.vasut+renesas@gmail.com> + +description: | + The GyroADC block is a reduced SPI block with up to 8 chipselect lines, + which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs + are sampled by the GyroADC block in a round-robin fashion and the result + presented in the GyroADC registers. + The ADC bindings should match with that of the devices connected to a + full featured SPI bus. + +properties: + compatible: + items: + - enum: + - renesas,r8a7791-gyroadc + - renesas,r8a7792-gyroadc + - const: renesas,rcar-gyroadc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: fck + + power-domains: true + + resets: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - "#address-cells" + - "#size-cells" + +patternProperties: + "@[0-7]$": + type: object + properties: + compatible: + description: | + fujitsu,mb88101a + - Fujitsu MB88101A compatible mode, + 12bit sampling, up to 4 channels can be sampled in round-robin + fashion. One Fujitsu chip supplies four GyroADC channels with + data as it contains four ADCs on the chip and thus for 4-channel + operation, single MB88101A is required. The Cx chipselect lines + of the MB88101A connect directly to two CHS lines of the GyroADC, + no demuxer is required. The data out line of each MB88101A + connects to a shared input pin of the GyroADC. + ti,adcs7476 or ti,adc121 or adi,ad7476 + - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit + sampling, up to 8 channels can be sampled in round-robin + fashion. One TI/ADI chip supplies single ADC channel with data, + thus for 8-channel operation, 8 chips are required. + A 3:8 chipselect demuxer is required to connect the nCS line + of the TI/ADI chips to the GyroADC, while MISO line of each + TI/ADI ADC connects to a shared input pin of the GyroADC. + maxim,max1162 or maxim,max11100 + - Maxim MAX1162 / Maxim MAX11100 compatible mode, 16bit sampling, + up to 8 channels can be sampled in round-robin fashion. One + Maxim chip supplies single ADC channel with data, thus for + 8-channel operation, 8 chips are required. + A 3:8 chipselect demuxer is required to connect the nCS line + of the MAX chips to the GyroADC, while MISO line of each Maxim + ADC connects to a shared input pin of the GyroADC. + enum: + - adi,7476 + - fujitsu,mb88101a + - maxim,max1162 + - maxim,max11100 + - ti,adcs7476 + - ti,adc121 + + reg: + minimum: 0 + maximum: 7 + + vref-supply: true + + additionalProperties: false + + required: + - compatible + - reg + - vref-supply + +examples: + - | + #include <dt-bindings/clock/r8a7791-clock.h> + #include <dt-bindings/power/r8a7791-sysc.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + adc@e6e54000 { + compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; + reg = <0 0xe6e54000 0 64>; + clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + + pinctrl-0 = <&adc_pins>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + reg = <0>; + compatible = "maxim,max1162"; + vref-supply = <&vref_max1162>; + }; + + adc@1 { + reg = <1>; + compatible = "maxim,max1162"; + vref-supply = <&vref_max1162>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/samsung,exynos-adc.yaml b/dts/Bindings/iio/adc/samsung,exynos-adc.yaml index 5ebb0ab250..c65921e66d 100644 --- a/dts/Bindings/iio/adc/samsung,exynos-adc.yaml +++ b/dts/Bindings/iio/adc/samsung,exynos-adc.yaml @@ -49,8 +49,6 @@ properties: "#io-channel-cells": const: 1 - io-channel-ranges: true - vdd-supply: true samsung,syscon-phandle: @@ -130,7 +128,6 @@ examples: reg = <0x12d10000 0x100>; interrupts = <0 106 0>; #io-channel-cells = <1>; - io-channel-ranges; clocks = <&clock 303>; clock-names = "adc"; @@ -156,7 +153,6 @@ examples: reg = <0x126C0000 0x100>; interrupts = <0 137 0>; #io-channel-cells = <1>; - io-channel-ranges; clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; diff --git a/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml index d61bc011e8..6f2398cdc8 100644 --- a/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml +++ b/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml @@ -199,8 +199,6 @@ patternProperties: description: From common IIO binding. Used to pipe external sigma delta modulator or internal ADC output to DFSDM channel. - This is not required for "st,stm32-dfsdm-pdm" compatibility as - PDM microphone is binded in Audio DT node. required: - io-channels @@ -235,6 +233,10 @@ patternProperties: description: child node properties: + compatible: + enum: + - st,stm32h7-dfsdm-dai + "#sound-dai-cells": const: 0 @@ -244,6 +246,7 @@ patternProperties: modulator or internal ADC output to DFSDM channel. required: + - compatible - "#sound-dai-cells" - io-channels diff --git a/dts/Bindings/iio/adc/ti,adc084s021.yaml b/dts/Bindings/iio/adc/ti,adc084s021.yaml new file mode 100644 index 0000000000..1a113b30a4 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc084s021.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc084s021.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC084S021 ADC + +maintainers: + - MÃ¥rten Lindahl <martenli@axis.com> + +description: | + 8 bit ADC with 4 channels + +properties: + compatible: + const: ti,adc084s021 + + reg: + maxItems: 1 + + spi-max-frequency: true + + vref-supply: + description: External reference, needed to establish input scaling + + spi-cpol: true + spi-cpha: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + - spi-cpol + - spi-cpha + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc084s021"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-cpol; + spi-cpha; + spi-max-frequency = <16000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads124s08.yaml b/dts/Bindings/iio/adc/ti,ads124s08.yaml new file mode 100644 index 0000000000..9f5e96439c --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads124s08.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads124s08.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments' ads124s08 and ads124s06 ADC chip + +maintainers: + - Dan Murphy <dmurphy@ti.com> + +properties: + compatible: + enum: + - ti,ads124s06 + - ti,ads124s08 + + reg: + maxItems: 1 + + spi-max-frequency: true + + spi-cpha: true + + reset-gpios: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads124s08"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpha; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml b/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml new file mode 100644 index 0000000000..692dacd0fe --- /dev/null +++ b/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,palmas-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Palmas general purpose ADC IP block devicetree bindings + +maintainers: + - Tony Lindgren <tony@atomide.com> + +description: | + This ADC is often used to provide channels via the io-channels + consumer framework. + Channels list: + 0 battery type + 1 battery temp NTC (optional current source) + 2 GP + 3 temp (with ext. diode, optional current source) + 4 GP + 5 GP + 6 VBAT_SENSE + 7 VCC_SENSE + 8 Backup Battery voltage + 9 external charger (VCHG) + 10 VBUS + 11 DC-DC current probe (how does this work?) + 12 internal die temp + 13 internal die temp + 14 USB ID pin voltage + 15 test network + +properties: + compatible: + const: ti,palmas-gpadc + + interrupts: + minItems: 1 + maxItems: 3 + + "#io-channel-cells": + const: 1 + + ti,channel0-current-microamp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Channel 0 current in uA. + enum: + - 0 + - 5 + - 15 + - 20 + + ti,channel3-current-microamp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Channel 3 current in uA. + enum: + - 0 + - 10 + - 400 + - 800 + + ti,enable-extended-delay: + $ref: /schemas/types.yaml#/definitions/flag + description: Enable extended delay. + +additionalProperties: false + +required: + - compatible + - "#io-channel-cells" + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + pmic { + compatible = "ti,twl6035-pmic", "ti,palmas-pmic"; + adc { + compatible = "ti,palmas-gpadc"; + interrupts = <18 0 + 16 0 + 17 0>; + #io-channel-cells = <1>; + ti,channel0-current-microamp = <5>; + ti,channel3-current-microamp = <10>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti-adc084s021.txt b/dts/Bindings/iio/adc/ti-adc084s021.txt deleted file mode 100644 index 4259e50620..0000000000 --- a/dts/Bindings/iio/adc/ti-adc084s021.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments' ADC084S021 - -Required properties: - - compatible : Must be "ti,adc084s021" - - reg : SPI chip select number for the device - - vref-supply : The regulator supply for ADC reference voltage - - spi-cpol : Per spi-bus bindings - - spi-cpha : Per spi-bus bindings - - spi-max-frequency : Per spi-bus bindings - -Example: -adc@0 { - compatible = "ti,adc084s021"; - reg = <0>; - vref-supply = <&adc_vref>; - spi-cpol; - spi-cpha; - spi-max-frequency = <16000000>; -}; diff --git a/dts/Bindings/iio/adc/ti-ads124s08.txt b/dts/Bindings/iio/adc/ti-ads124s08.txt deleted file mode 100644 index ecf807bb32..0000000000 --- a/dts/Bindings/iio/adc/ti-ads124s08.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Texas Instruments' ads124s08 and ads124s06 ADC chip - -Required properties: - - compatible : - "ti,ads124s08" - "ti,ads124s06" - - reg : spi chip select number for the device - -Recommended properties: - - spi-max-frequency : Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - - spi-cpha : Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: - - reset-gpios : GPIO pin used to reset the device. - -Example: -adc@0 { - compatible = "ti,ads124s08"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cpha; - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -}; diff --git a/dts/Bindings/iio/adc/x-powers,axp209-adc.yaml b/dts/Bindings/iio/adc/x-powers,axp209-adc.yaml new file mode 100644 index 0000000000..5ccbb1f819 --- /dev/null +++ b/dts/Bindings/iio/adc/x-powers,axp209-adc.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/x-powers,axp209-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: X-Powers AXP ADC bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + +description: | + ADC is frequently used as a provider to consumers of the ADC channels. + Device is a child of an axp209 multifunction device + ADC channels and their indexes per variant: + + AXP209 + ------ + 0 | acin_v + 1 | acin_i + 2 | vbus_v + 3 | vbus_i + 4 | pmic_temp + 5 | gpio0_v + 6 | gpio1_v + 7 | ipsout_v + 8 | batt_v + 9 | batt_chrg_i + 10 | batt_dischrg_i + + AXP22x + ------ + 0 | pmic_temp + 1 | batt_v + 2 | batt_chrg_i + 3 | batt_dischrg_i + + AXP813 + ------ + 0 | pmic_temp + 1 | gpio0_v + 2 | batt_v + 3 | batt_chrg_i + 4 | batt_dischrg_i + + +properties: + compatible: + enum: + - x-powers,axp209-adc + - x-powers,axp221-adc + - x-powers,axp813-adc + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +examples: + - | + axp221 { + adc { + compatible = "x-powers,axp221-adc"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/afe/current-sense-amplifier.txt b/dts/Bindings/iio/afe/current-sense-amplifier.txt deleted file mode 100644 index 821b61b8c5..0000000000 --- a/dts/Bindings/iio/afe/current-sense-amplifier.txt +++ /dev/null @@ -1,26 +0,0 @@ -Current Sense Amplifier -======================= - -When an io-channel measures the output voltage from a current sense -amplifier, the interesting measurement is almost always the current -through the sense resistor, not the voltage output. This binding -describes such a current sense circuit. - -Required properties: -- compatible : "current-sense-amplifier" -- io-channels : Channel node of a voltage io-channel. -- sense-resistor-micro-ohms : The sense resistance in microohms. - -Optional properties: -- sense-gain-mult: Amplifier gain multiplier. The default is <1>. -- sense-gain-div: Amplifier gain divider. The default is <1>. - -Example: - -sysi { - compatible = "current-sense-amplifier"; - io-channels = <&tiadc 0>; - - sense-resistor-micro-ohms = <20000>; - sense-gain-mul = <50>; -}; diff --git a/dts/Bindings/iio/afe/current-sense-amplifier.yaml b/dts/Bindings/iio/afe/current-sense-amplifier.yaml new file mode 100644 index 0000000000..527501c1d6 --- /dev/null +++ b/dts/Bindings/iio/afe/current-sense-amplifier.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/afe/current-sense-amplifier.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Current Sense Amplifier + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + When an io-channel measures the output voltage from a current sense + amplifier, the interesting measurement is almost always the current + through the sense resistor, not the voltage output. This binding + describes such a current sense circuit. + +properties: + compatible: + const: current-sense-amplifier + + io-channels: + maxItems: 1 + description: | + Channel node of a voltage io-channel. + + sense-resistor-micro-ohms: + description: The sense resistance. + + sense-gain-mult: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Amplifier gain multiplier. The default is <1>. + + sense-gain-div: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Amplifier gain divider. The default is <1>. + +required: + - compatible + - io-channels + - sense-resistor-micro-ohms + +additionalProperties: false + +examples: + - | + sysi { + compatible = "current-sense-amplifier"; + io-channels = <&tiadc 0>; + + sense-resistor-micro-ohms = <20000>; + sense-gain-mult = <50>; + }; +... diff --git a/dts/Bindings/iio/afe/current-sense-shunt.txt b/dts/Bindings/iio/afe/current-sense-shunt.txt deleted file mode 100644 index 0f67108a07..0000000000 --- a/dts/Bindings/iio/afe/current-sense-shunt.txt +++ /dev/null @@ -1,41 +0,0 @@ -Current Sense Shunt -=================== - -When an io-channel measures the voltage over a current sense shunt, -the interesting measurement is almost always the current through the -shunt, not the voltage over it. This binding describes such a current -sense circuit. - -Required properties: -- compatible : "current-sense-shunt" -- io-channels : Channel node of a voltage io-channel. -- shunt-resistor-micro-ohms : The shunt resistance in microohms. - -Example: -The system current is measured by measuring the voltage over a -3.3 ohms shunt resistor. - -sysi { - compatible = "current-sense-shunt"; - io-channels = <&tiadc 0>; - - /* Divide the voltage by 3300000/1000000 (or 3.3) for the current. */ - shunt-resistor-micro-ohms = <3300000>; -}; - -&i2c { - tiadc: adc@48 { - compatible = "ti,ads1015"; - reg = <0x48>; - #io-channel-cells = <1>; - - #address-cells = <1>; - #size-cells = <0>; - - channel@0 { /* IN0,IN1 differential */ - reg = <0>; - ti,gain = <1>; - ti,datarate = <4>; - }; - }; -}; diff --git a/dts/Bindings/iio/afe/current-sense-shunt.yaml b/dts/Bindings/iio/afe/current-sense-shunt.yaml new file mode 100644 index 0000000000..90439a8dc7 --- /dev/null +++ b/dts/Bindings/iio/afe/current-sense-shunt.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/afe/current-sense-shunt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Current Sense Shunt + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + When an io-channel measures the voltage over a current sense shunt, + the interesting measurement is almost always the current through the + shunt, not the voltage over it. This binding describes such a current + sense circuit. + +properties: + compatible: + const: current-sense-shunt + + io-channels: + maxItems: 1 + description: | + Channel node of a voltage io-channel. + + shunt-resistor-micro-ohms: + description: The shunt resistance. + +required: + - compatible + - io-channels + - shunt-resistor-micro-ohms + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + tiadc: adc@48 { + compatible = "ti,ads1015"; + reg = <0x48>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { /* IN0,IN1 differential */ + reg = <0>; + ti,gain = <1>; + ti,datarate = <4>; + }; + }; + }; + sysi { + compatible = "current-sense-shunt"; + io-channels = <&tiadc 0>; + + /* Divide the voltage by 3300000/1000000 (or 3.3) for the current. */ + shunt-resistor-micro-ohms = <3300000>; + }; +... diff --git a/dts/Bindings/iio/afe/voltage-divider.txt b/dts/Bindings/iio/afe/voltage-divider.txt deleted file mode 100644 index b452a84061..0000000000 --- a/dts/Bindings/iio/afe/voltage-divider.txt +++ /dev/null @@ -1,53 +0,0 @@ -Voltage divider -=============== - -When an io-channel measures the midpoint of a voltage divider, the -interesting voltage is often the voltage over the full resistance -of the divider. This binding describes the voltage divider in such -a curcuit. - - Vin ----. - | - .-----. - | R | - '-----' - | - +---- Vout - | - .-----. - | Rout| - '-----' - | - GND - -Required properties: -- compatible : "voltage-divider" -- io-channels : Channel node of a voltage io-channel measuring Vout. -- output-ohms : Resistance Rout over which the output voltage is measured. - See full-ohms. -- full-ohms : Resistance R + Rout for the full divider. The io-channel - is scaled by the Rout / (R + Rout) quotient. - -Example: -The system voltage is circa 12V, but divided down with a 22/222 -voltage divider (R = 200 Ohms, Rout = 22 Ohms) and fed to an ADC. - -sysv { - compatible = "voltage-divider"; - io-channels = <&maxadc 1>; - - /* Scale the system voltage by 22/222 to fit the ADC range. */ - output-ohms = <22>; - full-ohms = <222>; /* 200 + 22 */ -}; - -&spi { - maxadc: adc@0 { - compatible = "maxim,max1027"; - reg = <0>; - #io-channel-cells = <1>; - interrupt-parent = <&gpio5>; - interrupts = <15 IRQ_TYPE_EDGE_RISING>; - spi-max-frequency = <1000000>; - }; -}; diff --git a/dts/Bindings/iio/afe/voltage-divider.yaml b/dts/Bindings/iio/afe/voltage-divider.yaml new file mode 100644 index 0000000000..df2589f214 --- /dev/null +++ b/dts/Bindings/iio/afe/voltage-divider.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/afe/voltage-divider.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Voltage divider + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + When an io-channel measures the midpoint of a voltage divider, the + interesting voltage is often the voltage over the full resistance + of the divider. This binding describes the voltage divider in such + a curcuit. + + Vin ----. + | + .-----. + | R | + '-----' + | + +---- Vout + | + .-----. + | Rout| + '-----' + | + GND + + +properties: + compatible: + const: voltage-divider + + io-channels: + maxItems: 1 + description: | + Channel node of a voltage io-channel. + + output-ohms: + description: + Resistance Rout over which the output voltage is measured. See full-ohms. + + full-ohms: + description: + Resistance R + Rout for the full divider. The io-channel is scaled by + the Rout / (R + Rout) quotient. + +required: + - compatible + - io-channels + - output-ohms + - full-ohms + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + /* + * The system voltage is circa 12V, but divided down with a 22/222 + * voltage divider (R = 200 Ohms, Rout = 22 Ohms) and fed to an ADC. + */ + spi { + #address-cells = <1>; + #size-cells = <0>; + maxadc: adc@0 { + compatible = "maxim,max1027"; + reg = <0>; + #io-channel-cells = <1>; + interrupt-parent = <&gpio5>; + interrupts = <15 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency = <1000000>; + }; + }; + sysv { + compatible = "voltage-divider"; + io-channels = <&maxadc 1>; + + /* Scale the system voltage by 22/222 to fit the ADC range. */ + output-ohms = <22>; + full-ohms = <222>; /* 200 + 22 */ + }; +... diff --git a/dts/Bindings/iio/chemical/bme680.txt b/dts/Bindings/iio/chemical/bme680.txt deleted file mode 100644 index 7f3827cfb2..0000000000 --- a/dts/Bindings/iio/chemical/bme680.txt +++ /dev/null @@ -1,11 +0,0 @@ -Bosch Sensortec BME680 pressure/temperature/humidity/voc sensors - -Required properties: -- compatible: must be "bosch,bme680" - -Example: - -bme680@76 { - compatible = "bosch,bme680"; - reg = <0x76>; -}; diff --git a/dts/Bindings/iio/chemical/sensirion,sgp30.txt b/dts/Bindings/iio/chemical/sensirion,sgp30.txt deleted file mode 100644 index 5844ed5817..0000000000 --- a/dts/Bindings/iio/chemical/sensirion,sgp30.txt +++ /dev/null @@ -1,15 +0,0 @@ -* Sensirion SGP30/SGPC3 multi-pixel Gas Sensor - -Required properties: - - - compatible: must be one of - "sensirion,sgp30" - "sensirion,sgpc3" - - reg: the I2C address of the sensor - -Example: - -gas@58 { - compatible = "sensirion,sgp30"; - reg = <0x58>; -}; diff --git a/dts/Bindings/iio/dac/ad5592r.txt b/dts/Bindings/iio/dac/ad5592r.txt deleted file mode 100644 index 989f96f31c..0000000000 --- a/dts/Bindings/iio/dac/ad5592r.txt +++ /dev/null @@ -1,155 +0,0 @@ -Analog Devices AD5592R/AD5593R DAC/ADC device driver - -Required properties for the AD5592R: - - compatible: Must be "adi,ad5592r" - - reg: SPI chip select number for the device - - spi-max-frequency: Max SPI frequency to use (< 30000000) - - spi-cpol: The AD5592R requires inverse clock polarity (CPOL) mode - -Required properties for the AD5593R: - - compatible: Must be "adi,ad5593r" - - reg: I2C address of the device - -Required properties for all supported chips: - - #address-cells: Should be 1. - - #size-cells: Should be 0. - - channel nodes: - Each child node represents one channel and has the following - Required properties: - * reg: Pin on which this channel is connected to. - * adi,mode: Mode or function of this channel. - Macros specifying the valid values - can be found in <dt-bindings/iio/adi,ad5592r.h>. - - The following values are currently supported: - * CH_MODE_UNUSED (the pin is unused) - * CH_MODE_ADC (the pin is ADC input) - * CH_MODE_DAC (the pin is DAC output) - * CH_MODE_DAC_AND_ADC (the pin is DAC output - but can be monitored by an ADC, since - there is no disadvantage this - this should be considered as the - preferred DAC mode) - * CH_MODE_GPIO (the pin is registered - with GPIOLIB) - Optional properties: - * adi,off-state: State of this channel when unused or the - device gets removed. Macros specifying the - valid values can be found in - <dt-bindings/iio/adi,ad5592r.h>. - - * CH_OFFSTATE_PULLDOWN (the pin is pulled down) - * CH_OFFSTATE_OUT_LOW (the pin is output low) - * CH_OFFSTATE_OUT_HIGH (the pin is output high) - * CH_OFFSTATE_OUT_TRISTATE (the pin is - tristated output) - - -Optional properties: - - vref-supply: Phandle to the external reference voltage supply. This should - only be set if there is an external reference voltage connected to the VREF - pin. If the property is not set the internal 2.5V reference is used. - - reset-gpios : GPIO spec for the RESET pin. If specified, it will be - asserted during driver probe. - - gpio-controller: Marks the device node as a GPIO controller. - - #gpio-cells: Should be 2. The first cell is the GPIO number and the second - cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. - -AD5592R Example: - - #include <dt-bindings/iio/adi,ad5592r.h> - - vref: regulator-vref { - compatible = "regulator-fixed"; - regulator-name = "vref-ad559x"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - ad5592r@0 { - #size-cells = <0>; - #address-cells = <1>; - #gpio-cells = <2>; - compatible = "adi,ad5592r"; - reg = <0>; - - spi-max-frequency = <1000000>; - spi-cpol; - - vref-supply = <&vref>; /* optional */ - reset-gpios = <&gpio0 86 0>; /* optional */ - gpio-controller; - - channel@0 { - reg = <0>; - adi,mode = <CH_MODE_DAC>; - }; - channel@1 { - reg = <1>; - adi,mode = <CH_MODE_ADC>; - }; - channel@2 { - reg = <2>; - adi,mode = <CH_MODE_DAC_AND_ADC>; - }; - channel@3 { - reg = <3>; - adi,mode = <CH_MODE_DAC_AND_ADC>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@4 { - reg = <4>; - adi,mode = <CH_MODE_UNUSED>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@5 { - reg = <5>; - adi,mode = <CH_MODE_GPIO>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@6 { - reg = <6>; - adi,mode = <CH_MODE_GPIO>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@7 { - reg = <7>; - adi,mode = <CH_MODE_GPIO>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - }; - -AD5593R Example: - - #include <dt-bindings/iio/adi,ad5592r.h> - - ad5593r@10 { - #size-cells = <0>; - #address-cells = <1>; - #gpio-cells = <2>; - compatible = "adi,ad5593r"; - reg = <0x10>; - gpio-controller; - - channel@0 { - reg = <0>; - adi,mode = <CH_MODE_DAC>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@1 { - reg = <1>; - adi,mode = <CH_MODE_ADC>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@2 { - reg = <2>; - adi,mode = <CH_MODE_DAC_AND_ADC>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - channel@6 { - reg = <6>; - adi,mode = <CH_MODE_GPIO>; - adi,off-state = <CH_OFFSTATE_PULLDOWN>; - }; - }; diff --git a/dts/Bindings/iio/dac/ad5758.txt b/dts/Bindings/iio/dac/ad5758.txt deleted file mode 100644 index 2f607f41f9..0000000000 --- a/dts/Bindings/iio/dac/ad5758.txt +++ /dev/null @@ -1,83 +0,0 @@ -Analog Devices AD5758 DAC device driver - -Required properties for the AD5758: - - compatible: Must be "adi,ad5758" - - reg: SPI chip select number for the device - - spi-max-frequency: Max SPI frequency to use (< 50000000) - - spi-cpha: is the only mode that is supported - -Required properties: - - - adi,dc-dc-mode: Mode of operation of the dc-to-dc converter - Dynamic Power Control (DPC) - In this mode, the AD5758 circuitry senses the output - voltage and dynamically regulates the supply voltage, - VDPC+, to meet compliance requirements plus an optimized - headroom voltage for the output buffer. - - Programmable Power Control (PPC) - In this mode, the VDPC+ voltage is user-programmable to - a fixed level that needs to accommodate the maximum output - load required. - - The output of the DAC core is either converted to a - current or voltage output at the VIOUT pin. Only one mode - can be enabled at any one time. - - The following values are currently supported: - * 1: DPC current mode - * 2: DPC voltage mode - * 3: PPC current mode - - Depending on the selected output mode (voltage or current) one of the - two properties must - be present: - - - adi,range-microvolt: Voltage output range - The array of voltage output ranges must contain two fields: - * <0 5000000>: 0 V to 5 V voltage range - * <0 10000000>: 0 V to 10 V voltage range - * <(-5000000) 5000000>: ±5 V voltage range - * <(-10000000) 10000000>: ±10 V voltage range - - adi,range-microamp: Current output range - The array of current output ranges must contain two fields: - * <0 20000>: 0 mA to 20 mA current range - * <0 24000>: 0 mA to 24 mA current range - * <4 24000>: 4 mA to 20 mA current range - * <(-20000) 20000>: ±20 mA current range - * <(-24000) 24000>: ±24 mA current range - * <(-1000) 22000>: −1 mA to +22 mA current range - -Optional properties: - - - reset-gpios : GPIO spec for the RESET pin. If specified, it will be - asserted during driver probe. - - - adi,dc-dc-ilim-microamp: The dc-to-dc converter current limit - The following values are currently supported [uA]: - * 150000 - * 200000 - * 250000 - * 300000 - * 350000 - * 400000 - - - adi,slew-time-us: The time it takes for the output to reach the - full scale [uS] - The supported range is between 133us up to 1023984375us - -AD5758 Example: - - dac@0 { - compatible = "adi,ad5758"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cpha; - - reset-gpios = <&gpio 22 0>; - - adi,dc-dc-mode = <2>; - adi,range-microvolt = <0 10000000>; - adi,dc-dc-ilim-microamp = <200000>; - adi,slew-time-us = <125000>; - }; diff --git a/dts/Bindings/iio/dac/ad7303.txt b/dts/Bindings/iio/dac/ad7303.txt deleted file mode 100644 index 914610f055..0000000000 --- a/dts/Bindings/iio/dac/ad7303.txt +++ /dev/null @@ -1,23 +0,0 @@ -Analog Devices AD7303 DAC device driver - -Required properties: - - compatible: Must be "adi,ad7303" - - reg: SPI chip select number for the device - - spi-max-frequency: Max SPI frequency to use (< 30000000) - - Vdd-supply: Phandle to the Vdd power supply - -Optional properties: - - REF-supply: Phandle to the external reference voltage supply. This should - only be set if there is an external reference voltage connected to the REF - pin. If the property is not set Vdd/2 is used as the reference voltage. - -Example: - - ad7303@4 { - compatible = "adi,ad7303"; - reg = <4>; - spi-max-frequency = <10000000>; - Vdd-supply = <&vdd_supply>; - adi,use-external-reference; - REF-supply = <&vref_supply>; - }; diff --git a/dts/Bindings/iio/dac/adi,ad5592r.yaml b/dts/Bindings/iio/dac/adi,ad5592r.yaml new file mode 100644 index 0000000000..30194880f4 --- /dev/null +++ b/dts/Bindings/iio/dac/adi,ad5592r.yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,ad5592r.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5592R/AD5593R DAC/ADC + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +properties: + compatible: + enum: + - adi,ad5592r + - adi,ad5593r + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 30000000 + + spi-cpol: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#io-channel-cells": + const: 1 + + vref-supply: + description: If not set internal 2.5V reference used. + + reset-gpios: + maxItems: 1 + + gpio-controller: + description: Marks the device node as a GPIO controller. + + "#gpio-cells": + const: 2 + description: + The first cell is the GPIO number and the second cell specifies + GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +allOf: + - if: + properties: + compatible: + contains: + const: adi,ad5592r + then: + required: + - spi-cpol + else: + properties: + spi-cpol: false + +additionalProperties: false + +patternProperties: + "^(channel@)[0-7]$": + type: object + description: Child node to describe a channel + properties: + reg: + minimum: 0 + maximum: 7 + + adi,mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 8] + description: | + Mode or function of this channel. + Macros specifying the valid values can be found in + <dt-bindings/iio/adi,ad5592r.h>. + + The following values are currently supported: + * CH_MODE_UNUSED (the pin is unused) + * CH_MODE_ADC (the pin is ADC input) + * CH_MODE_DAC (the pin is DAC output) + * CH_MODE_DAC_AND_ADC (the pin is DAC output but can be monitored + by an ADC, since there is no disadvantage this should be + considered as the preferred DAC mode) + * CH_MODE_GPIO (the pin is registered with GPIOLIB) + + adi,off-state: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + description: | + State of this channel when unused or the device gets removed. + Macros specifying the valid values can be found in + <dt-bindings/iio/adi,ad5592r.h>. + * CH_OFFSTATE_PULLDOWN (the pin is pulled down) + * CH_OFFSTATE_OUT_LOW (the pin is output low) + * CH_OFFSTATE_OUT_HIGH (the pin is output high) + * CH_OFFSTATE_OUT_TRISTATE (the pin is tristated output) + + required: + - reg + - adi,mode + + additionalProperties: false + +examples: + - | + #include <dt-bindings/iio/adi,ad5592r.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + addac@0 { + compatible = "adi,ad5592r"; + #size-cells = <0>; + #address-cells = <1>; + #gpio-cells = <2>; + reg = <0>; + + spi-max-frequency = <1000000>; + spi-cpol; + + vref-supply = <&vref>; + reset-gpios = <&gpio0 86 0>; + gpio-controller; + + channel@0 { + reg = <0>; + adi,mode = <CH_MODE_DAC>; + }; + channel@1 { + reg = <1>; + adi,mode = <CH_MODE_ADC>; + }; + channel@2 { + reg = <2>; + adi,mode = <CH_MODE_DAC_AND_ADC>; + }; + channel@3 { + reg = <3>; + adi,mode = <CH_MODE_DAC_AND_ADC>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@4 { + reg = <4>; + adi,mode = <CH_MODE_UNUSED>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@5 { + reg = <5>; + adi,mode = <CH_MODE_GPIO>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@6 { + reg = <6>; + adi,mode = <CH_MODE_GPIO>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@7 { + reg = <7>; + adi,mode = <CH_MODE_GPIO>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + }; + ad5593r@10 { + compatible = "adi,ad5593r"; + #size-cells = <0>; + #address-cells = <1>; + #gpio-cells = <2>; + reg = <0x10>; + gpio-controller; + + channel@0 { + reg = <0>; + adi,mode = <CH_MODE_DAC>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@1 { + reg = <1>; + adi,mode = <CH_MODE_ADC>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@2 { + reg = <2>; + adi,mode = <CH_MODE_DAC_AND_ADC>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + channel@6 { + reg = <6>; + adi,mode = <CH_MODE_GPIO>; + adi,off-state = <CH_OFFSTATE_PULLDOWN>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/dac/adi,ad5686.yaml b/dts/Bindings/iio/dac/adi,ad5686.yaml new file mode 100644 index 0000000000..8065228e5d --- /dev/null +++ b/dts/Bindings/iio/dac/adi,ad5686.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,ad5686.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5686 and similar multi-channel DACs + +maintainers: + - Michael Auchter <michael.auchter@ni.com> + +description: | + Binding for Analog Devices AD5686 and similar multi-channel DACs + +properties: + compatible: + enum: + - adi,ad5311r + - adi,ad5338r + - adi,ad5671r + - adi,ad5675r + - adi,ad5691r + - adi,ad5692r + - adi,ad5693 + - adi,ad5693r + - adi,ad5694 + - adi,ad5694r + - adi,ad5695r + - adi,ad5696 + - adi,ad5696r + + reg: + maxItems: 1 + + vcc-supply: + description: | + The regulator supply for DAC reference voltage. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ad5686: dac@0 { + compatible = "adi,ad5686"; + reg = <0>; + vcc-supply = <&dac_vref>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/adi,ad5758.yaml b/dts/Bindings/iio/dac/adi,ad5758.yaml new file mode 100644 index 0000000000..626ccb6fe2 --- /dev/null +++ b/dts/Bindings/iio/dac/adi,ad5758.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,ad5758.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5758 DAC + +maintainers: + - Michael Hennerich <Michael.Hennerich@analog.com> + +properties: + compatible: + const: adi,ad5758 + + reg: + maxItems: 1 + + spi-max-frequency: true + spi-cpha: true + + adi,dc-dc-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 3] + description: | + Mode of operation of the dc-to-dc converter + Dynamic Power Control (DPC) + In this mode, the AD5758 circuitry senses the output voltage and + dynamically regulates the supply voltage, VDPC+, to meet compliance + requirements plus an optimized headroom voltage for the output buffer. + + Programmable Power Control (PPC) + In this mode, the VDPC+ voltage is user-programmable to a fixed level + that needs to accommodate the maximum output load required. + + The output of the DAC core is either converted to a current or + voltage output at the VIOUT pin. Only one mode can be enabled at + any one time. + + The following values are currently supported: + * 1: DPC current mode + * 2: DPC voltage mode + * 3: PPC current mode + + Depending on the selected output mode (voltage or current) one of the + two properties must be present: + + adi,range-microvolt: + $ref: /schemas/types.yaml#/definitions/int32-array + description: | + Voltage output range specified as <minimum, maximum> + enum: + - [[0, 5000000]] + - [[0, 10000000]] + - [[-5000000, 5000000]] + - [[-10000000, 10000000]] + + adi,range-microamp: + $ref: /schemas/types.yaml#/definitions/int32-array + description: | + Current output range specified as <minimum, maximum> + enum: + - [[0, 20000]] + - [[0, 24000]] + - [[4, 24000]] + - [[-20000, 20000]] + - [[-24000, 24000]] + - [[-1000, 22000]] + + reset-gpios: true + + adi,dc-dc-ilim-microamp: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [150000, 200000, 250000, 300000, 350000, 400000] + description: | + The dc-to-dc converter current limit. + + adi,slew-time-us: + description: | + The time it takes for the output to reach the full scale [uS] + minimum: 133 + maximum: 1023984375 + +required: + - compatible + - reg + - spi-cpha + - adi,dc-dc-mode + +allOf: + - if: + properties: + adi,dc-dc-mode: + contains: + enum: [1, 3] + then: + properties: + adi,range-microvolt: false + required: + - adi,range-microamp + else: + properties: + adi,range-microamp: false + required: + - adi,range-microvolt + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "adi,ad5758"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpha; + + reset-gpios = <&gpio 22 0>; + + adi,dc-dc-mode = <2>; + adi,range-microvolt = <0 10000000>; + adi,dc-dc-ilim-microamp = <200000>; + adi,slew-time-us = <125000>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/adi,ad7303.yaml b/dts/Bindings/iio/dac/adi,ad7303.yaml new file mode 100644 index 0000000000..1f00371520 --- /dev/null +++ b/dts/Bindings/iio/dac/adi,ad7303.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,ad7303.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7303 DAC + +maintainers: + - Lars-Peter Clausen <lars@metafoo.de> + +properties: + compatible: + const: adi,ad7303 + + reg: + maxItems: 1 + + Vdd-supply: + description: + Used to calculate output channel scalling if REF-supply not specified. + REF-supply: + description: + If not provided, Vdd/2 is used as the reference voltage. + + spi-max-frequency: + maximum: 30000000 + +required: + - compatible + - reg + - Vdd-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@4 { + compatible = "adi,ad7303"; + reg = <4>; + spi-max-frequency = <10000000>; + Vdd-supply = <&vdd_supply>; + REF-supply = <&vref_supply>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/dpot-dac.txt b/dts/Bindings/iio/dac/dpot-dac.txt deleted file mode 100644 index fdf47a01bf..0000000000 --- a/dts/Bindings/iio/dac/dpot-dac.txt +++ /dev/null @@ -1,41 +0,0 @@ -Bindings for DAC emulation using a digital potentiometer - -It is assumed that the dpot is used as a voltage divider between the -current dpot wiper setting and the maximum resistance of the dpot. The -divided voltage is provided by a vref regulator. - - .------. - .-----------. | | - | vref |--' .---. - | regulator |--. | | - '-----------' | | d | - | | p | - | | o | wiper - | | t |<---------+ - | | | - | '---' dac output voltage - | | - '------+------------+ - -Required properties: -- compatible: Should be "dpot-dac" -- vref-supply: The regulator supplying the voltage divider. -- io-channels: Channel node of the dpot to be used for the voltage division. -- io-channel-names: Should be "dpot". - -Example: - - &i2c { - dpot: mcp4651-503@28 { - compatible = "microchip,mcp4651-503"; - reg = <0x28>; - #io-channel-cells = <1>; - }; - }; - - dac { - compatible = "dpot-dac"; - vref-supply = <®_3v3>; - io-channels = <&dpot 0>; - io-channel-names = "dpot"; - }; diff --git a/dts/Bindings/iio/dac/dpot-dac.yaml b/dts/Bindings/iio/dac/dpot-dac.yaml new file mode 100644 index 0000000000..6a7ca8e432 --- /dev/null +++ b/dts/Bindings/iio/dac/dpot-dac.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/dpot-dac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DAC emulation using a digital potentiometer + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + It is assumed that the dpot is used as a voltage divider between the + current dpot wiper setting and the maximum resistance of the dpot. The + divided voltage is provided by a vref regulator. + + .------. + .-----------. | | + | vref |--' .---. + | regulator |--. | | + '-----------' | | d | + | | p | + | | o | wiper + | | t |<---------+ + | | | + | '---' dac output voltage + | | + '------+------------+ + +properties: + compatible: + const: dpot-dac + + vref-supply: + description: Regulator supplying the voltage divider. + + io-channels: + maxItems: 1 + description: | + Channel node of the dpot to be used for the voltage division. + + io-channel-names: + const: dpot + + "#io-channel-cells": + const: 1 + +required: + - compatible + - vref-supply + - io-channels + - io-channel-names + +additionalProperties: false + +examples: + - | + dac { + compatible = "dpot-dac"; + vref-supply = <®_3v3>; + io-channels = <&dpot 0>; + io-channel-names = "dpot"; + }; +... diff --git a/dts/Bindings/iio/dac/ds4424.txt b/dts/Bindings/iio/dac/ds4424.txt deleted file mode 100644 index eaebbf8dab..0000000000 --- a/dts/Bindings/iio/dac/ds4424.txt +++ /dev/null @@ -1,20 +0,0 @@ -Maxim Integrated DS4422/DS4424 7-bit Sink/Source Current DAC Device Driver - -Datasheet publicly available at: -https://datasheets.maximintegrated.com/en/ds/DS4422-DS4424.pdf - -Required properties: - - compatible: Should be one of - maxim,ds4422 - maxim,ds4424 - - reg: Should contain the DAC I2C address - -Optional properties: - - vcc-supply: Power supply is optional. If not defined, driver will ignore it. - -Example: - ds4224@10 { - compatible = "maxim,ds4424"; - reg = <0x10>; /* When A0, A1 pins are ground */ - vcc-supply = <&vcc_3v3>; - }; diff --git a/dts/Bindings/iio/dac/fsl,vf610-dac.yaml b/dts/Bindings/iio/dac/fsl,vf610-dac.yaml new file mode 100644 index 0000000000..999c715c61 --- /dev/null +++ b/dts/Bindings/iio/dac/fsl,vf610-dac.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/fsl,vf610-dac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale vf610 Digital to Analog Converter + +maintainers: + - Sanchayan Maity <maitysanchayan@gmail.com> + +properties: + compatible: + const: fsl,vf610-dac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: dac + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/vf610-clock.h> + bus@40000000 { + compatible = "fsl,aips-bus", "simple-bus"; + reg = <0x40000000 0x00070000>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + dac@400cc000 { + compatible = "fsl,vf610-dac"; + reg = <0x400cc000 0x1000>; + interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "dac"; + clocks = <&clks VF610_CLK_DAC0>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/lpc1850-dac.txt b/dts/Bindings/iio/dac/lpc1850-dac.txt deleted file mode 100644 index 42db783c4e..0000000000 --- a/dts/Bindings/iio/dac/lpc1850-dac.txt +++ /dev/null @@ -1,19 +0,0 @@ -NXP LPC1850 DAC bindings - -Required properties: -- compatible: Should be "nxp,lpc1850-dac" -- reg: Offset and length of the register set for the ADC device -- interrupts: The interrupt number for the ADC device -- clocks: The root clock of the ADC controller -- vref-supply: The regulator supply ADC reference voltage -- resets: phandle to reset controller and line specifier - -Example: -dac: dac@400e1000 { - compatible = "nxp,lpc1850-dac"; - reg = <0x400e1000 0x1000>; - interrupts = <0>; - clocks = <&ccu1 CLK_APB3_DAC>; - vref-supply = <®_vdda>; - resets = <&rgu 42>; -}; diff --git a/dts/Bindings/iio/dac/max5821.txt b/dts/Bindings/iio/dac/max5821.txt deleted file mode 100644 index 54276ce8c9..0000000000 --- a/dts/Bindings/iio/dac/max5821.txt +++ /dev/null @@ -1,14 +0,0 @@ -Maxim max5821 DAC device driver - -Required properties: - - compatible: Must be "maxim,max5821" - - reg: Should contain the DAC I2C address - - vref-supply: Phandle to the vref power supply - -Example: - - max5821@38 { - compatible = "maxim,max5821"; - reg = <0x38>; - vref-supply = <®_max5821>; - }; diff --git a/dts/Bindings/iio/dac/maxim,ds4424.yaml b/dts/Bindings/iio/dac/maxim,ds4424.yaml new file mode 100644 index 0000000000..264fa7c5fe --- /dev/null +++ b/dts/Bindings/iio/dac/maxim,ds4424.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/maxim,ds4424.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim Integrated DS4422/DS4424 7-bit Sink/Source Current DAC + +maintainers: + - Ismail Kose <ihkose@gmail.com> + +description: | + Datasheet publicly available at: + https://datasheets.maximintegrated.com/en/ds/DS4422-DS4424.pdf + +properties: + compatible: + enum: + - maxim,ds4422 + - maxim,ds4424 + + reg: + maxItems: 1 + + vcc-supply: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + dac@10 { + compatible = "maxim,ds4424"; + reg = <0x10>; /* When A0, A1 pins are ground */ + vcc-supply = <&vcc_3v3>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/maxim,max5821.yaml b/dts/Bindings/iio/dac/maxim,max5821.yaml new file mode 100644 index 0000000000..c43fb5f3f8 --- /dev/null +++ b/dts/Bindings/iio/dac/maxim,max5821.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/maxim,max5821.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim max5821 dual 10-bit DAC + +maintainers: + - Philippe Reynes <tremyfr@yahoo.fr> + +description: | + Datasheet publicly available at: + https://datasheets.maximintegrated.com/en/ds/MAX5821.pdf + +properties: + compatible: + const: maxim,max5821 + + reg: + maxItems: 1 + + vref-supply: true + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + dac@38 { + compatible = "maxim,max5821"; + reg = <0x38>; + vref-supply = <®_max5821>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/mcp4725.txt b/dts/Bindings/iio/dac/mcp4725.txt deleted file mode 100644 index 1bc6c093fb..0000000000 --- a/dts/Bindings/iio/dac/mcp4725.txt +++ /dev/null @@ -1,35 +0,0 @@ -Microchip mcp4725 and mcp4726 DAC device driver - -Required properties: - - compatible: Must be "microchip,mcp4725" or "microchip,mcp4726" - - reg: Should contain the DAC I2C address - - vdd-supply: Phandle to the Vdd power supply. This supply is used as a - voltage reference on mcp4725. It is used as a voltage reference on - mcp4726 if there is no vref-supply specified. - -Optional properties (valid only for mcp4726): - - vref-supply: Optional phandle to the Vref power supply. Vref pin is - used as a voltage reference when this supply is specified. - - microchip,vref-buffered: Boolean to enable buffering of the external - Vref pin. This boolean is not valid without the vref-supply. Quoting - the datasheet: This is offered in cases where the reference voltage - does not have the current capability not to drop its voltage when - connected to the internal resistor ladder circuit. - -Examples: - - /* simple mcp4725 */ - mcp4725@60 { - compatible = "microchip,mcp4725"; - reg = <0x60>; - vdd-supply = <&vdac_vdd>; - }; - - /* mcp4726 with the buffered external reference voltage */ - mcp4726@60 { - compatible = "microchip,mcp4726"; - reg = <0x60>; - vdd-supply = <&vdac_vdd>; - vref-supply = <&vdac_vref>; - microchip,vref-buffered; - }; diff --git a/dts/Bindings/iio/dac/microchip,mcp4725.yaml b/dts/Bindings/iio/dac/microchip,mcp4725.yaml new file mode 100644 index 0000000000..271998610c --- /dev/null +++ b/dts/Bindings/iio/dac/microchip,mcp4725.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/microchip,mcp4725.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip mcp4725 and mcp4726 DAC + +maintainers: + - Tomas Novotny <tomas@novotny.cz> + +properties: + compatible: + enum: + - microchip,mcp4725 + - microchip,mcp4726 + + reg: + maxItems: 1 + + vdd-supply: + description: | + Provides both power and acts as the reference supply on the mcp4725. + For the mcp4726 it will be used as the reference voltage if vref-supply + is not provided. + + vref-supply: + description: + Vref pin is used as a voltage reference when this supply is specified. + + microchip,vref-buffered: + type: boolean + description: | + Enable buffering of the external Vref pin. This boolean is not valid + without the vref-supply. Quoting the datasheet: This is offered in + cases where the reference voltage does not have the current + capability not to drop its voltage when connected to the internal + resistor ladder circuit. + +allOf: + - if: + not: + properties: + compatible: + contains: + const: microchip,mcp4726 + then: + properties: + vref-supply: false + microchip,vref-buffered: false + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + mcp4725@60 { + compatible = "microchip,mcp4725"; + reg = <0x60>; + vdd-supply = <&vdac_vdd>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/nxp,lpc1850-dac.yaml b/dts/Bindings/iio/dac/nxp,lpc1850-dac.yaml new file mode 100644 index 0000000000..595f481c54 --- /dev/null +++ b/dts/Bindings/iio/dac/nxp,lpc1850-dac.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/nxp,lpc1850-dac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC1850 DAC bindings + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: + Supports the DAC found on the LPC1850 SoC. + +properties: + compatible: + const: nxp,lpc1850-dac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + vref-supply: true + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - vref-supply + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/lpc18xx-ccu.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + dac: dac@400e1000 { + compatible = "nxp,lpc1850-dac"; + reg = <0x400e1000 0x1000>; + interrupts = <0>; + clocks = <&ccu1 CLK_APB3_DAC>; + vref-supply = <®_vdda>; + resets = <&rgu 42>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/ti,dac5571.txt b/dts/Bindings/iio/dac/ti,dac5571.txt deleted file mode 100644 index 03af6b9a4d..0000000000 --- a/dts/Bindings/iio/dac/ti,dac5571.txt +++ /dev/null @@ -1,24 +0,0 @@ -* Texas Instruments DAC5571 Family - -Required properties: - - compatible: Should contain - "ti,dac5571" - "ti,dac6571" - "ti,dac7571" - "ti,dac5574" - "ti,dac6574" - "ti,dac7574" - "ti,dac5573" - "ti,dac6573" - "ti,dac7573" - - reg: Should contain the DAC I2C address - -Optional properties: - - vref-supply: The regulator supply for DAC reference voltage - -Example: -dac@0 { - compatible = "ti,dac5571"; - reg = <0x4C>; - vref-supply = <&vdd_supply>; -}; diff --git a/dts/Bindings/iio/dac/ti,dac5571.yaml b/dts/Bindings/iio/dac/ti,dac5571.yaml new file mode 100644 index 0000000000..714191724f --- /dev/null +++ b/dts/Bindings/iio/dac/ti,dac5571.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/ti,dac5571.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DAC5571 Family + +maintainers: + - Sean Nyekjaer <sean@geanix.com> + +properties: + compatible: + enum: + - ti,dac5571 + - ti,dac6571 + - ti,dac7571 + - ti,dac5574 + - ti,dac6574 + - ti,dac7574 + - ti,dac5573 + - ti,dac6573 + - ti,dac7573 + + reg: + maxItems: 1 + + vref-supply: + description: + Reference voltage must be supplied to establish the scaling of the + output voltage. + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + dac@4c { + compatible = "ti,dac5571"; + reg = <0x4C>; + vref-supply = <&vdd_supply>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/ti,dac7311.txt b/dts/Bindings/iio/dac/ti,dac7311.txt deleted file mode 100644 index e5a507db5e..0000000000 --- a/dts/Bindings/iio/dac/ti,dac7311.txt +++ /dev/null @@ -1,23 +0,0 @@ -TI DAC7311 device tree bindings - -Required properties: -- compatible: must be set to: - * "ti,dac7311" - * "ti,dac6311" - * "ti,dac5311" -- reg: spi chip select number for the device -- vref-supply: The regulator supply for ADC reference voltage - -Optional properties: -- spi-max-frequency: Max SPI frequency to use - -Example: - - spi_master { - dac@0 { - compatible = "ti,dac7311"; - reg = <0>; /* CS0 */ - spi-max-frequency = <1000000>; - vref-supply = <&vdd_supply>; - }; - }; diff --git a/dts/Bindings/iio/dac/ti,dac7311.yaml b/dts/Bindings/iio/dac/ti,dac7311.yaml new file mode 100644 index 0000000000..10be98d1f1 --- /dev/null +++ b/dts/Bindings/iio/dac/ti,dac7311.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/ti,dac7311.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DAC5311 and similar SPI DACs + +maintainers: + - Charles-Antoine Couret <charles-antoine.couret@essensium.com> + +properties: + compatible: + enum: + - ti,dac7311 + - ti,dac6311 + - ti,dac5311 + + reg: + maxItems: 1 + + vref-supply: + description: + Reference voltage must be supplied to establish the scaling of the + output voltage. + + spi-max-frequency: true + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "ti,dac7311"; + reg = <0>; /* CS0 */ + spi-max-frequency = <1000000>; + vref-supply = <&vdd_supply>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/ti,dac7512.txt b/dts/Bindings/iio/dac/ti,dac7512.txt deleted file mode 100644 index 1db45939da..0000000000 --- a/dts/Bindings/iio/dac/ti,dac7512.txt +++ /dev/null @@ -1,20 +0,0 @@ -TI DAC7512 DEVICETREE BINDINGS - -Required properties: - - - "compatible" Must be set to "ti,dac7512" - -Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt -apply. In particular, "reg" and "spi-max-frequency" properties must be given. - - -Example: - - spi_master { - dac7512: dac7512@0 { - compatible = "ti,dac7512"; - reg = <0>; /* CS0 */ - spi-max-frequency = <1000000>; - }; - }; - diff --git a/dts/Bindings/iio/dac/ti,dac7512.yaml b/dts/Bindings/iio/dac/ti,dac7512.yaml new file mode 100644 index 0000000000..4277cf8a4a --- /dev/null +++ b/dts/Bindings/iio/dac/ti,dac7512.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/ti,dac7512.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DAC7512 DAC + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +properties: + compatible: + const: ti,dac7512 + + reg: + maxItems: 1 + + spi-max-frequency: + description: + Maximum frequency is reduced for supply voltage of less than 3.6V + maximum: 30000000 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "ti,dac7512"; + reg = <0>; /* CS0 */ + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/ti,dac7612.txt b/dts/Bindings/iio/dac/ti,dac7612.txt deleted file mode 100644 index 17af395b99..0000000000 --- a/dts/Bindings/iio/dac/ti,dac7612.txt +++ /dev/null @@ -1,28 +0,0 @@ -* Texas Instruments Dual, 12-Bit Serial Input Digital-to-Analog Converter - -The DAC7612 is a dual, 12-bit digital-to-analog converter (DAC) with guaranteed -12-bit monotonicity performance over the industrial temperature range. -Is is programmable through an SPI interface. - -The internal DACs are loaded when the LOADDACS pin is pulled down. - -https://www.ti.com/lit/ds/sbas106/sbas106.pdf - -Required Properties: -- compatible: Should be one of: - "ti,dac7612" - "ti,dac7612u" - "ti,dac7612ub" -- reg: Definition as per Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional Properties: -- ti,loaddacs-gpios: GPIO descriptor for the LOADDACS pin. -- spi-*: Definition as per Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: - - dac@1 { - compatible = "ti,dac7612"; - reg = <0x1>; - ti,loaddacs-gpios = <&msmgpio 25 GPIO_ACTIVE_LOW>; - }; diff --git a/dts/Bindings/iio/dac/ti,dac7612.yaml b/dts/Bindings/iio/dac/ti,dac7612.yaml new file mode 100644 index 0000000000..d172b142f6 --- /dev/null +++ b/dts/Bindings/iio/dac/ti,dac7612.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/ti,dac7612.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DAC7612 family of DACs + +description: + The DAC7612 is a dual, 12-bit digital-to-analog converter (DAC) with + guaranteed 12-bit monotonicity performance over the industrial temperature + range. Is is programmable through an SPI interface. + +maintainers: + - Ricardo Ribalda Delgado <ricardo@ribalda.com> + +properties: + compatible: + enum: + - ti,dac7612 + - ti,dac7612u + - ti,dac7612ub + + reg: + maxItems: 1 + + ti,loaddacs-gpios: + description: + DACs are loaded when the pin connected to this GPIO is pulled low. + maxItems: 1 + + spi-max-frequency: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@1 { + compatible = "ti,dac7612"; + reg = <0x1>; + ti,loaddacs-gpios = <&msmgpio 25 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/dac/vf610-dac.txt b/dts/Bindings/iio/dac/vf610-dac.txt deleted file mode 100644 index 20c6c7ae96..0000000000 --- a/dts/Bindings/iio/dac/vf610-dac.txt +++ /dev/null @@ -1,20 +0,0 @@ -Freescale vf610 Digital to Analog Converter bindings - -The devicetree bindings are for the new DAC driver written for -vf610 SoCs from Freescale. - -Required properties: -- compatible: Should contain "fsl,vf610-dac" -- reg: Offset and length of the register set for the device -- interrupts: Should contain the interrupt for the device -- clocks: The clock is needed by the DAC controller -- clock-names: Must contain "dac" matching entry in the clocks property. - -Example: -dac0: dac@400cc000 { - compatible = "fsl,vf610-dac"; - reg = <0x400cc000 0x1000>; - interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "dac"; - clocks = <&clks VF610_CLK_DAC0>; -}; diff --git a/dts/Bindings/iio/frequency/adf4350.txt b/dts/Bindings/iio/frequency/adf4350.txt deleted file mode 100644 index f8c181d81d..0000000000 --- a/dts/Bindings/iio/frequency/adf4350.txt +++ /dev/null @@ -1,86 +0,0 @@ -Analog Devices ADF4350/ADF4351 device driver - -Required properties: - - compatible: Should be one of - * "adi,adf4350": When using the ADF4350 device - * "adi,adf4351": When using the ADF4351 device - - reg: SPI chip select numbert for the device - - spi-max-frequency: Max SPI frequency to use (< 20000000) - - clocks: From common clock binding. Clock is phandle to clock for - ADF435x Reference Clock (CLKIN). - -Optional properties: - - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number, - pll lock state is tested upon read. - - adi,channel-spacing: Channel spacing in Hz (influences MODULUS). - - adi,power-up-frequency: If set in Hz the PLL tunes to - the desired frequency on probe. - - adi,reference-div-factor: If set the driver skips dynamic calculation - and uses this default value instead. - - adi,reference-doubler-enable: Enables reference doubler. - - adi,reference-div2-enable: Enables reference divider. - - adi,phase-detector-polarity-positive-enable: Enables positive phase - detector polarity. Default = negative. - - adi,lock-detect-precision-6ns-enable: Enables 6ns lock detect precision. - Default = 10ns. - - adi,lock-detect-function-integer-n-enable: Enables lock detect - for integer-N mode. Default = factional-N mode. - - adi,charge-pump-current: Charge pump current in mA. - Default = 2500mA. - - adi,muxout-select: On chip multiplexer output selection. - Valid values for the multiplexer output are: - 0: Three-State Output (default) - 1: DVDD - 2: DGND - 3: R-Counter output - 4: N-Divider output - 5: Analog lock detect - 6: Digital lock detect - - adi,low-spur-mode-enable: Enables low spur mode. - Default = Low noise mode. - - adi,cycle-slip-reduction-enable: Enables cycle slip reduction. - - adi,charge-cancellation-enable: Enabled charge pump - charge cancellation for integer-N modes. - - adi,anti-backlash-3ns-enable: Enables 3ns antibacklash pulse width - for integer-N modes. - - adi,band-select-clock-mode-high-enable: Enables faster band - selection logic. - - adi,12bit-clk-divider: Clock divider value used when - adi,12bit-clkdiv-mode != 0 - - adi,clk-divider-mode: - Valid values for the clkdiv mode are: - 0: Clock divider off (default) - 1: Fast lock enable - 2: Phase resync enable - - adi,aux-output-enable: Enables auxiliary RF output. - - adi,aux-output-fundamental-enable: Selects fundamental VCO output on - the auxiliary RF output. Default = Output of RF dividers. - - adi,mute-till-lock-enable: Enables Mute-Till-Lock-Detect function. - - adi,output-power: Output power selection. - Valid values for the power mode are: - 0: -4dBm (default) - 1: -1dBm - 2: +2dBm - 3: +5dBm - - adi,aux-output-power: Auxiliary output power selection. - Valid values for the power mode are: - 0: -4dBm (default) - 1: -1dBm - 2: +2dBm - 3: +5dBm - - -Example: - lo_pll0_rx_adf4351: adf4351-rx-lpc@4 { - compatible = "adi,adf4351"; - reg = <4>; - spi-max-frequency = <10000000>; - clocks = <&clk0_ad9523 9>; - clock-names = "clkin"; - adi,channel-spacing = <10000>; - adi,power-up-frequency = <2400000000>; - adi,phase-detector-polarity-positive-enable; - adi,charge-pump-current = <2500>; - adi,output-power = <3>; - adi,mute-till-lock-enable; - }; diff --git a/dts/Bindings/iio/frequency/adi,adf4350.yaml b/dts/Bindings/iio/frequency/adi,adf4350.yaml new file mode 100644 index 0000000000..d7f20b8518 --- /dev/null +++ b/dts/Bindings/iio/frequency/adi,adf4350.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADF4350/ADF4351 wideband synthesizer + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +properties: + compatible: + enum: + - adi,adf4350 + - adi,adf4351 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + clocks: + maxItems: 1 + description: Clock to provide CLKIN reference clock signal. + + clock-names: + const: clkin + + gpios: + maxItems: 1 + description: Lock detect GPIO. + + adi,channel-spacing: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Channel spacing in Hz (influences MODULUS). + + adi,power-up-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + If set the PLL tunes to this frequency (in Hz) on driver probe. + + adi,reference-div-factor: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + If set the driver skips dynamic calculation and uses this default + value instead. + + adi,reference-doubler-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables reference doubler. + + adi,reference-div2-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables reference divider. + + adi,phase-detector-polarity-positive-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables positive phase detector polarity. Default negative. + + adi,lock-detect-precision-6ns-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables 6ns lock detect precision. Default = 10ns. + + adi,lock-detect-function-integer-n-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enables lock detect for integer-N mode. Default = factional-N mode. + + adi,charge-pump-current: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Charge pump current in mA. Default = 2500mA. + + adi,muxout-select: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + description: | + On chip multiplexer output selection. + Valid values for the multiplexer output are: + 0: Three-State Output (default) + 1: DVDD + 2: DGND + 3: R-Counter output + 4: N-Divider output + 5: Analog lock detect + 6: Digital lock detect + + adi,low-spur-mode-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables low spur mode. Default = Low noise mode. + + adi,cycle-slip-reduction-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables cycle slip reduction. + + adi,charge-cancellation-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enabled charge pump charge cancellation for integer-N modes. + + adi,anti-backlash-3ns-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enables 3ns antibacklash pulse width for integer-N modes. + + adi,band-select-clock-mode-high-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables faster band selection logic. + + adi,12bit-clk-divider: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock divider value used when adi,12bit-clkdiv-mode != 0 + + adi,clk-divider-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + description: | + Valid values for the clkdiv mode are: + 0: Clock divider off (default) + 1: Fast lock enable + 2: Phase resync enable + + adi,aux-output-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables auxiliary RF output. + + adi,aux-output-fundamental-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Selects fundamental VCO output on the auxiliary RF output. + Default = Output of RF dividers. + + adi,mute-till-lock-enable: + $ref: /schemas/types.yaml#/definitions/flag + description: Enables Mute-Till-Lock-Detect function. + + adi,output-power: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + description: | + Output power selection. + Valid values for the power mode are: + 0: -4dBm (default) + 1: -1dBm + 2: +2dBm + 3: +5dBm + + adi,aux-output-power: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + description: | + Auxiliary output power selection. + Valid values for the power mode are: + 0: -4dBm (default) + 1: -1dBm + 2: +2dBm + 3: +5dBm + +additionalProperties: false + +required: + - compatible + - reg + - clocks + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + pll@4 { + compatible = "adi,adf4351"; + reg = <4>; + spi-max-frequency = <10000000>; + clocks = <&clk0_ad9523 9>; + clock-names = "clkin"; + adi,channel-spacing = <10000>; + adi,power-up-frequency = <2400000000>; + adi,phase-detector-polarity-positive-enable; + adi,charge-pump-current = <2500>; + adi,output-power = <3>; + adi,mute-till-lock-enable; + }; + }; +... diff --git a/dts/Bindings/iio/gyroscope/bmg160.txt b/dts/Bindings/iio/gyroscope/bmg160.txt deleted file mode 100644 index bb43d1ad9c..0000000000 --- a/dts/Bindings/iio/gyroscope/bmg160.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Bosch BMG160 triaxial rotation sensor (gyroscope) - -Required properties: - - - compatible : should be "bosch,bmg160", "bosch,bmi055_gyro" or "bosch,bmi088_gyro" - - reg : the I2C address of the sensor (0x69) - -Optional properties: - - - interrupts : interrupt mapping for GPIO IRQ, it should by configured with - flags IRQ_TYPE_EDGE_RISING - -Example: - -bmg160@69 { - compatible = "bosch,bmg160"; - reg = <0x69>; - interrupt-parent = <&gpio6>; - interrupts = <18 (IRQ_TYPE_EDGE_RISING)>; -}; diff --git a/dts/Bindings/iio/gyroscope/bosch,bmg160.yaml b/dts/Bindings/iio/gyroscope/bosch,bmg160.yaml new file mode 100644 index 0000000000..0466483be6 --- /dev/null +++ b/dts/Bindings/iio/gyroscope/bosch,bmg160.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/gyroscope/bosch,bmg160.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bosch BMG160 triaxial rotation sensor (gyroscope) + +maintainers: + - H. Nikolaus Schaller <hns@goldelico.com> + +properties: + compatible: + enum: + - bosch,bmg160 + - bosch,bmi055_gyro + - bosch,bmi088_gyro + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + description: + Should be configured with type IRQ_TYPE_EDGE_RISING. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + gyroscope@69 { + compatible = "bosch,bmg160"; + reg = <0x69>; + interrupt-parent = <&gpio6>; + interrupts = <18 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/dts/Bindings/iio/gyroscope/nxp,fxas21002c.txt b/dts/Bindings/iio/gyroscope/nxp,fxas21002c.txt deleted file mode 100644 index 465e104bbf..0000000000 --- a/dts/Bindings/iio/gyroscope/nxp,fxas21002c.txt +++ /dev/null @@ -1,31 +0,0 @@ -* NXP FXAS21002C Gyroscope device tree bindings - -http://www.nxp.com/products/sensors/gyroscopes/3-axis-digital-gyroscope:FXAS21002C - -Required properties: - - compatible : should be "nxp,fxas21002c" - - reg : the I2C address of the sensor or SPI chip select number for the - device. - - vdd-supply: phandle to the regulator that provides power to the sensor. - - vddio-supply: phandle to the regulator that provides power to the bus. - -Optional properties: - - reset-gpios : gpio used to reset the device, see gpio/gpio.txt - - interrupts : device support 2 interrupts, INT1 and INT2, - the interrupts can be triggered on rising or falling edges. - See interrupt-controller/interrupts.txt - - interrupt-names: should contain "INT1" or "INT2", the gyroscope interrupt - line in use. - - drive-open-drain: the interrupt/data ready line will be configured - as open drain, which is useful if several sensors share - the same interrupt line. This is a boolean property. - (This binding is taken from pinctrl/pinctrl-bindings.txt) - -Example: - -gyroscope@20 { - compatible = "nxp,fxas21002c"; - reg = <0x20>; - vdd-supply = <®_peri_3p15v>; - vddio-supply = <®_peri_3p15v>; -}; diff --git a/dts/Bindings/iio/gyroscope/nxp,fxas21002c.yaml b/dts/Bindings/iio/gyroscope/nxp,fxas21002c.yaml new file mode 100644 index 0000000000..d97ee774d6 --- /dev/null +++ b/dts/Bindings/iio/gyroscope/nxp,fxas21002c.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/gyroscope/nxp,fxas21002c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP FXAS21002C Gyroscope + +maintainers: + - Rui Miguel Silva <rmfrfs@gmail.com> + +description: | + 3 axis digital gyroscope device with an I2C and SPI interface. + http://www.nxp.com/products/sensors/gyroscopes/3-axis-digital-gyroscope:FXAS21002C + +properties: + compatible: + const: nxp,fxas21002c + + reg: + maxItems: 1 + + vdd-supply: + description: Regulator that provides power to the sensor + + vddio-supply: + description: Regulator that provides power to the bus + + reset-gpios: + maxItems: 1 + description: GPIO connected to reset + + interrupts: + minItems: 1 + maxItems: 2 + description: Either interrupt may be triggered on rising or falling edges. + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + enum: + - INT1 + - INT2 + + drive-open-drain: + type: boolean + description: the interrupt/data ready line will be configured as open drain, + which is useful if several sensors share the same interrupt + line. + + spi-max-frequency: + maximum: 2000000 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + gyroscope@20 { + compatible = "nxp,fxas21002c"; + reg = <0x20>; + + vdd-supply = <®_peri_3p15v>; + vddio-supply = <®_peri_3p15v>; + + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "INT1"; + }; + }; + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + gyroscope@0 { + compatible = "nxp,fxas2102c"; + reg = <0x0>; + + spi-max-frequency = <2000000>; + + interrupt-parent = <&gpio2>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "INT2"; + }; + }; diff --git a/dts/Bindings/iio/health/afe4403.txt b/dts/Bindings/iio/health/afe4403.txt deleted file mode 100644 index 8e412054d6..0000000000 --- a/dts/Bindings/iio/health/afe4403.txt +++ /dev/null @@ -1,33 +0,0 @@ -Texas Instruments AFE4403 Heart rate and Pulse Oximeter - -Required properties: - - compatible : Should be "ti,afe4403". - - reg : SPI chip select address of device. - - tx-supply : Regulator supply to transmitting LEDs. - - interrupts : The interrupt line the device ADC_RDY pin is - connected to. For details refer to, - ../../interrupt-controller/interrupts.txt. - -Optional properties: - - reset-gpios : GPIO used to reset the device. - For details refer to, ../../gpio/gpio.txt. - -For other required and optional properties of SPI slave nodes -please refer to ../../spi/spi-bus.txt. - -Example: - -&spi0 { - heart_mon@0 { - compatible = "ti,afe4403"; - reg = <0>; - spi-max-frequency = <10000000>; - - tx-supply = <&vbat>; - - interrupt-parent = <&gpio1>; - interrupts = <28 IRQ_TYPE_EDGE_RISING>; - - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; - }; -}; diff --git a/dts/Bindings/iio/health/afe4404.txt b/dts/Bindings/iio/health/afe4404.txt deleted file mode 100644 index 0b52830a0d..0000000000 --- a/dts/Bindings/iio/health/afe4404.txt +++ /dev/null @@ -1,29 +0,0 @@ -Texas Instruments AFE4404 Heart rate and Pulse Oximeter - -Required properties: - - compatible : Should be "ti,afe4404". - - reg : I2C address of the device. - - tx-supply : Regulator supply to transmitting LEDs. - - interrupts : The interrupt line the device ADC_RDY pin is - connected to. For details refer to, - ../interrupt-controller/interrupts.txt. - -Optional properties: - - reset-gpios : GPIO used to reset the device. - For details refer to, ../gpio/gpio.txt. - -Example: - -&i2c2 { - heart_mon@58 { - compatible = "ti,afe4404"; - reg = <0x58>; - - tx-supply = <&vbat>; - - interrupt-parent = <&gpio1>; - interrupts = <28 IRQ_TYPE_EDGE_RISING>; - - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; - }; -}; diff --git a/dts/Bindings/iio/health/max30100.txt b/dts/Bindings/iio/health/max30100.txt deleted file mode 100644 index 0054908a6e..0000000000 --- a/dts/Bindings/iio/health/max30100.txt +++ /dev/null @@ -1,28 +0,0 @@ -Maxim MAX30100 heart rate and pulse oximeter sensor - -* https://datasheets.maximintegrated.com/en/ds/MAX30100.pdf - -Required properties: - - compatible: must be "maxim,max30100" - - reg: the I2C address of the sensor - - interrupts: the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic - interrupt client node bindings. - -Optional properties: - - maxim,led-current-microamp: configuration for LED current in microamperes - while the engine is running. First indexed value is the configuration for - the RED LED, and second value is for the IR LED. - - Refer to the datasheet for the allowed current values. - -Example: - -max30100@57 { - compatible = "maxim,max30100"; - reg = <0x57>; - maxim,led-current-microamp = <24000 50000>; - interrupt-parent = <&gpio1>; - interrupts = <16 2>; -}; diff --git a/dts/Bindings/iio/health/max30102.txt b/dts/Bindings/iio/health/max30102.txt deleted file mode 100644 index 7ef7ae40ae..0000000000 --- a/dts/Bindings/iio/health/max30102.txt +++ /dev/null @@ -1,33 +0,0 @@ -Maxim MAX30102 heart rate and pulse oximeter sensor -Maxim MAX30105 optical particle-sensing module - -* https://datasheets.maximintegrated.com/en/ds/MAX30102.pdf -* https://datasheets.maximintegrated.com/en/ds/MAX30105.pdf - -Required properties: - - compatible: must be "maxim,max30102" or "maxim,max30105" - - reg: the I2C address of the sensor - - interrupts: the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic - interrupt client node bindings. - -Optional properties: - - maxim,red-led-current-microamp: configuration for red LED current - - maxim,ir-led-current-microamp: configuration for IR LED current - - maxim,green-led-current-microamp: configuration for green LED current - (max30105 only) - - Note that each step is approximately 200 microamps, ranging from 0 uA to - 50800 uA. - -Example: - -max30102@57 { - compatible = "maxim,max30102"; - reg = <0x57>; - maxim,red-led-current-microamp = <7000>; - maxim,ir-led-current-microamp = <7000>; - interrupt-parent = <&gpio1>; - interrupts = <16 2>; -}; diff --git a/dts/Bindings/iio/health/maxim,max30100.yaml b/dts/Bindings/iio/health/maxim,max30100.yaml new file mode 100644 index 0000000000..64b8626370 --- /dev/null +++ b/dts/Bindings/iio/health/maxim,max30100.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/health/maxim,max30100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX30100 heart rate and pulse oximeter sensor + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +properties: + compatible: + const: maxim,max30100 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Connected to ADC_RDY pin. + + maxim,led-current-microamp: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + description: | + LED current whilst the engine is running. First indexed value is + the configuration for the RED LED, and second value is for the IR LED. + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + heart-rate@57 { + compatible = "maxim,max30100"; + reg = <0x57>; + maxim,led-current-microamp = <24000 50000>; + interrupt-parent = <&gpio1>; + interrupts = <16 2>; + }; + }; +... diff --git a/dts/Bindings/iio/health/maxim,max30102.yaml b/dts/Bindings/iio/health/maxim,max30102.yaml new file mode 100644 index 0000000000..c13c10c8d6 --- /dev/null +++ b/dts/Bindings/iio/health/maxim,max30102.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/health/maxim,max30102.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX30102 heart rate and pulse oximeter and MAX30105 particle-sensor + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +properties: + compatible: + enum: + - maxim,max30102 + - maxim,max30105 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Connected to ADC_RDY pin. + + maxim,red-led-current-microamp: + description: RED LED current. Each step is approximately 200 microamps. + minimum: 0 + maximum: 50800 + + maxim,ir-led-current-microamp: + description: IR LED current. Each step is approximately 200 microamps. + minimum: 0 + maximum: 50800 + + maxim,green-led-current-microamp: + description: Green LED current. Each step is approximately 200 microamps. + minimum: 0 + maximum: 50800 + +allOf: + - if: + properties: + compatible: + contains: + const: maxim,max30100 + then: + properties: + maxim,green-led-current-microamp: false + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + heart-rate@57 { + compatible = "maxim,max30102"; + reg = <0x57>; + maxim,red-led-current-microamp = <7000>; + maxim,ir-led-current-microamp = <7000>; + interrupt-parent = <&gpio1>; + interrupts = <16 2>; + }; + }; +... diff --git a/dts/Bindings/iio/health/ti,afe4403.yaml b/dts/Bindings/iio/health/ti,afe4403.yaml new file mode 100644 index 0000000000..d861526c5c --- /dev/null +++ b/dts/Bindings/iio/health/ti,afe4403.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/health/ti,afe4403.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments AFE4403 Heart rate and Pulse Oximeter + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +properties: + compatible: + const: ti,afe4403 + + reg: + maxItems: 1 + + tx-supply: + description: Supply to transmitting LEDs. + + interrupts: + maxItems: 1 + description: Connected to ADC_RDY pin. + + reset-gpios: true + + spi-max-frequency: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + heart_mon@0 { + compatible = "ti,afe4403"; + reg = <0>; + spi-max-frequency = <10000000>; + tx-supply = <&vbat>; + interrupt-parent = <&gpio1>; + interrupts = <28 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/health/ti,afe4404.yaml b/dts/Bindings/iio/health/ti,afe4404.yaml new file mode 100644 index 0000000000..3b4d6c48b8 --- /dev/null +++ b/dts/Bindings/iio/health/ti,afe4404.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/health/ti,afe4404.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments AFE4404 Heart rate and Pulse Oximeter + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +properties: + compatible: + const: ti,afe4403 + + reg: + maxItems: 1 + + tx-supply: + description: Supply to transmitting LEDs. + + interrupts: + maxItems: 1 + description: Connected to ADC_RDY pin. + + reset-gpios: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + heart_mon@58 { + compatible = "ti,afe4404"; + reg = <0x58>; + tx-supply = <&vbat>; + interrupt-parent = <&gpio1>; + interrupts = <28 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/humidity/dht11.txt b/dts/Bindings/iio/humidity/dht11.txt deleted file mode 100644 index ecc24c199f..0000000000 --- a/dts/Bindings/iio/humidity/dht11.txt +++ /dev/null @@ -1,14 +0,0 @@ -* DHT11 humidity/temperature sensor (and compatibles like DHT22) - -Required properties: - - compatible: Should be "dht11" - - gpios: Should specify the GPIO connected to the sensor's data - line, see "gpios property" in - Documentation/devicetree/bindings/gpio/gpio.txt. - -Example: - -humidity_sensor { - compatible = "dht11"; - gpios = <&gpio0 6 0>; -} diff --git a/dts/Bindings/iio/humidity/dht11.yaml b/dts/Bindings/iio/humidity/dht11.yaml new file mode 100644 index 0000000000..2247481d02 --- /dev/null +++ b/dts/Bindings/iio/humidity/dht11.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/humidity/dht11.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DHT11 humidity + temperature sensor + +maintainers: + - Harald Geyer <harald@ccbib.org> + +description: | + A simple and low cost module providing a non standard single GPIO based + interface. It is believed the part is made by aosong but don't have + absolute confirmation of this, or what the aosong part number is. + +properties: + compatible: + const: dht11 + + reg: + maxItems: 1 + + gpios: + maxItems: 1 + description: + Single, interrupt capable, GPIO used to communicate with the device. + +required: + - compatible + - gpios + +additionalProperties: false + +examples: + - | + humidity_sensor { + compatible = "dht11"; + gpios = <&gpio0 6 0>; + }; +... diff --git a/dts/Bindings/iio/humidity/hdc100x.txt b/dts/Bindings/iio/humidity/hdc100x.txt deleted file mode 100644 index c52333bdfd..0000000000 --- a/dts/Bindings/iio/humidity/hdc100x.txt +++ /dev/null @@ -1,17 +0,0 @@ -* HDC100x temperature + humidity sensors - -Required properties: - - compatible: Should contain one of the following: - ti,hdc1000 - ti,hdc1008 - ti,hdc1010 - ti,hdc1050 - ti,hdc1080 - - reg: i2c address of the sensor - -Example: - -hdc100x@40 { - compatible = "ti,hdc1000"; - reg = <0x40>; -}; diff --git a/dts/Bindings/iio/humidity/hts221.txt b/dts/Bindings/iio/humidity/hts221.txt deleted file mode 100644 index 84d0293722..0000000000 --- a/dts/Bindings/iio/humidity/hts221.txt +++ /dev/null @@ -1,30 +0,0 @@ -* HTS221 STM humidity + temperature sensor - -Required properties: -- compatible: should be "st,hts221" -- reg: i2c address of the sensor / spi cs line - -Optional properties: -- drive-open-drain: the interrupt/data ready line will be configured - as open drain, which is useful if several sensors share the same - interrupt line. This is a boolean property. - If the requested interrupt is configured as IRQ_TYPE_LEVEL_HIGH or - IRQ_TYPE_EDGE_RISING a pull-down resistor is needed to drive the line - when it is not active, whereas a pull-up one is needed when interrupt - line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. - Refer to pinctrl/pinctrl-bindings.txt for the property description. -- interrupts: interrupt mapping for IRQ. It should be configured with - flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or - IRQ_TYPE_EDGE_FALLING. - - Refer to interrupt-controller/interrupts.txt for generic interrupt - client node bindings. - -Example: - -hts221@5f { - compatible = "st,hts221"; - reg = <0x5f>; - interrupt-parent = <&gpio0>; - interrupts = <0 IRQ_TYPE_EDGE_RISING>; -}; diff --git a/dts/Bindings/iio/humidity/htu21.txt b/dts/Bindings/iio/humidity/htu21.txt deleted file mode 100644 index 97d79636f7..0000000000 --- a/dts/Bindings/iio/humidity/htu21.txt +++ /dev/null @@ -1,13 +0,0 @@ -*HTU21 - Measurement-Specialties htu21 temperature & humidity sensor and humidity part of MS8607 sensor - -Required properties: - - - compatible: should be "meas,htu21" or "meas,ms8607-humidity" - - reg: I2C address of the sensor - -Example: - -htu21@40 { - compatible = "meas,htu21"; - reg = <0x40>; -}; diff --git a/dts/Bindings/iio/humidity/st,hts221.yaml b/dts/Bindings/iio/humidity/st,hts221.yaml new file mode 100644 index 0000000000..598473df74 --- /dev/null +++ b/dts/Bindings/iio/humidity/st,hts221.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/humidity/st,hts221.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HTS221 STM humidity + temperature sensor + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + +description: | + Humidity and temperature sensor with I2C interface and data ready + interrupt. + +properties: + compatible: + const: st,hts221 + + reg: + maxItems: 1 + + drive-open-drain: + type: boolean + description: + The interrupt/data ready line will be configured as open drain, which + is useful if several sensors share the same interrupt line. + + vdd-supply: true + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hts221@5f { + compatible = "st,hts221"; + reg = <0x5f>; + interrupt-parent = <&gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/dts/Bindings/iio/humidity/ti,hdc2010.yaml b/dts/Bindings/iio/humidity/ti,hdc2010.yaml index 7037f82ec7..88384b69f9 100644 --- a/dts/Bindings/iio/humidity/ti,hdc2010.yaml +++ b/dts/Bindings/iio/humidity/ti,hdc2010.yaml @@ -22,8 +22,7 @@ properties: - ti,hdc2010 - ti,hdc2080 - vdd-supply: - maxItems: 1 + vdd-supply: true reg: maxItems: 1 diff --git a/dts/Bindings/iio/iio-bindings.txt b/dts/Bindings/iio/iio-bindings.txt deleted file mode 100644 index aa63cac732..0000000000 --- a/dts/Bindings/iio/iio-bindings.txt +++ /dev/null @@ -1,102 +0,0 @@ -This binding is derived from clock bindings, and based on suggestions -from Lars-Peter Clausen [1]. - -Sources of IIO channels can be represented by any node in the device -tree. Those nodes are designated as IIO providers. IIO consumer -nodes use a phandle and IIO specifier pair to connect IIO provider -outputs to IIO inputs. Similar to the gpio specifiers, an IIO -specifier is an array of one or more cells identifying the IIO -output on a device. The length of an IIO specifier is defined by the -value of a #io-channel-cells property in the IIO provider node. - -[1] https://marc.info/?l=linux-iio&m=135902119507483&w=2 - -==IIO providers== - -Required properties: -#io-channel-cells: Number of cells in an IIO specifier; Typically 0 for nodes - with a single IIO output and 1 for nodes with multiple - IIO outputs. - -Optional properties: -label: A symbolic name for the device. - - -Example for a simple configuration with no trigger: - - adc: voltage-sensor@35 { - compatible = "maxim,max1139"; - reg = <0x35>; - #io-channel-cells = <1>; - label = "voltage_feedback_group1"; - }; - -Example for a configuration with trigger: - - adc@35 { - compatible = "some-vendor,some-adc"; - reg = <0x35>; - - adc1: iio-device@0 { - #io-channel-cells = <1>; - /* other properties */ - }; - adc2: iio-device@1 { - #io-channel-cells = <1>; - /* other properties */ - }; - }; - -==IIO consumers== - -Required properties: -io-channels: List of phandle and IIO specifier pairs, one pair - for each IIO input to the device. Note: if the - IIO provider specifies '0' for #io-channel-cells, - then only the phandle portion of the pair will appear. - -Optional properties: -io-channel-names: - List of IIO input name strings sorted in the same - order as the io-channels property. Consumers drivers - will use io-channel-names to match IIO input names - with IIO specifiers. -io-channel-ranges: - Empty property indicating that child nodes can inherit named - IIO channels from this node. Useful for bus nodes to provide - and IIO channel to their children. - -For example: - - device { - io-channels = <&adc 1>, <&ref 0>; - io-channel-names = "vcc", "vdd"; - }; - -This represents a device with two IIO inputs, named "vcc" and "vdd". -The vcc channel is connected to output 1 of the &adc device, and the -vdd channel is connected to output 0 of the &ref device. - -==Example== - - adc: max1139@35 { - compatible = "maxim,max1139"; - reg = <0x35>; - #io-channel-cells = <1>; - }; - - ... - - iio-hwmon { - compatible = "iio-hwmon"; - io-channels = <&adc 0>, <&adc 1>, <&adc 2>, - <&adc 3>, <&adc 4>, <&adc 5>, - <&adc 6>, <&adc 7>, <&adc 8>, - <&adc 9>; - }; - - some_consumer { - compatible = "some-consumer"; - io-channels = <&adc 10>, <&adc 11>; - io-channel-names = "adc1", "adc2"; - }; diff --git a/dts/Bindings/iio/impedance-analyzer/ad5933.txt b/dts/Bindings/iio/impedance-analyzer/ad5933.txt deleted file mode 100644 index 5ff38728ff..0000000000 --- a/dts/Bindings/iio/impedance-analyzer/ad5933.txt +++ /dev/null @@ -1,26 +0,0 @@ -Analog Devices AD5933/AD5934 Impedance Converter, Network Analyzer - -https://www.analog.com/media/en/technical-documentation/data-sheets/AD5933.pdf -https://www.analog.com/media/en/technical-documentation/data-sheets/AD5934.pdf - -Required properties: - - compatible : should be one of - "adi,ad5933" - "adi,ad5934" - - reg : the I2C address. - - vdd-supply : The regulator supply for DVDD, AVDD1 and AVDD2 when they - are connected together. - -Optional properties: -- clocks : external clock reference. -- clock-names : must be "mclk" if clocks is set. - -Example for a I2C device node: - - impedance-analyzer@0d { - compatible = "adi,adxl345"; - reg = <0x0d>; - vdd-supply = <&vdd_supply>; - clocks = <&ref_clk>; - clock-names = "mclk"; - }; diff --git a/dts/Bindings/iio/impedance-analyzer/adi,ad5933.yaml b/dts/Bindings/iio/impedance-analyzer/adi,ad5933.yaml new file mode 100644 index 0000000000..2ad043554b --- /dev/null +++ b/dts/Bindings/iio/impedance-analyzer/adi,ad5933.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/impedance-analyzer/adi,ad5933.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5933/AD5934 Impedance Converter, Network Analyzer + +maintainers: + - Marcelo Schmitt <marcelo.schmitt1@gmail.com> + - Gabriel Capella <gabriel@capella.pro> + +description: | + https://www.analog.com/media/en/technical-documentation/data-sheets/AD5933.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD5934.pdf + +properties: + compatible: + enum: + - adi,ad5933 + - adi,ad5934 + + reg: + maxItems: 1 + + vdd-supply: + description: | + The regulator supply for DVDD, AVDD1 and AVDD2 when they + are connected together. Used to calculate voltage scaling of measurement + channels. + + clocks: + maxItems: 1 + + clock-names: + const: mclk + +additionalProperties: false + +required: + - compatible + - reg + - vdd-supply + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + impedance-analyzer@d { + compatible = "adi,ad5933"; + reg = <0x0d>; + vdd-supply = <&vdd_supply>; + clocks = <&ref_clk>; + clock-names = "mclk"; + }; + }; +... diff --git a/dts/Bindings/iio/imu/adi,adis16480.txt b/dts/Bindings/iio/imu/adi,adis16480.txt deleted file mode 100644 index cd903a1d88..0000000000 --- a/dts/Bindings/iio/imu/adi,adis16480.txt +++ /dev/null @@ -1,86 +0,0 @@ - -Analog Devices ADIS16480 and similar IMUs - -Required properties for the ADIS16480: - -- compatible: Must be one of - * "adi,adis16375" - * "adi,adis16480" - * "adi,adis16485" - * "adi,adis16488" - * "adi,adis16490" - * "adi,adis16495-1" - * "adi,adis16495-2" - * "adi,adis16495-3" - * "adi,adis16497-1" - * "adi,adis16497-2" - * "adi,adis16497-3" -- reg: SPI chip select number for the device -- spi-max-frequency: Max SPI frequency to use - see: Documentation/devicetree/bindings/spi/spi-bus.txt -- spi-cpha: See Documentation/devicetree/bindings/spi/spi-bus.txt -- spi-cpol: See Documentation/devicetree/bindings/spi/spi-bus.txt -- interrupts: interrupt mapping for IRQ, accepted values are: - * IRQF_TRIGGER_RISING - * IRQF_TRIGGER_FALLING - -Optional properties: - -- interrupt-names: Data ready line selection. Valid values are: - * DIO1 - * DIO2 - * DIO3 - * DIO4 - If this field is left empty, DIO1 is assigned as default data ready - signal. -- reset-gpios: must be the device tree identifier of the RESET pin. As the line - is active low, it should be marked GPIO_ACTIVE_LOW. -- clocks: phandle to the external clock. Should be set according to - "clock-names". - If this field is left empty together with the "clock-names" field, then - the internal clock is used. -- clock-names: The name of the external clock to be used. Valid values are: - * sync: In sync mode, the internal clock is disabled and the frequency - of the external clock signal establishes therate of data - collection and processing. See Fig 14 and 15 in the datasheet. - The clock-frequency must be: - * 3000 to 4500 Hz for adis1649x devices. - * 700 to 2400 Hz for adis1648x devices. - * pps: In Pulse Per Second (PPS) Mode, the rate of data collection and - production is equal to the product of the external clock - frequency and the scale factor in the SYNC_SCALE register, see - Table 154 in the datasheet. - The clock-frequency must be: - * 1 to 128 Hz for adis1649x devices. - * This mode is not supported by adis1648x devices. - If this field is left empty together with the "clocks" field, then the - internal clock is used. -- adi,ext-clk-pin: The DIOx line to be used as an external clock input. - Valid values are: - * DIO1 - * DIO2 - * DIO3 - * DIO4 - Each DIOx pin supports only one function at a time (data ready line - selection or external clock input). When a single pin has two - two assignments, the enable bit for the lower priority function - automatically resets to zero (disabling the lower priority function). - Data ready has highest priority. - If this field is left empty, DIO2 is assigned as default external clock - input pin. - -Example: - - imu@0 { - compatible = "adi,adis16495-1"; - reg = <0>; - spi-max-frequency = <3200000>; - spi-cpol; - spi-cpha; - interrupts = <25 IRQF_TRIGGER_FALLING>; - interrupt-parent = <&gpio>; - interrupt-names = "DIO2"; - clocks = <&adis16495_sync>; - clock-names = "sync"; - adi,ext-clk-pin = "DIO1"; - }; diff --git a/dts/Bindings/iio/imu/adi,adis16480.yaml b/dts/Bindings/iio/imu/adi,adis16480.yaml new file mode 100644 index 0000000000..5dbe24be99 --- /dev/null +++ b/dts/Bindings/iio/imu/adi,adis16480.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/imu/adi,adis16480.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADIS16480 and similar IMUs + +maintainers: + - Alexandru Ardelean <alexandru.ardelean@analog.com> + +properties: + compatible: + enum: + - adi,adis16375 + - adi,adis16480 + - adi,adis16485 + - adi,adis16488 + - adi,adis16490 + - adi,adis16495-1 + - adi,adis16495-2 + - adi,adis16495-3 + - adi,adis16497-1 + - adi,adis16497-2 + - adi,adis16497-3 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + description: | + Accepted interrupt types are: + * IRQ_TYPE_EDGE_RISING + * IRQ_TYPE_EDGE_FALLING + + interrupt-names: + minItems: 1 + maxItems: 2 + description: + Default if not supplied is DIO1. + items: + enum: + - DIO1 + - DIO2 + - DIO3 + - DIO4 + + spi-max-frequency: true + + spi-cpha: true + spi-cpol: true + + reset-gpios: + maxItems: 1 + description: Connected to RESET pin which is active low. + + clocks: + maxItems: 1 + description: If not provided, then the internal clock is used. + + clock-names: + description: | + sync: In sync mode, the internal clock is disabled and the frequency + of the external clock signal establishes therate of data + collection and processing. See Fig 14 and 15 in the datasheet. + The clock-frequency must be: + * 3000 to 4500 Hz for adis1649x devices. + * 700 to 2400 Hz for adis1648x devices. + pps: In Pulse Per Second (PPS) Mode, the rate of data collection and + production is equal to the product of the external clock + frequency and the scale factor in the SYNC_SCALE register, see + Table 154 in the datasheet. + The clock-frequency must be: + * 1 to 128 Hz for adis1649x devices. + * This mode is not supported by adis1648x devices. + enum: + - sync + - pps + + adi,ext-clk-pin: + $ref: /schemas/types.yaml#/definitions/string + description: | + The DIOx line to be used as an external clock input. + Each DIOx pin supports only one function at a time (data ready line + selection or external clock input). When a single pin has two + two assignments, the enable bit for the lower priority function + automatically resets to zero (disabling the lower priority function). + Data ready has highest priority. + If not provided then DIO2 is assigned as default external clock + input pin. + enum: + - DIO1 + - DIO2 + - DIO3 + - DIO4 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - spi-cpha + - spi-cpol + - spi-max-frequency + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + imu@0 { + compatible = "adi,adis16495-1"; + reg = <0>; + spi-max-frequency = <3200000>; + spi-cpol; + spi-cpha; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + interrupt-names = "DIO2"; + clocks = <&adis16495_sync>; + clock-names = "sync"; + adi,ext-clk-pin = "DIO1"; + }; + }; +... diff --git a/dts/Bindings/iio/imu/st,lsm6dsx.yaml b/dts/Bindings/iio/imu/st,lsm6dsx.yaml new file mode 100644 index 0000000000..d9b3213318 --- /dev/null +++ b/dts/Bindings/iio/imu/st,lsm6dsx.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/imu/st,lsm6dsx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STM 6-axis (acc + gyro) IMU Mems sensors + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + +description: + Devices have both I2C and SPI interfaces. + +properties: + compatible: + enum: + - st,lsm6ds3 + - st,lsm6ds3h + - st,lsm6dsl + - st,lsm6dsm + - st,ism330dlc + - st,lsm6dso + - st,asm330lhh + - st,lsm6dsox + - st,lsm6dsr + - st,lsm6ds3tr-c + - st,ism330dhcx + - st,lsm9ds1-imu + - st,lsm6ds0 + - st,lsm6dsrx + - st,lsm6dst + - st,lsm6dsop + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + description: + Supports up to 2 interrupt lines via the INT1 and INT2 pins. + + spi-max-frequency: true + + vdd-supply: + description: if defined provides VDD power to the sensor. + + vddio-supply: + description: if defined provides VDD IO power to the sensor. + + st,drdy-int-pin: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + The pin on the package that will be used to signal data ready + enum: + - 1 + - 2 + + st,pullups: + type: boolean + description: enable/disable internal i2c controller pullup resistors. + + drive-open-drain: + type: boolean + description: + The interrupt/data ready line will be configured as open drain, which + is useful if several sensors share the same interrupt line. + + wakeup-source: + $ref: /schemas/types.yaml#/definitions/flag + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + imu@6b { + compatible = "st,lsm6dsm"; + reg = <0x6b>; + interrupt-parent = <&gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/dts/Bindings/iio/imu/st_lsm6dsx.txt b/dts/Bindings/iio/imu/st_lsm6dsx.txt deleted file mode 100644 index cef4bc16fc..0000000000 --- a/dts/Bindings/iio/imu/st_lsm6dsx.txt +++ /dev/null @@ -1,48 +0,0 @@ -* ST_LSM6DSx driver for STM 6-axis (acc + gyro) imu Mems sensors - -Required properties: -- compatible: must be one of: - "st,lsm6ds3" - "st,lsm6ds3h" - "st,lsm6dsl" - "st,lsm6dsm" - "st,ism330dlc" - "st,lsm6dso" - "st,asm330lhh" - "st,lsm6dsox" - "st,lsm6dsr" - "st,lsm6ds3tr-c" - "st,ism330dhcx" - "st,lsm9ds1-imu" - "st,lsm6ds0" - "st,lsm6dsrx" -- reg: i2c address of the sensor / spi cs line - -Optional properties: -- st,drdy-int-pin: the pin on the package that will be used to signal - "data ready" (valid values: 1 or 2). -- st,pullups : enable/disable internal i2c controller pullup resistors. -- drive-open-drain: the interrupt/data ready line will be configured - as open drain, which is useful if several sensors share the same - interrupt line. This is a boolean property. - (This binding is taken from pinctrl/pinctrl-bindings.txt) - If the requested interrupt is configured as IRQ_TYPE_LEVEL_HIGH or - IRQ_TYPE_EDGE_RISING a pull-down resistor is needed to drive the line - when it is not active, whereas a pull-up one is needed when interrupt - line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. -- interrupts: interrupt mapping for IRQ. It should be configured with - flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or - IRQ_TYPE_EDGE_FALLING. -- wakeup-source: Enables wake up of host system on event. - - Refer to interrupt-controller/interrupts.txt for generic interrupt - client node bindings. - -Example: - -lsm6dsm@6b { - compatible = "st,lsm6dsm"; - reg = <0x6b>; - interrupt-parent = <&gpio0>; - interrupts = <0 IRQ_TYPE_EDGE_RISING>; -}; diff --git a/dts/Bindings/iio/light/apds9300.txt b/dts/Bindings/iio/light/apds9300.txt deleted file mode 100644 index 3aa6db3ee9..0000000000 --- a/dts/Bindings/iio/light/apds9300.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Avago APDS9300 ambient light sensor - -https://www.avagotech.com/docs/AV02-1077EN - -Required properties: - - - compatible : should be "avago,apds9300" - - reg : the I2C address of the sensor - -Optional properties: - - - interrupts : interrupt mapping for GPIO IRQ - -Example: - -apds9300@39 { - compatible = "avago,apds9300"; - reg = <0x39>; - interrupt-parent = <&gpio2>; - interrupts = <29 8>; -}; diff --git a/dts/Bindings/iio/light/apds9960.txt b/dts/Bindings/iio/light/apds9960.txt deleted file mode 100644 index c53ddb81c4..0000000000 --- a/dts/Bindings/iio/light/apds9960.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Avago APDS9960 gesture/RGB/ALS/proximity sensor - -https://www.avagotech.com/docs/AV02-4191EN - -Required properties: - - - compatible: must be "avago,apds9960" - - reg: the I2c address of the sensor - - interrupts : the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic interrupt client - node bindings. - -Example: - -apds9960@39 { - compatible = "avago,apds9960"; - reg = <0x39>; - interrupt-parent = <&gpio1>; - interrupts = <16 1>; -}; diff --git a/dts/Bindings/iio/light/avago,apds9300.yaml b/dts/Bindings/iio/light/avago,apds9300.yaml new file mode 100644 index 0000000000..206af44f2c --- /dev/null +++ b/dts/Bindings/iio/light/avago,apds9300.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/avago,apds9300.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Avago APDS9300 ambient light sensor + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Datasheet at https://www.avagotech.com/docs/AV02-1077EN + +properties: + compatible: + const: avago,apds9300 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@39 { + compatible = "avago,apds9300"; + reg = <0x39>; + interrupt-parent = <&gpio2>; + interrupts = <29 8>; + }; + }; +... diff --git a/dts/Bindings/iio/light/avago,apds9960.yaml b/dts/Bindings/iio/light/avago,apds9960.yaml new file mode 100644 index 0000000000..f06e0fda56 --- /dev/null +++ b/dts/Bindings/iio/light/avago,apds9960.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/avago,apds9960.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Avago APDS9960 gesture/RGB/ALS/proximity sensor + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +description: | + Datasheet at https://www.avagotech.com/docs/AV02-4191EN + +properties: + compatible: + const: avago,apds9960 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@39 { + compatible = "avago,apds9960"; + reg = <0x39>; + interrupt-parent = <&gpio1>; + interrupts = <16 1>; + }; + }; +... diff --git a/dts/Bindings/iio/light/capella,cm3605.yaml b/dts/Bindings/iio/light/capella,cm3605.yaml new file mode 100644 index 0000000000..27972938b6 --- /dev/null +++ b/dts/Bindings/iio/light/capella,cm3605.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/capella,cm3605.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Capella Microsystems CM3605 Ambient Light and Short Distance Proximity Sensor + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + - Kevin Tsai <ktsai@capellamicro.com> + +description: | + The CM3605 is an entirely analog part. However, it requires quite a bit of + software logic to interface a host operating system. + + This ALS and proximity sensor was one of the very first deployed in mobile + handsets, notably it is used in the very first Nexus One Android phone from + 2010. + +properties: + compatible: + const: capella,cm3605 + + aset-gpios: + maxItems: 1 + description: + ASET line (drive low to activate the ALS, should be flagged + GPIO_ACTIVE_LOW) + + interrupts: + maxItems: 1 + description: + Connected to the POUT (proximity sensor out) line. The edge + detection must be set to IRQ_TYPE_EDGE_BOTH so as to detect + movements toward and away from the proximity sensor. + + io-channels: + maxItems: 1 + description: + ADC channel used for converting the voltage from AOUT to a digital + representation. + + io-channel-names: + const: aout + + vdd-supply: true + + capella,aset-resistance-ohms: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [50000, 100000, 300000, 600000] + description: > + Sensitivity calibration resistance. Note that calibration curves + are only provided for specific allowed values. Default: 100 kOhms. + +required: + - compatible + - aset-gpios + - interrupts + - io-channels + - io-channel-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + light-sensor { + compatible = "capella,cm3605"; + vdd-supply = <&foo_reg>; + aset-gpios = <&foo_gpio 1 GPIO_ACTIVE_LOW>; + capella,aset-resistance-ohms = <100000>; + interrupts = <1 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&adc 0x01>; + io-channel-names = "aout"; + }; +... diff --git a/dts/Bindings/iio/light/capella,cm36651.yaml b/dts/Bindings/iio/light/capella,cm36651.yaml new file mode 100644 index 0000000000..446d94f3a8 --- /dev/null +++ b/dts/Bindings/iio/light/capella,cm36651.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/capella,cm36651.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Capella CM36651 I2C Proximity and Color Light sensor + +maintainers: + - Beomho Seo <beomho.seo@samsung.com> + +properties: + compatible: + const: capella,cm36651 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vled-supply: + description: | + Supply for the IR_LED which is part of the cm36651 for proximity detection. + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - vled-supply + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@18 { + compatible = "capella,cm36651"; + reg = <0x18>; + interrupt-parent = <&gpx0>; + interrupts = <2 0>; + vled-supply = <&ps_als_reg>; + }; + }; +... diff --git a/dts/Bindings/iio/light/cm3605.txt b/dts/Bindings/iio/light/cm3605.txt deleted file mode 100644 index 56331a79f9..0000000000 --- a/dts/Bindings/iio/light/cm3605.txt +++ /dev/null @@ -1,41 +0,0 @@ -Capella Microsystems CM3605 -Ambient Light and Short Distance Proximity Sensor - -The CM3605 is an entirely analog part which however require quite a bit of -software logic to interface a host operating system. - -This ALS and proximity sensor was one of the very first deployed in mobile -handsets, notably it is used in the very first Nexus One Android phone from -2010. - -Required properties: -- compatible: must be: "capella,cm3605" -- aset-gpios: GPIO line controlling the ASET line (drive low - to activate the ALS, should be flagged GPIO_ACTIVE_LOW) -- interrupts: the IRQ line (such as a GPIO) that is connected to - the POUT (proximity sensor out) line. The edge detection must - be set to IRQ_TYPE_EDGE_BOTH so as to detect movements toward - and away from the proximity sensor. -- io-channels: the ADC channel used for converting the voltage from - AOUT to a digital representation. -- io-channel-names: must be "aout" - -Optional properties: -- vdd-supply: regulator supplying VDD power to the component. -- capella,aset-resistance-ohms: the sensitivity calibration resistance, - in Ohms. Valid values are: 50000, 100000, 300000 and 600000, - as these are the resistance values that we are supplied with - calibration curves for. If not supplied, 100 kOhm will be assumed - but it is strongly recommended to supply this. - -Example: - -cm3605 { - compatible = "capella,cm3605"; - vdd-supply = <&foo_reg>; - aset-gpios = <&foo_gpio 1 GPIO_ACTIVE_LOW>; - capella,aset-resistance-ohms = <100000>; - interrupts = <1 IRQ_TYPE_EDGE_BOTH>; - io-channels = <&adc 0x01>; - io-channel-names = "aout"; -}; diff --git a/dts/Bindings/iio/light/cm36651.txt b/dts/Bindings/iio/light/cm36651.txt deleted file mode 100644 index c03e19db45..0000000000 --- a/dts/Bindings/iio/light/cm36651.txt +++ /dev/null @@ -1,26 +0,0 @@ -* Capella CM36651 I2C Proximity and Color Light sensor - -Required properties: -- compatible: must be "capella,cm36651" -- reg: the I2C address of the device -- interrupts: interrupt-specifier for the sole interrupt - generated by the device -- vled-supply: regulator for the IR LED. IR_LED is a part - of the cm36651 for proximity detection. - As covered in ../../regulator/regulator.txt - -Example: - - i2c_cm36651: i2c-gpio { - /* ... */ - - cm36651@18 { - compatible = "capella,cm36651"; - reg = <0x18>; - interrupt-parent = <&gpx0>; - interrupts = <2 0>; - vled-supply = <&ps_als_reg>; - }; - - /* ... */ - }; diff --git a/dts/Bindings/iio/light/gp2ap020a00f.txt b/dts/Bindings/iio/light/gp2ap020a00f.txt deleted file mode 100644 index 9231c82317..0000000000 --- a/dts/Bindings/iio/light/gp2ap020a00f.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Sharp GP2AP020A00F I2C Proximity/ALS sensor - -The proximity detector sensor requires power supply -for its built-in led. It is also defined by this binding. - -Required properties: - - - compatible : should be "sharp,gp2ap020a00f" - - reg : the I2C slave address of the light sensor - - interrupts : interrupt specifier for the sole interrupt generated - by the device - - vled-supply : VLED power supply, as covered in ../regulator/regulator.txt - -Example: - -gp2ap020a00f@39 { - compatible = "sharp,gp2ap020a00f"; - reg = <0x39>; - interrupts = <2 0>; - vled-supply = <...>; -}; diff --git a/dts/Bindings/iio/light/max44009.txt b/dts/Bindings/iio/light/max44009.txt deleted file mode 100644 index 4a98848e35..0000000000 --- a/dts/Bindings/iio/light/max44009.txt +++ /dev/null @@ -1,24 +0,0 @@ -* MAX44009 Ambient Light Sensor - -Required properties: - -- compatible: should be "maxim,max44009" -- reg: the I2C address of the device (default is <0x4a>) - -Optional properties: - -- interrupts: interrupt mapping for GPIO IRQ. Should be configured with - IRQ_TYPE_EDGE_FALLING. - -Refer to interrupt-controller/interrupts.txt for generic interrupt client -node bindings. - -Example: - -light-sensor@4a { - compatible = "maxim,max44009"; - reg = <0x4a>; - - interrupt-parent = <&gpio1>; - interrupts = <17 IRQ_TYPE_EDGE_FALLING>; -}; diff --git a/dts/Bindings/iio/light/maxim,max44009.yaml b/dts/Bindings/iio/light/maxim,max44009.yaml new file mode 100644 index 0000000000..5911bd93bc --- /dev/null +++ b/dts/Bindings/iio/light/maxim,max44009.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/maxim,max44009.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MAX44009 Ambient Light Sensor + +maintainers: + - Robert Eshleman <bobbyeshleman@gmail.com> + +properties: + compatible: + const: maxim,max44009 + + reg: + maxItems: 1 + description: Default address is 0x4a + + interrupts: + maxItems: 1 + description: Should be configured with type IRQ_TYPE_EDGE_FALLING + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@4a { + compatible = "maxim,max44009"; + reg = <0x4a>; + + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_EDGE_FALLING>; + }; + }; +... diff --git a/dts/Bindings/iio/light/opt3001.txt b/dts/Bindings/iio/light/opt3001.txt deleted file mode 100644 index 9e6f2998e7..0000000000 --- a/dts/Bindings/iio/light/opt3001.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Texas Instruments OPT3001 Ambient Light Sensor - -The driver supports interrupt-driven and interrupt-less operation, depending -on whether an interrupt property has been populated into the DT. Note that -the optional generation of IIO events on rising/falling light threshold changes -requires the use of interrupts. Without interrupts, only the simple reading -of the current light value is supported through the IIO API. - -https://www.ti.com/product/opt3001 - -Required properties: - - compatible: should be "ti,opt3001" - - reg: the I2C address of the sensor - -Optional properties: - - interrupts: interrupt mapping for GPIO IRQ (configure for falling edge) - -Example: - -opt3001@44 { - compatible = "ti,opt3001"; - reg = <0x44>; - interrupt-parent = <&gpio1>; - interrupts = <28 IRQ_TYPE_EDGE_FALLING>; -}; diff --git a/dts/Bindings/iio/light/renesas,isl29501.txt b/dts/Bindings/iio/light/renesas,isl29501.txt deleted file mode 100644 index 46957997fe..0000000000 --- a/dts/Bindings/iio/light/renesas,isl29501.txt +++ /dev/null @@ -1,13 +0,0 @@ -* ISL29501 Time-of-flight sensor. - -Required properties: - - - compatible : should be "renesas,isl29501" - - reg : the I2C address of the sensor - -Example: - -isl29501@57 { - compatible = "renesas,isl29501"; - reg = <0x57>; -}; diff --git a/dts/Bindings/iio/light/sharp,gp2ap020a00f.yaml b/dts/Bindings/iio/light/sharp,gp2ap020a00f.yaml new file mode 100644 index 0000000000..3fabf1f576 --- /dev/null +++ b/dts/Bindings/iio/light/sharp,gp2ap020a00f.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/sharp,gp2ap020a00f.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sharp GP2AP020A00F I2C Proximity/ALS sensor + +maintainers: + - Kyungmin Park <kyungmin.park@samsung.com> + +description: | + The proximity detector sensor requires power supply for its built-in led. + +properties: + compatible: + const: sharp,gp2ap020a00f + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vled-supply: true + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - vled-supply + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@39 { + compatible = "sharp,gp2ap020a00f"; + reg = <0x39>; + interrupts = <2 0>; + vled-supply = <&als_reg>; + }; + }; +... diff --git a/dts/Bindings/iio/light/st,uvis25.yaml b/dts/Bindings/iio/light/st,uvis25.yaml new file mode 100644 index 0000000000..c86e5e1d13 --- /dev/null +++ b/dts/Bindings/iio/light/st,uvis25.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/st,uvis25.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ST UVIS25 uv sensor + +maintainers: + - Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> + +properties: + compatible: + const: st,uvis25 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + uv-sensor@47 { + compatible = "st,uvis25"; + reg = <0x47>; + interrupt-parent = <&gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/dts/Bindings/iio/light/st,vl6180.yaml b/dts/Bindings/iio/light/st,vl6180.yaml new file mode 100644 index 0000000000..27c36ab799 --- /dev/null +++ b/dts/Bindings/iio/light/st,vl6180.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/st,vl6180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicro VL6180 ALS, range and proximity sensor + +maintainers: + - Manivannan Sadhasivam <manivannanece23@gmail.com> + - Peter Meerwald-Stadler <pmeerw@pmeerw.net> + +description: | + Proximity sensing module incorporating time of flight sensor + Datasheet at https://www.st.com/resource/en/datasheet/vl6180x.pdf + +properties: + compatible: + const: st,vl6180 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + proximity@29 { + compatible = "st,vl6180"; + reg = <0x29>; + }; + }; +... diff --git a/dts/Bindings/iio/light/ti,opt3001.yaml b/dts/Bindings/iio/light/ti,opt3001.yaml new file mode 100644 index 0000000000..441e9343fc --- /dev/null +++ b/dts/Bindings/iio/light/ti,opt3001.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/ti,opt3001.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments OPT3001 Ambient Light Sensor + +maintainers: + - Andreas Dannenberg <dannenberg@ti.com> + +description: | + The device supports interrupt-driven and interrupt-less operation, depending + on whether an interrupt property has been populated into the DT. + +properties: + compatible: + const: ti,opt3001 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Should be configured with type IRQ_TYPE_EDGE_FALLING + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@44 { + compatible = "ti,opt3001"; + reg = <0x44>; + interrupt-parent = <&gpio1>; + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; + }; + }; +... diff --git a/dts/Bindings/iio/light/upisemi,us5182.yaml b/dts/Bindings/iio/light/upisemi,us5182.yaml new file mode 100644 index 0000000000..de5882cb33 --- /dev/null +++ b/dts/Bindings/iio/light/upisemi,us5182.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/upisemi,us5182.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UPISEMI us5182d I2C ALS and Proximity sensor + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +properties: + compatible: + const: upisemi,asd5182 + + reg: + maxItems: 1 + + upsemi,glass-coef: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + glass attenuation factor - compensation factor of resolution 1000 + for material transmittance. + default: 1000 + + upisemi,dark-ths: + $ref: /schemas/types.yaml#/definitions/uint16-array + minItems: 8 + maxItems: 8 + description: + 16-bit thresholds (adc counts) corresponding to every scale. + + upisemi,upper-dark-gain: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + 8-bit dark gain compensation factor(4 int and 4 fractional bits - Q4.4) + applied when light > threshold. + default: 0 + + upisemi,lower-dark-gain: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + 8-bit dark gain compensation factor(4 int and 4 fractional bits - Q4.4) + applied when light < threshold. + default: 0x16 + + upisemi,continuous: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This chip has two power modes: one-shot (chip takes one measurement and + then shuts itself down) and continuous (chip takes continuous + measurements). The one-shot mode is more power-friendly but the + continuous mode may be more reliable. If this property is specified + the continuous mode will be used instead of the default one-shot one for + raw reads. + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@39 { + compatible = "upisemi,usd5182"; + reg = <0x39>; + upisemi,glass-coef = < 1000 >; + upisemi,dark-ths = /bits/ 16 <170 200 512 512 800 2000 4000 8000>; + upisemi,upper-dark-gain = /bits/ 8 <0x00>; + upisemi,lower-dark-gain = /bits/ 8 <0x16>; + }; + }; +... diff --git a/dts/Bindings/iio/light/us5182d.txt b/dts/Bindings/iio/light/us5182d.txt deleted file mode 100644 index a61979997f..0000000000 --- a/dts/Bindings/iio/light/us5182d.txt +++ /dev/null @@ -1,45 +0,0 @@ -* UPISEMI us5182d I2C ALS and Proximity sensor - -Required properties: -- compatible: must be "upisemi,usd5182" -- reg: the I2C address of the device - -Optional properties: -- upisemi,glass-coef: glass attenuation factor - compensation factor of - resolution 1000 for material transmittance. - -- upisemi,dark-ths: array of 8 elements containing 16-bit thresholds (adc - counts) corresponding to every scale. - -- upisemi,upper-dark-gain: 8-bit dark gain compensation factor(4 int and 4 - fractional bits - Q4.4) applied when light > threshold - -- upisemi,lower-dark-gain: 8-bit dark gain compensation factor(4 int and 4 - fractional bits - Q4.4) applied when light < threshold - -- upisemi,continuous: This chip has two power modes: one-shot (chip takes one - measurement and then shuts itself down) and continuous ( - chip takes continuous measurements). The one-shot mode is - more power-friendly but the continuous mode may be more - reliable. If this property is specified the continuous - mode will be used instead of the default one-shot one for - raw reads. - -If the optional properties are not specified these factors will default to the -values in the below example. -The glass-coef defaults to no compensation for the covering material. -The threshold array defaults to experimental values that work with US5182D -sensor on evaluation board - roughly between 12-32 lux. -There will be no dark-gain compensation by default when ALS > thresh -(0 * dark-gain), and a 1.35 compensation factor when ALS < thresh. - -Example: - - usd5182@39 { - compatible = "upisemi,usd5182"; - reg = <0x39>; - upisemi,glass-coef = < 1000 >; - upisemi,dark-ths = /bits/ 16 <170 200 512 512 800 2000 4000 8000>; - upisemi,upper-dark-gain = /bits/ 8 <0x00>; - upisemi,lower-dark-gain = /bits/ 8 <0x16>; - }; diff --git a/dts/Bindings/iio/light/uvis25.txt b/dts/Bindings/iio/light/uvis25.txt deleted file mode 100644 index 043c139d91..0000000000 --- a/dts/Bindings/iio/light/uvis25.txt +++ /dev/null @@ -1,22 +0,0 @@ -* ST UVIS25 uv sensor - -Required properties: -- compatible: should be "st,uvis25" -- reg: i2c address of the sensor / spi cs line - -Optional properties: -- interrupts: interrupt mapping for IRQ. It should be configured with - flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or - IRQ_TYPE_EDGE_FALLING. - - Refer to interrupt-controller/interrupts.txt for generic interrupt - client node bindings. - -Example: - -uvis25@47 { - compatible = "st,uvis25"; - reg = <0x47>; - interrupt-parent = <&gpio0>; - interrupts = <0 IRQ_TYPE_EDGE_RISING>; -}; diff --git a/dts/Bindings/iio/light/vcnl4035.txt b/dts/Bindings/iio/light/vcnl4035.txt deleted file mode 100644 index c07c7f0525..0000000000 --- a/dts/Bindings/iio/light/vcnl4035.txt +++ /dev/null @@ -1,18 +0,0 @@ -VISHAY VCNL4035 - Ambient Light and proximity sensor - -Link to datasheet: https://www.vishay.com/docs/84251/vcnl4035x01.pdf - -Required properties: - - -compatible: should be "vishay,vcnl4035" - -reg: I2C address of the sensor, should be 0x60 - -interrupts: interrupt mapping for GPIO IRQ (level active low) - -Example: - -light-sensor@60 { - compatible = "vishay,vcnl4035"; - reg = <0x60>; - interrupt-parent = <&gpio4>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; -}; diff --git a/dts/Bindings/iio/light/vishay,vcnl4035.yaml b/dts/Bindings/iio/light/vishay,vcnl4035.yaml new file mode 100644 index 0000000000..2c57ff05de --- /dev/null +++ b/dts/Bindings/iio/light/vishay,vcnl4035.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/vishay,vcnl4035.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VISHAY VCNL4035 ambient Light and proximity sensor + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Datasheet at https://www.vishay.com/docs/84251/vcnl4035x01.pdf + +properties: + compatible: + const: vishay,vcnl4035 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@60 { + compatible = "vishay,vcnl4035"; + reg = <0x60>; + interrupt-parent = <&gpio4>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/light/vl6180.txt b/dts/Bindings/iio/light/vl6180.txt deleted file mode 100644 index fb9137d85d..0000000000 --- a/dts/Bindings/iio/light/vl6180.txt +++ /dev/null @@ -1,15 +0,0 @@ -STMicro VL6180 - ALS, range and proximity sensor - -Link to datasheet: https://www.st.com/resource/en/datasheet/vl6180x.pdf - -Required properties: - - -compatible: should be "st,vl6180" - -reg: the I2C address of the sensor - -Example: - -vl6180@29 { - compatible = "st,vl6180"; - reg = <0x29>; -}; diff --git a/dts/Bindings/iio/magnetometer/ak8974.txt b/dts/Bindings/iio/magnetometer/ak8974.txt deleted file mode 100644 index 7f06eff3b5..0000000000 --- a/dts/Bindings/iio/magnetometer/ak8974.txt +++ /dev/null @@ -1,31 +0,0 @@ -* Asahi Kasei AK8974 magnetometer sensor - -Required properties: - -- compatible: - * "asahi-kasei,ak8974" - * "alps,hscdtd008a" -- reg : the I2C address of the magnetometer - -Optional properties: - -- avdd-supply: regulator supply for the analog voltage - (see regulator/regulator.txt) -- dvdd-supply: regulator supply for the digital voltage - (see regulator/regulator.txt) -- interrupts: data ready (DRDY) and interrupt (INT1) lines - from the chip, the DRDY interrupt must be placed first. - The interrupts can be triggered on rising or falling - edges alike. -- mount-matrix: an optional 3x3 mounting rotation matrix - -Example: - -ak8974@f { - compatible = "asahi-kasei,ak8974"; - reg = <0x0f>; - avdd-supply = <&foo_reg>; - dvdd-supply = <&bar_reg>; - interrupts = <0 IRQ_TYPE_EDGE_RISING>, - <1 IRQ_TYPE_EDGE_RISING>; -}; diff --git a/dts/Bindings/iio/magnetometer/asahi-kasei,ak8974.yaml b/dts/Bindings/iio/magnetometer/asahi-kasei,ak8974.yaml new file mode 100644 index 0000000000..cefb70def1 --- /dev/null +++ b/dts/Bindings/iio/magnetometer/asahi-kasei,ak8974.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8974.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Asahi Kasei AK8974 magnetometer sensor + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +properties: + compatible: + enum: + - alps,hscdtd008a + - asahi-kasei,ak8974 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + description: | + Data ready (DRDY) and interrupt (INT1) lines from the chip. The DRDY + interrupt must be placed first. The interrupts can be triggered on + rising or falling edges. + + avdd-supply: true + + dvdd-supply: true + + mount-matrix: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + magnetometer@f { + compatible = "asahi-kasei,ak8974"; + reg = <0x0f>; + avdd-supply = <&foo_reg>; + dvdd-supply = <&bar_reg>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>, + <1 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/dts/Bindings/iio/magnetometer/bmc150_magn.txt b/dts/Bindings/iio/magnetometer/bmc150_magn.txt deleted file mode 100644 index 22912e43b6..0000000000 --- a/dts/Bindings/iio/magnetometer/bmc150_magn.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Bosch BMC150 magnetometer sensor - -http://ae-bst.resource.bosch.com/media/products/dokumente/bmc150/BST-BMC150-DS000-04.pdf - -Required properties: - - - compatible : should be one of: - "bosch,bmc150_magn" - "bosch,bmc156_magn" - "bosch,bmm150" - "bosch,bmm150_magn" (DEPRECATED, use bosch,bmm150) - - reg : the I2C address of the magnetometer - -Optional properties: - - - interrupts : interrupt mapping for GPIO IRQ - -Example: - -bmc150_magn@12 { - compatible = "bosch,bmc150_magn"; - reg = <0x12>; - interrupt-parent = <&gpio1>; - interrupts = <0 1>; -}; diff --git a/dts/Bindings/iio/magnetometer/bosch,bmc150_magn.yaml b/dts/Bindings/iio/magnetometer/bosch,bmc150_magn.yaml new file mode 100644 index 0000000000..cdef7aeba7 --- /dev/null +++ b/dts/Bindings/iio/magnetometer/bosch,bmc150_magn.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/magnetometer/bosch,bmc150_magn.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bosch BMC150 magnetometer sensor + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Supports a range of parts, some of which form part of a multi die + package that also contains other sensors. The interface is independent + however, so a separate driver is used to support the magnetometer part. + Datasheet at: + http://ae-bst.resource.bosch.com/media/products/dokumente/bmc150/BST-BMC150-DS000-04.pdf + +properties: + compatible: + description: + Note the bmm150_magn is a deprecated compatible as this part contains only + a magnetometer. + enum: + - bosch,bmc150_magn + - bosch,bmc156_magn + - bosch,bmm150 + - bosch,bmm150_magn + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + magnetometer@12 { + compatible = "bosch,bmc150_magn"; + reg = <0x12>; + interrupt-parent = <&gpio1>; + interrupts = <0 1>; + }; + }; +... diff --git a/dts/Bindings/iio/magnetometer/fsl,mag3110.yaml b/dts/Bindings/iio/magnetometer/fsl,mag3110.yaml new file mode 100644 index 0000000000..6b54d32323 --- /dev/null +++ b/dts/Bindings/iio/magnetometer/fsl,mag3110.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/magnetometer/fsl,mag3110.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MAG3110 magnetometer sensor + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +properties: + compatible: + const: fsl,mag3110 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vdd-supply: true + + vddio-supply: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + magnetometer@e { + compatible = "fsl,mag3110"; + reg = <0x0e>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_mag3110_int>; + interrupt-parent = <&gpio3>; + interrupts = <16 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/dts/Bindings/iio/magnetometer/hmc5843.txt b/dts/Bindings/iio/magnetometer/hmc5843.txt deleted file mode 100644 index 8e191eef01..0000000000 --- a/dts/Bindings/iio/magnetometer/hmc5843.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Honeywell HMC5843 magnetometer sensor - -Required properties: - - - compatible : should be "honeywell,hmc5843" - Other models which are supported with driver are: - "honeywell,hmc5883" - "honeywell,hmc5883l" - "honeywell,hmc5983" - - reg : the I2C address of the magnetometer - typically 0x1e - -Optional properties: - - - gpios : should be device tree identifier of the magnetometer DRDY pin - -Example: - -hmc5843@1e { - compatible = "honeywell,hmc5843" - reg = <0x1e>; -}; diff --git a/dts/Bindings/iio/magnetometer/honeywell,hmc5843.yaml b/dts/Bindings/iio/magnetometer/honeywell,hmc5843.yaml new file mode 100644 index 0000000000..5e778c9858 --- /dev/null +++ b/dts/Bindings/iio/magnetometer/honeywell,hmc5843.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/magnetometer/honeywell,hmc5843.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Honeywell HMC5843 magnetometer sensor + +maintainers: + - Neil Brown <neilb@suse.de> + +properties: + compatible: + enum: + - honeywell,hmc5843 + - honeywell,hmc5883 + - honeywell,hmc5883l + - honeywell,hmc5983 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + magnetometer@1e { + compatible = "honeywell,hmc5843"; + reg = <0x1e>; + }; + }; +... diff --git a/dts/Bindings/iio/magnetometer/mag3110.txt b/dts/Bindings/iio/magnetometer/mag3110.txt deleted file mode 100644 index bdd40bcaaa..0000000000 --- a/dts/Bindings/iio/magnetometer/mag3110.txt +++ /dev/null @@ -1,27 +0,0 @@ -* FREESCALE MAG3110 magnetometer sensor - -Required properties: - - - compatible : should be "fsl,mag3110" - - reg : the I2C address of the magnetometer - -Optional properties: - - - interrupts: the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic interrupt client - node bindings. - - - vdd-supply: phandle to the regulator that provides power to the sensor. - - vddio-supply: phandle to the regulator that provides power to the sensor's IO. - -Example: - -magnetometer@e { - compatible = "fsl,mag3110"; - reg = <0x0e>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_mag3110_int>; - interrupt-parent = <&gpio3>; - interrupts = <16 IRQ_TYPE_EDGE_RISING>; -}; diff --git a/dts/Bindings/iio/magnetometer/mmc35240.txt b/dts/Bindings/iio/magnetometer/mmc35240.txt deleted file mode 100644 index a01235c7fa..0000000000 --- a/dts/Bindings/iio/magnetometer/mmc35240.txt +++ /dev/null @@ -1,13 +0,0 @@ -* MEMSIC MMC35240 magnetometer sensor - -Required properties: - - - compatible : should be "memsic,mmc35240" - - reg : the I2C address of the magnetometer - -Example: - -mmc35240@30 { - compatible = "memsic,mmc35240"; - reg = <0x30>; -}; diff --git a/dts/Bindings/iio/magnetometer/pni,rm3100.txt b/dts/Bindings/iio/magnetometer/pni,rm3100.txt deleted file mode 100644 index 497c932e9e..0000000000 --- a/dts/Bindings/iio/magnetometer/pni,rm3100.txt +++ /dev/null @@ -1,20 +0,0 @@ -* PNI RM3100 3-axis magnetometer sensor - -Required properties: - -- compatible : should be "pni,rm3100" -- reg : the I2C address or SPI chip select number of the sensor. - -Optional properties: - -- interrupts: data ready (DRDY) from the chip. - The interrupts can be triggered on level high. - -Example: - -rm3100: rm3100@20 { - compatible = "pni,rm3100"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; -}; diff --git a/dts/Bindings/iio/magnetometer/pni,rm3100.yaml b/dts/Bindings/iio/magnetometer/pni,rm3100.yaml new file mode 100644 index 0000000000..a845cdd23e --- /dev/null +++ b/dts/Bindings/iio/magnetometer/pni,rm3100.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/magnetometer/pni,rm3100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PNI RM3100 3-axis magnetometer sensor + +maintainers: + - Song Qiang <songqiang1304521@gmail.com> + +properties: + compatible: + const: pni,rm3100 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + magnetometer@20 { + compatible = "pni,rm3100"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... diff --git a/dts/Bindings/iio/potentiometer/ad5272.txt b/dts/Bindings/iio/potentiometer/ad5272.txt deleted file mode 100644 index f9b2eef946..0000000000 --- a/dts/Bindings/iio/potentiometer/ad5272.txt +++ /dev/null @@ -1,27 +0,0 @@ -* Analog Devices AD5272 digital potentiometer - -The node for this device must be a child node of a I2C controller, hence -all mandatory properties for your controller must be specified. See directory: - - Documentation/devicetree/bindings/i2c - -for more details. - -Required properties: - - compatible: Must be one of the following, depending on the model: - adi,ad5272-020 - adi,ad5272-050 - adi,ad5272-100 - adi,ad5274-020 - adi,ad5274-100 - -Optional properties: - - reset-gpios: GPIO specification for the RESET input. This is an - active low signal to the AD5272. - -Example: -ad5272: potentiometer@2f { - reg = <0x2F>; - compatible = "adi,ad5272-020"; - reset-gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>; -}; diff --git a/dts/Bindings/iio/potentiometer/adi,ad5272.yaml b/dts/Bindings/iio/potentiometer/adi,ad5272.yaml new file mode 100644 index 0000000000..1aee9f9be9 --- /dev/null +++ b/dts/Bindings/iio/potentiometer/adi,ad5272.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/potentiometer/adi,ad5272.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5272 digital potentiometer + +maintainers: + - Phil Reid <preid@electromag.com.au> + +description: | + Datasheet: https://www.analog.com/en/products/ad5272.html + +properties: + compatible: + enum: + - adi,ad5272-020 + - adi,ad5272-050 + - adi,ad5272-100 + - adi,ad5274-020 + - adi,ad5274-100 + + reg: + maxItems: 1 + + reset-gpios: + description: + Active low signal to the AD5272 RESET input. + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + potentiometer@2f { + compatible = "adi,ad5272-020"; + reg = <0x2F>; + reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/potentiometer/ds1803.txt b/dts/Bindings/iio/potentiometer/ds1803.txt deleted file mode 100644 index df77bf5526..0000000000 --- a/dts/Bindings/iio/potentiometer/ds1803.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Maxim Integrated DS1803 digital potentiometer driver - -The node for this driver must be a child node of a I2C controller, hence -all mandatory properties for your controller must be specified. See directory: - - Documentation/devicetree/bindings/i2c - -for more details. - -Required properties: - - compatible: Must be one of the following, depending on the - model: - "maxim,ds1803-010", - "maxim,ds1803-050", - "maxim,ds1803-100" - -Example: -ds1803: ds1803@1 { - reg = <0x28>; - compatible = "maxim,ds1803-010"; -}; diff --git a/dts/Bindings/iio/potentiometer/max5481.txt b/dts/Bindings/iio/potentiometer/max5481.txt deleted file mode 100644 index 6a91b106e0..0000000000 --- a/dts/Bindings/iio/potentiometer/max5481.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Maxim Linear-Taper Digital Potentiometer MAX5481-MAX5484 - -The node for this driver must be a child node of a SPI controller, hence -all mandatory properties described in - - Documentation/devicetree/bindings/spi/spi-bus.txt - -must be specified. - -Required properties: - - compatible: Must be one of the following, depending on the - model: - "maxim,max5481" - "maxim,max5482" - "maxim,max5483" - "maxim,max5484" - -Example: -max548x: max548x@0 { - compatible = "maxim,max5482"; - spi-max-frequency = <7000000>; - reg = <0>; /* chip-select */ -}; diff --git a/dts/Bindings/iio/potentiometer/mcp41010.txt b/dts/Bindings/iio/potentiometer/mcp41010.txt deleted file mode 100644 index 4f245e8469..0000000000 --- a/dts/Bindings/iio/potentiometer/mcp41010.txt +++ /dev/null @@ -1,28 +0,0 @@ -* Microchip MCP41010/41050/41100/42010/42050/42100 Digital Potentiometer - -Datasheet publicly available at: -https://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf - -The node for this driver must be a child node of a SPI controller, hence -all mandatory properties described in - - Documentation/devicetree/bindings/spi/spi-bus.txt - -must be specified. - -Required properties: - - compatible: Must be one of the following, depending on the - model: - "microchip,mcp41010" - "microchip,mcp41050" - "microchip,mcp41100" - "microchip,mcp42010" - "microchip,mcp42050" - "microchip,mcp42100" - -Example: -potentiometer@0 { - compatible = "microchip,mcp41010"; - reg = <0>; - spi-max-frequency = <500000>; -}; diff --git a/dts/Bindings/iio/potentiometer/mcp4131.txt b/dts/Bindings/iio/potentiometer/mcp4131.txt deleted file mode 100644 index 3ccba16f70..0000000000 --- a/dts/Bindings/iio/potentiometer/mcp4131.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X Digital Potentiometer - driver - -The node for this driver must be a child node of a SPI controller, hence -all mandatory properties described in - - Documentation/devicetree/bindings/spi/spi-bus.txt - -must be specified. - -Required properties: - - compatible: Must be one of the following, depending on the - model: - "microchip,mcp4131-502" - "microchip,mcp4131-103" - "microchip,mcp4131-503" - "microchip,mcp4131-104" - "microchip,mcp4132-502" - "microchip,mcp4132-103" - "microchip,mcp4132-503" - "microchip,mcp4132-104" - "microchip,mcp4141-502" - "microchip,mcp4141-103" - "microchip,mcp4141-503" - "microchip,mcp4141-104" - "microchip,mcp4142-502" - "microchip,mcp4142-103" - "microchip,mcp4142-503" - "microchip,mcp4142-104" - "microchip,mcp4151-502" - "microchip,mcp4151-103" - "microchip,mcp4151-503" - "microchip,mcp4151-104" - "microchip,mcp4152-502" - "microchip,mcp4152-103" - "microchip,mcp4152-503" - "microchip,mcp4152-104" - "microchip,mcp4161-502" - "microchip,mcp4161-103" - "microchip,mcp4161-503" - "microchip,mcp4161-104" - "microchip,mcp4162-502" - "microchip,mcp4162-103" - "microchip,mcp4162-503" - "microchip,mcp4162-104" - "microchip,mcp4231-502" - "microchip,mcp4231-103" - "microchip,mcp4231-503" - "microchip,mcp4231-104" - "microchip,mcp4232-502" - "microchip,mcp4232-103" - "microchip,mcp4232-503" - "microchip,mcp4232-104" - "microchip,mcp4241-502" - "microchip,mcp4241-103" - "microchip,mcp4241-503" - "microchip,mcp4241-104" - "microchip,mcp4242-502" - "microchip,mcp4242-103" - "microchip,mcp4242-503" - "microchip,mcp4242-104" - "microchip,mcp4251-502" - "microchip,mcp4251-103" - "microchip,mcp4251-503" - "microchip,mcp4251-104" - "microchip,mcp4252-502" - "microchip,mcp4252-103" - "microchip,mcp4252-503" - "microchip,mcp4252-104" - "microchip,mcp4261-502" - "microchip,mcp4261-103" - "microchip,mcp4261-503" - "microchip,mcp4261-104" - "microchip,mcp4262-502" - "microchip,mcp4262-103" - "microchip,mcp4262-503" - "microchip,mcp4262-104" - -Example: -mcp4131: mcp4131@0 { - compatible = "mcp4131-502"; - reg = <0>; - spi-max-frequency = <500000>; -}; diff --git a/dts/Bindings/iio/potentiometer/microchip,mcp41010.yaml b/dts/Bindings/iio/potentiometer/microchip,mcp41010.yaml new file mode 100644 index 0000000000..567697d996 --- /dev/null +++ b/dts/Bindings/iio/potentiometer/microchip,mcp41010.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/potentiometer/microchip,mcp41010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MCP41010/41050/41100/42010/42050/42100 Digital Potentiometer + +maintainers: + - Chris Coffey <cmc@babblebit.net> + +description: | + Datasheet: https://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf + +properties: + compatible: + enum: + - microchip,mcp41010 + - microchip,mcp41050 + - microchip,mcp41100 + - microchip,mcp42010 + - microchip,mcp42050 + - microchip,mcp42100 + + reg: + maxItems: 1 + + spi-max-frequency: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + potentiometer@0 { + compatible = "microchip,mcp41010"; + reg = <0>; + spi-max-frequency = <500000>; + }; + }; +... diff --git a/dts/Bindings/iio/potentiometer/microchip,mcp4131.yaml b/dts/Bindings/iio/potentiometer/microchip,mcp4131.yaml new file mode 100644 index 0000000000..945a2d644d --- /dev/null +++ b/dts/Bindings/iio/potentiometer/microchip,mcp4131.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/potentiometer/microchip,mcp4131.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X Digital Potentiometer + +maintainers: + - Slawomir Stepien <sst@poczta.fm> + +properties: + compatible: + enum: + - microchip,mcp4131-103 + - microchip,mcp4131-104 + - microchip,mcp4131-502 + - microchip,mcp4131-503 + - microchip,mcp4132-103 + - microchip,mcp4132-104 + - microchip,mcp4132-502 + - microchip,mcp4132-503 + - microchip,mcp4141-103 + - microchip,mcp4141-104 + - microchip,mcp4141-502 + - microchip,mcp4141-503 + - microchip,mcp4142-103 + - microchip,mcp4142-104 + - microchip,mcp4142-502 + - microchip,mcp4142-503 + - microchip,mcp4151-103 + - microchip,mcp4151-104 + - microchip,mcp4151-502 + - microchip,mcp4151-503 + - microchip,mcp4152-103 + - microchip,mcp4152-104 + - microchip,mcp4152-502 + - microchip,mcp4152-503 + - microchip,mcp4161-103 + - microchip,mcp4161-104 + - microchip,mcp4161-502 + - microchip,mcp4161-503 + - microchip,mcp4162-103 + - microchip,mcp4162-104 + - microchip,mcp4162-502 + - microchip,mcp4162-503 + - microchip,mcp4231-103 + - microchip,mcp4231-104 + - microchip,mcp4231-502 + - microchip,mcp4231-503 + - microchip,mcp4232-103 + - microchip,mcp4232-104 + - microchip,mcp4232-502 + - microchip,mcp4232-503 + - microchip,mcp4241-103 + - microchip,mcp4241-104 + - microchip,mcp4241-502 + - microchip,mcp4241-503 + - microchip,mcp4242-103 + - microchip,mcp4242-104 + - microchip,mcp4242-502 + - microchip,mcp4242-503 + - microchip,mcp4251-103 + - microchip,mcp4251-104 + - microchip,mcp4251-502 + - microchip,mcp4251-503 + - microchip,mcp4252-103 + - microchip,mcp4252-104 + - microchip,mcp4252-502 + - microchip,mcp4252-503 + - microchip,mcp4261-103 + - microchip,mcp4261-104 + - microchip,mcp4261-502 + - microchip,mcp4261-503 + - microchip,mcp4262-103 + - microchip,mcp4262-104 + - microchip,mcp4262-502 + - microchip,mcp4262-503 + + reg: + maxItems: 1 + + spi-max-frequency: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + potentiometer@0 { + compatible = "mcp4131-502"; + reg = <0>; + spi-max-frequency = <500000>; + }; + }; +... diff --git a/dts/Bindings/iio/potentiometer/microchip,mcp4531.yaml b/dts/Bindings/iio/potentiometer/microchip,mcp4531.yaml new file mode 100644 index 0000000000..5c4b9b9181 --- /dev/null +++ b/dts/Bindings/iio/potentiometer/microchip,mcp4531.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/potentiometer/microchip,mcp4531.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip mcp4531 and similar potentiometers. + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + Family of I2C digital potentiometer + Datasheets at: + * volatile https://ww1.microchip.com/downloads/en/DeviceDoc/22096b.pdf + * non-volatile https://ww1.microchip.com/downloads/en/DeviceDoc/22107B.pdf + Part numbers as follows: mcp4ABC-XXX where + A = 5 (1 wiper), 6 (2 wipers) + B = 3 (7-bit, volatile), 4 (7-bit, non-volatile), + 5 (8-bit, volatile), 6 (8-bit, non-volatile), + C: 1 (potentiometer), 2 (rheostat) + XXX = 502 (5 kOhms), 103 (10 kOhms), 503 (50 kOhms), 104 (100 kOhms) + +properties: + compatible: + enum: + # Ordering reflects part number + range, so 502 < 103 etc + - microchip,mcp4531-502 + - microchip,mcp4531-103 + - microchip,mcp4531-503 + - microchip,mcp4531-104 + - microchip,mcp4532-502 + - microchip,mcp4532-103 + - microchip,mcp4532-503 + - microchip,mcp4532-104 + - microchip,mcp4541-502 + - microchip,mcp4541-103 + - microchip,mcp4541-503 + - microchip,mcp4541-104 + - microchip,mcp4542-502 + - microchip,mcp4542-103 + - microchip,mcp4542-503 + - microchip,mcp4542-104 + - microchip,mcp4551-502 + - microchip,mcp4551-103 + - microchip,mcp4551-503 + - microchip,mcp4551-104 + - microchip,mcp4552-502 + - microchip,mcp4552-103 + - microchip,mcp4552-503 + - microchip,mcp4552-104 + - microchip,mcp4561-502 + - microchip,mcp4561-103 + - microchip,mcp4561-503 + - microchip,mcp4561-104 + - microchip,mcp4562-502 + - microchip,mcp4562-103 + - microchip,mcp4562-503 + - microchip,mcp4562-104 + - microchip,mcp4631-502 + - microchip,mcp4631-103 + - microchip,mcp4631-503 + - microchip,mcp4631-104 + - microchip,mcp4632-502 + - microchip,mcp4632-103 + - microchip,mcp4632-503 + - microchip,mcp4632-104 + - microchip,mcp4641-502 + - microchip,mcp4641-103 + - microchip,mcp4641-503 + - microchip,mcp4641-104 + - microchip,mcp4642-502 + - microchip,mcp4642-103 + - microchip,mcp4642-503 + - microchip,mcp4642-104 + - microchip,mcp4651-502 + - microchip,mcp4651-103 + - microchip,mcp4651-503 + - microchip,mcp4651-104 + - microchip,mcp4652-502 + - microchip,mcp4652-103 + - microchip,mcp4652-503 + - microchip,mcp4652-104 + - microchip,mcp4661-502 + - microchip,mcp4661-103 + - microchip,mcp4661-503 + - microchip,mcp4661-104 + - microchip,mcp4662-502 + - microchip,mcp4662-103 + - microchip,mcp4662-503 + - microchip,mcp4662-104 + + reg: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + dpot: dpot@28 { + compatible = "microchip,mcp4651-104"; + reg = <0x28>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/potentiostat/lmp91000.txt b/dts/Bindings/iio/potentiostat/lmp91000.txt deleted file mode 100644 index f3ab02b0dd..0000000000 --- a/dts/Bindings/iio/potentiostat/lmp91000.txt +++ /dev/null @@ -1,33 +0,0 @@ -* Texas Instruments LMP91000 series of potentiostats - -LMP91000: https://www.ti.com/lit/ds/symlink/lmp91000.pdf -LMP91002: https://www.ti.com/lit/ds/symlink/lmp91002.pdf - -Required properties: - - - compatible: should be one of the following: - "ti,lmp91000" - "ti,lmp91002" - - reg: the I2C address of the device - - io-channels: the phandle of the iio provider - - - ti,external-tia-resistor: if the property ti,tia-gain-ohm is not defined this - needs to be set to signal that an external resistor value is being used. - -Optional properties: - - - ti,tia-gain-ohm: ohm value of the internal resistor for the transimpedance - amplifier. Must be 2750, 3500, 7000, 14000, 35000, 120000, or 350000 ohms. - - - ti,rload-ohm: ohm value of the internal resistor load applied to the gas - sensor. Must be 10, 33, 50, or 100 (default) ohms. - -Example: - -lmp91000@48 { - compatible = "ti,lmp91000"; - reg = <0x48>; - ti,tia-gain-ohm = <7500>; - ti,rload = <100>; - io-channels = <&adc>; -}; diff --git a/dts/Bindings/iio/potentiostat/ti,lmp91000.yaml b/dts/Bindings/iio/potentiostat/ti,lmp91000.yaml new file mode 100644 index 0000000000..e4b5d890e8 --- /dev/null +++ b/dts/Bindings/iio/potentiostat/ti,lmp91000.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/potentiostat/ti,lmp91000.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments LMP91000 series of potentiostats with I2C control + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +description: | + Typically used as a signal conditioner for chemical sensors. + LMP91000: https://www.ti.com/lit/ds/symlink/lmp91000.pdf + LMP91002: https://www.ti.com/lit/ds/symlink/lmp91002.pdf + +properties: + compatible: + enum: + - ti,lmp91000 + - ti,lmp91002 + + reg: + maxItems: 1 + + io-channels: + maxItems: 1 + + ti,external-tia-resistor: + $ref: /schemas/types.yaml#/definitions/flag + description: + If the property ti,tia-gain-ohm is not defined this needs to be set to + signal that an external resistor value is being used. + + ti,tia-gain-ohm: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [2750, 3500, 7000, 14000, 35000, 120000, 350000] + description: + Internal resistor for the transimpedance amplifier. + + ti,rload-ohm: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [10, 33, 50, 100] + description: + Internal resistor load applied to the gas sensor. + Default 100 Ohms. + +required: + - compatible + - reg + - io-channels + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + lmp91000@48 { + compatible = "ti,lmp91000"; + reg = <0x48>; + ti,tia-gain-ohm = <7000>; + ti,rload-ohm = <100>; + io-channels = <&adc>; + }; + }; +... diff --git a/dts/Bindings/iio/pressure/hoperf,hp03.yaml b/dts/Bindings/iio/pressure/hoperf,hp03.yaml new file mode 100644 index 0000000000..69a3759e23 --- /dev/null +++ b/dts/Bindings/iio/pressure/hoperf,hp03.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/pressure/hoperf,hp03.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HopeRF HP03 digital pressure/temperature sensors + +maintainers: + - Marek Vasut <marex@denx.de> + +description: | + Digital pressure and temperature sensor with an I2C interface. + +properties: + compatible: + const: hoperf,hp03 + + reg: + maxItems: 1 + + xclr-gpios: + description: + The XCLR pin is a reset of the ADC in the chip, it must be pulled + HI before the conversion and readout of the value from the ADC + registers and pulled LO afterward. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pressure@77 { + compatible = "hoperf,hp03"; + reg = <0x77>; + xclr-gpios = <&portc 0 0x0>; + }; + }; +... diff --git a/dts/Bindings/iio/pressure/hp03.txt b/dts/Bindings/iio/pressure/hp03.txt deleted file mode 100644 index 831dbee7a5..0000000000 --- a/dts/Bindings/iio/pressure/hp03.txt +++ /dev/null @@ -1,17 +0,0 @@ -HopeRF HP03 digital pressure/temperature sensors - -Required properties: -- compatible: must be "hoperf,hp03" -- xclr-gpio: must be device tree identifier of the XCLR pin. - The XCLR pin is a reset of the ADC in the chip, - it must be pulled HI before the conversion and - readout of the value from the ADC registers and - pulled LO afterward. - -Example: - -hp03@77 { - compatible = "hoperf,hp03"; - reg = <0x77>; - xclr-gpio = <&portc 0 0x0>; -}; diff --git a/dts/Bindings/iio/pressure/meas,ms5611.yaml b/dts/Bindings/iio/pressure/meas,ms5611.yaml new file mode 100644 index 0000000000..4f06707450 --- /dev/null +++ b/dts/Bindings/iio/pressure/meas,ms5611.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/pressure/meas,ms5611.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Measurement Specialities ms5611 and similar pressure sensors + +maintainers: + - Tomasz Duszynski <tduszyns@gmail.com> + +description: | + Pressure sensors from MEAS Switzerland with SPI and I2C bus interfaces. + +properties: + compatible: + enum: + - meas,ms5607 + - meas,ms5611 + + reg: + maxItems: 1 + + vdd-supply: true + + spi-max-frequency: + maximum: 20000000 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pressure@77 { + compatible = "meas,ms5607"; + reg = <0x77>; + vdd-supply = <&ldo_3v3_gnss>; + }; + }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + pressure@0 { + compatible = "meas,ms5611"; + reg = <0>; + vdd-supply = <&ldo_3v3_gnss>; + }; + }; +... diff --git a/dts/Bindings/iio/pressure/ms5611.txt b/dts/Bindings/iio/pressure/ms5611.txt deleted file mode 100644 index 17bca866c0..0000000000 --- a/dts/Bindings/iio/pressure/ms5611.txt +++ /dev/null @@ -1,19 +0,0 @@ -MEAS ms5611 family pressure sensors - -Pressure sensors from MEAS Switzerland with SPI and I2C bus interfaces. - -Required properties: -- compatible: "meas,ms5611" or "meas,ms5607" -- reg: the I2C address or SPI chip select the device will respond to - -Optional properties: -- vdd-supply: an optional regulator that needs to be on to provide VDD - power to the sensor. - -Example: - -ms5607@77 { - compatible = "meas,ms5607"; - reg = <0x77>; - vdd-supply = <&ldo_3v3_gnss>; -}; diff --git a/dts/Bindings/iio/pressure/ms5637.txt b/dts/Bindings/iio/pressure/ms5637.txt deleted file mode 100644 index 1f43ffa068..0000000000 --- a/dts/Bindings/iio/pressure/ms5637.txt +++ /dev/null @@ -1,17 +0,0 @@ -* MS5637 - Measurement-Specialties MS5637, MS5805, MS5837 and MS8607 pressure & temperature sensor - -Required properties: - - -compatible: should be one of the following - meas,ms5637 - meas,ms5805 - meas,ms5837 - meas,ms8607-temppressure - -reg: I2C address of the sensor - -Example: - -ms5637@76 { - compatible = "meas,ms5637"; - reg = <0x76>; -}; diff --git a/dts/Bindings/iio/pressure/murata,zpa2326.yaml b/dts/Bindings/iio/pressure/murata,zpa2326.yaml new file mode 100644 index 0000000000..d6103be034 --- /dev/null +++ b/dts/Bindings/iio/pressure/murata,zpa2326.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/pressure/murata,zpa2326.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Murata ZPA2326 pressure sensor + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Pressure sensor from Murata with SPI and I2C bus interfaces. + + +properties: + compatible: + const: murata,zpa2326 + + reg: + maxItems: 1 + + vdd-supply: true + vref-supply: true + + interrupts: + maxItems: 1 + + spi-max-frequency: + maximum: 1000000 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pressure@5c { + compatible = "murata,zpa2326"; + reg = <0x5c>; + interrupt-parent = <&gpio>; + interrupts = <12>; + vdd-supply = <&ldo_1v8_gnss>; + }; + }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + pressure@0 { + compatible = "murata,zpa2326"; + reg = <0>; + spi-max-frequency = <500000>; + }; + }; +... diff --git a/dts/Bindings/iio/pressure/zpa2326.txt b/dts/Bindings/iio/pressure/zpa2326.txt deleted file mode 100644 index a36ab3e0c3..0000000000 --- a/dts/Bindings/iio/pressure/zpa2326.txt +++ /dev/null @@ -1,29 +0,0 @@ -Murata ZPA2326 pressure sensor - -Pressure sensor from Murata with SPI and I2C bus interfaces. - -Required properties: -- compatible: "murata,zpa2326" -- reg: the I2C address or SPI chip select the device will respond to - -Recommended properties for SPI bus usage: -- spi-max-frequency: maximum SPI bus frequency as documented in - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: -- vref-supply: an optional regulator that needs to be on to provide VREF - power to the sensor -- vdd-supply: an optional regulator that needs to be on to provide VDD - power to the sensor -- interrupts: interrupt mapping for IRQ as documented in - Documentation/devicetree/bindings/interrupt-controller/interrupts.txt - -Example: - -zpa2326@5c { - compatible = "murata,zpa2326"; - reg = <0x5c>; - interrupt-parent = <&gpio>; - interrupts = <12>; - vdd-supply = <&ldo_1v8_gnss>; -}; diff --git a/dts/Bindings/iio/proximity/ams,as3935.yaml b/dts/Bindings/iio/proximity/ams,as3935.yaml new file mode 100644 index 0000000000..7fcba5d6d5 --- /dev/null +++ b/dts/Bindings/iio/proximity/ams,as3935.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/proximity/ams,as3935.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Austrian Microsystems AS3935 Franklin lightning sensor + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +description: + This lightening distance sensor uses an I2C or SPI interface. The + binding currently only covers the SPI option. + +properties: + compatible: + const: ams,as3935 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 2000000 + + spi-cpha: true + + interrupts: + maxItems: 1 + + ams,tuning-capacitor-pf: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Calibration tuning capacitor stepping value. This will require using + the calibration data from the manufacturer. + minimum: 0 + maximum: 120 + + ams,nflwdth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Set the noise and watchdog threshold register on startup. This will + need to set according to the noise from the MCU board, and possibly + the local environment. Refer to the datasheet for the threshold settings. + +required: + - compatible + - reg + - spi-cpha + - interrupts + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + lightning@0 { + compatible = "ams,as3935"; + reg = <0>; + spi-max-frequency = <400000>; + spi-cpha; + interrupt-parent = <&gpio1>; + interrupts = <16 1>; + ams,tuning-capacitor-pf = <80>; + ams,nflwdth = <0x44>; + }; + }; +... diff --git a/dts/Bindings/iio/proximity/as3935.txt b/dts/Bindings/iio/proximity/as3935.txt deleted file mode 100644 index 849115585d..0000000000 --- a/dts/Bindings/iio/proximity/as3935.txt +++ /dev/null @@ -1,34 +0,0 @@ -Austrian Microsystems AS3935 Franklin lightning sensor device driver - -Required properties: - - compatible: must be "ams,as3935" - - reg: SPI chip select number for the device - - spi-max-frequency: specifies maximum SPI clock frequency - - spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI - slave node bindings. - - interrupts : the sole interrupt generated by the device - - Refer to interrupt-controller/interrupts.txt for generic - interrupt client node bindings. - -Optional properties: - - ams,tuning-capacitor-pf: Calibration tuning capacitor stepping - value 0 - 120pF. This will require using the calibration data from - the manufacturer. - - ams,nflwdth: Set the noise and watchdog threshold register on - startup. This will need to set according to the noise from the - MCU board, and possibly the local environment. Refer to the - datasheet for the threshold settings. - -Example: - -as3935@0 { - compatible = "ams,as3935"; - reg = <0>; - spi-max-frequency = <400000>; - spi-cpha; - interrupt-parent = <&gpio1>; - interrupts = <16 1>; - ams,tuning-capacitor-pf = <80>; - ams,nflwdth = <0x44>; -}; diff --git a/dts/Bindings/iio/proximity/semtech,sx9310.yaml b/dts/Bindings/iio/proximity/semtech,sx9310.yaml index 5739074d35..5de0bb2180 100644 --- a/dts/Bindings/iio/proximity/semtech,sx9310.yaml +++ b/dts/Bindings/iio/proximity/semtech,sx9310.yaml @@ -40,6 +40,63 @@ properties: "#io-channel-cells": const: 1 + semtech,cs0-ground: + description: Indicates the CS0 sensor is connected to ground. + type: boolean + + semtech,combined-sensors: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + List of which sensors are combined and represented by CS3. + Possible values are - + 3 - CS3 (internal) + 0 1 - CS0 + CS1 + 1 2 - CS1 + CS2 (default) + 0 1 2 3 - CS0 + CS1 + CS2 + CS3 + items: + enum: [ 0, 1, 2, 3 ] + minItems: 1 + maxItems: 4 + + semtech,resolution: + description: + Capacitance measure resolution. Refer to datasheet for more details. + enum: + - coarsest + - very-coarse + - coarse + - medium-coarse + - medium + - fine + - very-fine + - finest + + semtech,startup-sensor: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 0 + description: + Sensor used for start-up proximity detection. The combined + sensor is represented by the value 3. This is used for initial + compensation. + + semtech,proxraw |