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author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-05-05 10:26:19 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-05-05 10:26:19 +0200 |
commit | 7d72033412f8dc9e5a31a1f87f469d9627897fe6 (patch) | |
tree | 34577e6eafb0a257653c2c9e399a9f32cc9cd338 /dts/Bindings | |
parent | 30d9267f2e7cb9f25968084f15d1ae117c7fa7a2 (diff) | |
download | barebox-7d72033412f8dc9e5a31a1f87f469d9627897fe6.tar.gz barebox-7d72033412f8dc9e5a31a1f87f469d9627897fe6.tar.xz |
dts: update to v5.18-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings')
-rw-r--r-- | dts/Bindings/clock/microchip,mpfs.yaml | 13 | ||||
-rw-r--r-- | dts/Bindings/mfd/atmel-flexcom.txt | 2 | ||||
-rw-r--r-- | dts/Bindings/net/dsa/realtek.yaml | 35 | ||||
-rw-r--r-- | dts/Bindings/regulator/richtek,rt5190a-regulator.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/rtc/microchip,mfps-rtc.yaml | 15 | ||||
-rw-r--r-- | dts/Bindings/usb/samsung,exynos-usb2.yaml | 1 |
6 files changed, 40 insertions, 28 deletions
diff --git a/dts/Bindings/clock/microchip,mpfs.yaml b/dts/Bindings/clock/microchip,mpfs.yaml index 0c15afa221..016a4f378b 100644 --- a/dts/Bindings/clock/microchip,mpfs.yaml +++ b/dts/Bindings/clock/microchip,mpfs.yaml @@ -22,7 +22,16 @@ properties: const: microchip,mpfs-clkcfg reg: - maxItems: 1 + items: + - description: | + clock config registers: + These registers contain enable, reset & divider tables for the, cpu, + axi, ahb and rtc/mtimer reference clocks as well as enable and reset + for the peripheral clocks. + - description: | + mss pll dri registers: + Block of registers responsible for dynamic reconfiguration of the mss + pll clocks: maxItems: 1 @@ -51,7 +60,7 @@ examples: #size-cells = <2>; clkcfg: clock-controller@20002000 { compatible = "microchip,mpfs-clkcfg"; - reg = <0x0 0x20002000 0x0 0x1000>; + reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; clocks = <&ref>; #clock-cells = <1>; }; diff --git a/dts/Bindings/mfd/atmel-flexcom.txt b/dts/Bindings/mfd/atmel-flexcom.txt index 692300117c..9d83753563 100644 --- a/dts/Bindings/mfd/atmel-flexcom.txt +++ b/dts/Bindings/mfd/atmel-flexcom.txt @@ -54,7 +54,7 @@ flexcom@f8034000 { clock-names = "spi_clk"; atmel,fifo-size = <32>; - mtd_dataflash@0 { + flash@0 { compatible = "atmel,at25f512b"; reg = <0>; spi-max-frequency = <20000000>; diff --git a/dts/Bindings/net/dsa/realtek.yaml b/dts/Bindings/net/dsa/realtek.yaml index 8756060895..99ee4b5b93 100644 --- a/dts/Bindings/net/dsa/realtek.yaml +++ b/dts/Bindings/net/dsa/realtek.yaml @@ -27,32 +27,25 @@ description: The realtek-mdio driver is an MDIO driver and it must be inserted inside an MDIO node. + The compatible string is only used to identify which (silicon) family the + switch belongs to. Roughly speaking, a family is any set of Realtek switches + whose chip identification register(s) have a common location and semantics. + The different models in a given family can be automatically disambiguated by + parsing the chip identification register(s) according to the given family, + avoiding the need for a unique compatible string for each model. + properties: compatible: enum: - realtek,rtl8365mb - - realtek,rtl8366 - realtek,rtl8366rb - - realtek,rtl8366s - - realtek,rtl8367 - - realtek,rtl8367b - - realtek,rtl8367rb - - realtek,rtl8367s - - realtek,rtl8368s - - realtek,rtl8369 - - realtek,rtl8370 description: | - realtek,rtl8365mb: 4+1 ports - realtek,rtl8366: 5+1 ports - realtek,rtl8366rb: 5+1 ports - realtek,rtl8366s: 5+1 ports - realtek,rtl8367: - realtek,rtl8367b: - realtek,rtl8367rb: 5+2 ports - realtek,rtl8367s: 5+2 ports - realtek,rtl8368s: 8 ports - realtek,rtl8369: 8+1 ports - realtek,rtl8370: 8+2 ports + realtek,rtl8365mb: + Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB, + RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S, + RTL8367SB, RTL8370MB, RTL8310SR + realtek,rtl8366rb: + Use with models RTL8366RB, RTL8366S mdc-gpios: description: GPIO line for the MDC clock line. @@ -335,7 +328,7 @@ examples: #size-cells = <0>; switch@29 { - compatible = "realtek,rtl8367s"; + compatible = "realtek,rtl8365mb"; reg = <29>; reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; diff --git a/dts/Bindings/regulator/richtek,rt5190a-regulator.yaml b/dts/Bindings/regulator/richtek,rt5190a-regulator.yaml index 28725c5467..edb411be03 100644 --- a/dts/Bindings/regulator/richtek,rt5190a-regulator.yaml +++ b/dts/Bindings/regulator/richtek,rt5190a-regulator.yaml @@ -58,7 +58,7 @@ properties: type: object $ref: regulator.yaml# description: | - regulator description for buck1 and buck4. + regulator description for buck1 to buck4, and ldo. properties: regulator-allowed-modes: diff --git a/dts/Bindings/rtc/microchip,mfps-rtc.yaml b/dts/Bindings/rtc/microchip,mfps-rtc.yaml index a2e984ea35..500c62becd 100644 --- a/dts/Bindings/rtc/microchip,mfps-rtc.yaml +++ b/dts/Bindings/rtc/microchip,mfps-rtc.yaml @@ -31,11 +31,19 @@ properties: to that of the RTC's count register. clocks: - maxItems: 1 + items: + - description: | + AHB clock + - description: | + Reference clock: divided by the prescaler to create a time-based + strobe (typically 1 Hz) for the calendar counter. By default, the rtc + on the PolarFire SoC shares it's reference with MTIMER so this will + be a 1 MHz clock. clock-names: items: - const: rtc + - const: rtcref required: - compatible @@ -48,11 +56,12 @@ additionalProperties: false examples: - | + #include "dt-bindings/clock/microchip,mpfs-clock.h" rtc@20124000 { compatible = "microchip,mpfs-rtc"; reg = <0x20124000 0x1000>; - clocks = <&clkcfg 21>; - clock-names = "rtc"; + clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; + clock-names = "rtc", "rtcref"; interrupts = <80>, <81>; }; ... diff --git a/dts/Bindings/usb/samsung,exynos-usb2.yaml b/dts/Bindings/usb/samsung,exynos-usb2.yaml index 340dff8d19..9c92defbba 100644 --- a/dts/Bindings/usb/samsung,exynos-usb2.yaml +++ b/dts/Bindings/usb/samsung,exynos-usb2.yaml @@ -62,6 +62,7 @@ required: - interrupts - phys - phy-names + - reg allOf: - if: |