summaryrefslogtreecommitdiffstats
path: root/dts/include/dt-bindings/clock/exynos5410.h
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2019-06-05 00:06:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-06-11 09:11:11 +0200
commit796af3473b8222bcd89aa63e9886c355a6baf95d (patch)
treead357b2756bda409b46747faaaf57a0ffd003c9c /dts/include/dt-bindings/clock/exynos5410.h
parent649b9ebcf53d697277bcdb01334dbcd563a33aa8 (diff)
downloadbarebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.gz
barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.xz
dts: update to v5.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/include/dt-bindings/clock/exynos5410.h')
-rw-r--r--dts/include/dt-bindings/clock/exynos5410.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/dts/include/dt-bindings/clock/exynos5410.h b/dts/include/dt-bindings/clock/exynos5410.h
index f179eabbcd..86c2ad56c5 100644
--- a/dts/include/dt-bindings/clock/exynos5410.h
+++ b/dts/include/dt-bindings/clock/exynos5410.h
@@ -36,6 +36,7 @@
#define CLK_UART0 257
#define CLK_UART1 258
#define CLK_UART2 259
+#define CLK_UART3 260
#define CLK_I2C0 261
#define CLK_I2C1 262
#define CLK_I2C2 263
@@ -44,7 +45,7 @@
#define CLK_USI1 266
#define CLK_USI2 267
#define CLK_USI3 268
-#define CLK_UART3 260
+#define CLK_TSADC 270
#define CLK_PWM 279
#define CLK_MCT 315
#define CLK_WDT 316