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authorSascha Hauer <s.hauer@pengutronix.de>2019-04-05 14:51:50 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-04-08 10:16:55 +0200
commit1dc748b3b202cadf9b799874d9af8d441ee556bc (patch)
tree58fd3c90a40e2d0128b0c7f36d63d7fc126bb20d /dts/src/arm/alpine.dtsi
parent9688b49cd3bc0b61a019e8e1311236c9975a0777 (diff)
downloadbarebox-1dc748b3b202cadf9b799874d9af8d441ee556bc.tar.gz
barebox-1dc748b3b202cadf9b799874d9af8d441ee556bc.tar.xz
dts: update to v5.1-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/alpine.dtsi')
-rw-r--r--dts/src/arm/alpine.dtsi8
1 files changed, 7 insertions, 1 deletions
diff --git a/dts/src/arm/alpine.dtsi b/dts/src/arm/alpine.dtsi
index 731df7a8c4..d3036ea823 100644
--- a/dts/src/arm/alpine.dtsi
+++ b/dts/src/arm/alpine.dtsi
@@ -25,12 +25,18 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include "skeleton64.dtsi"
/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
/* SOC compatibility */
compatible = "al,alpine";
+ memory {
+ device_type = "memory";
+ reg = <0 0 0 0>;
+ };
+
/* CPU Configuration */
cpus {
#address-cells = <1>;