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authorSascha Hauer <s.hauer@pengutronix.de>2016-10-18 10:10:24 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-10-18 10:10:24 +0200
commitbfbf18d991756858337f7700e8ff0a6f0dc31afc (patch)
treecf3568de4fdff1891e277507f08f49a871682706 /dts/src/arm/omap5.dtsi
parent834f6bf5e5f1169065376ad1aeb6a6266e66ce5c (diff)
downloadbarebox-bfbf18d991756858337f7700e8ff0a6f0dc31afc.tar.gz
dts: update to v4.9-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/omap5.dtsi')
-rw-r--r--dts/src/arm/omap5.dtsi26
1 files changed, 12 insertions, 14 deletions
diff --git a/dts/src/arm/omap5.dtsi b/dts/src/arm/omap5.dtsi
index 84c1019..2526211 100644
--- a/dts/src/arm/omap5.dtsi
+++ b/dts/src/arm/omap5.dtsi
@@ -11,11 +11,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/omap.h>
-#include "skeleton.dtsi"
-
/ {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
compatible = "ti,omap5";
interrupt-parent = <&wakeupgen>;
@@ -92,10 +90,10 @@
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
- reg = <0x48211000 0x1000>,
- <0x48212000 0x1000>,
- <0x48214000 0x2000>,
- <0x48216000 0x2000>;
+ reg = <0 0x48211000 0 0x1000>,
+ <0 0x48212000 0 0x1000>,
+ <0 0x48214000 0 0x2000>,
+ <0 0x48216000 0 0x2000>;
interrupt-parent = <&gic>;
};
@@ -103,7 +101,7 @@
compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <3>;
- reg = <0x48281000 0x1000>;
+ reg = <0 0x48281000 0 0x1000>;
interrupt-parent = <&gic>;
};
@@ -131,11 +129,11 @@
compatible = "ti,omap5-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges;
+ ranges = <0 0 0 0xc0000000>;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
- reg = <0x44000000 0x2000>,
- <0x44800000 0x3000>,
- <0x45000000 0x4000>;
+ reg = <0 0x44000000 0 0x2000>,
+ <0 0x44800000 0 0x3000>,
+ <0 0x45000000 0 0x4000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@@ -865,7 +863,7 @@
#size-cells = <1>;
utmi-mode = <2>;
ranges;
- dwc3@4a030000 {
+ dwc3: dwc3@4a030000 {
compatible = "snps,dwc3";
reg = <0x4a030000 0x10000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,