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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-20 15:07:38 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-27 21:17:17 +0200 |
| commit | 8d158e1a40917e48cb68131a6cfd1b8755a4d8a0 (patch) | |
| tree | 76118ca8fbf736bbdbc30b9fa2480a0d2a775597 /dts/src/arm/pxa168.dtsi | |
| parent | 15d46bac2280def447c7fd74686d44d938c24556 (diff) | |
| download | barebox-8d158e1a40917e48cb68131a6cfd1b8755a4d8a0.tar.gz barebox-8d158e1a40917e48cb68131a6cfd1b8755a4d8a0.tar.xz | |
dts: update to v5.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/pxa168.dtsi')
| -rw-r--r-- | dts/src/arm/pxa168.dtsi | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/dts/src/arm/pxa168.dtsi b/dts/src/arm/pxa168.dtsi index 72f8cb60cb..9a9e38245e 100644 --- a/dts/src/arm/pxa168.dtsi +++ b/dts/src/arm/pxa168.dtsi @@ -55,27 +55,30 @@ interrupts = <13>; }; - uart1: uart@d4017000 { - compatible = "mrvl,mmp-uart"; + uart1: serial@d4017000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4017000 0x1000>; + reg-shift = <2>; interrupts = <27>; clocks = <&soc_clocks PXA168_CLK_UART0>; resets = <&soc_clocks PXA168_CLK_UART0>; status = "disabled"; }; - uart2: uart@d4018000 { - compatible = "mrvl,mmp-uart"; + uart2: serial@d4018000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4018000 0x1000>; + reg-shift = <2>; interrupts = <28>; clocks = <&soc_clocks PXA168_CLK_UART1>; resets = <&soc_clocks PXA168_CLK_UART1>; status = "disabled"; }; - uart3: uart@d4026000 { - compatible = "mrvl,mmp-uart"; + uart3: serial@d4026000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4026000 0x1000>; + reg-shift = <2>; interrupts = <29>; clocks = <&soc_clocks PXA168_CLK_UART2>; resets = <&soc_clocks PXA168_CLK_UART2>; |