summaryrefslogtreecommitdiffstats
path: root/dts/src/arm/socfpga_arria10.dtsi
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2020-08-03 23:36:47 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-08-03 23:36:47 +0200
commit55f407a93800ba4b42a24371de5328b2492b9109 (patch)
tree890318605714d68945f65e3f912db9512f87227e /dts/src/arm/socfpga_arria10.dtsi
parent315d61170ed6959cdfeea39b768d017aea539c02 (diff)
downloadbarebox-55f407a93800ba4b42a24371de5328b2492b9109.tar.gz
barebox-55f407a93800ba4b42a24371de5328b2492b9109.tar.xz
dts: update to v5.8-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/socfpga_arria10.dtsi')
-rw-r--r--dts/src/arm/socfpga_arria10.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/src/arm/socfpga_arria10.dtsi b/dts/src/arm/socfpga_arria10.dtsi
index 3b8571b8b4..8f614c4b0e 100644
--- a/dts/src/arm/socfpga_arria10.dtsi
+++ b/dts/src/arm/socfpga_arria10.dtsi
@@ -636,7 +636,7 @@
reg = <0xffcfb100 0x80>;
};
- L2: l2-cache@fffff000 {
+ L2: cache-controller@fffff000 {
compatible = "arm,pl310-cache";
reg = <0xfffff000 0x1000>;
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;