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author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-09-11 08:26:30 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-09-11 17:23:13 +0200 |
commit | 35f607bc7da71b302fd6bf3d6d48d7ea66df1195 (patch) | |
tree | dd2cf14c56430d21079c794fa6e03d7f5d91070e /dts/src/arm/sun8i-a33.dtsi | |
parent | 625eea2765d94aee016cf25d9cabecde8eae0775 (diff) | |
download | barebox-35f607bc7da71b302fd6bf3d6d48d7ea66df1195.tar.gz barebox-35f607bc7da71b302fd6bf3d6d48d7ea66df1195.tar.xz |
dts: update to v4.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/sun8i-a33.dtsi')
-rw-r--r-- | dts/src/arm/sun8i-a33.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/dts/src/arm/sun8i-a33.dtsi b/dts/src/arm/sun8i-a33.dtsi index 8d278ee001..4e92741b24 100644 --- a/dts/src/arm/sun8i-a33.dtsi +++ b/dts/src/arm/sun8i-a33.dtsi @@ -132,21 +132,30 @@ }; cpu@1 { + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; }; |