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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-08-24 08:46:04 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-08-25 15:39:39 +0200 |
| commit | eddd8312948329e28f00a6f1ca52b3e7f3c330ee (patch) | |
| tree | 1b4ef77f92f72af55f853e09be1789a4206fbcb6 /dts/src/arm/sun8i-r40.dtsi | |
| parent | eed776a50f486d4c1951da32a30d3fd1588ac6e2 (diff) | |
| download | barebox-eddd8312948329e28f00a6f1ca52b3e7f3c330ee.tar.gz barebox-eddd8312948329e28f00a6f1ca52b3e7f3c330ee.tar.xz | |
dts: update to v6.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/sun8i-r40.dtsi')
| -rw-r--r-- | dts/src/arm/sun8i-r40.dtsi | 44 |
1 files changed, 41 insertions, 3 deletions
diff --git a/dts/src/arm/sun8i-r40.dtsi b/dts/src/arm/sun8i-r40.dtsi index 03d3e5f45a..4ef26d8f53 100644 --- a/dts/src/arm/sun8i-r40.dtsi +++ b/dts/src/arm/sun8i-r40.dtsi @@ -42,6 +42,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-r40-ccu.h> #include <dt-bindings/clock/sun8i-tcon-top.h> @@ -84,24 +85,36 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; }; @@ -117,6 +130,30 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; gpu_thermal: gpu-thermal { @@ -485,7 +522,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun8i-r40-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -504,7 +541,8 @@ compatible = "allwinner,sun8i-r40-pinctrl"; reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -1231,7 +1269,7 @@ reg-io-width = <1>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; |