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authorSascha Hauer <s.hauer@pengutronix.de>2018-09-11 08:26:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-09-11 17:23:13 +0200
commit35f607bc7da71b302fd6bf3d6d48d7ea66df1195 (patch)
treedd2cf14c56430d21079c794fa6e03d7f5d91070e /dts/src/arm64/broadcom/stingray/stingray-clock.dtsi
parent625eea2765d94aee016cf25d9cabecde8eae0775 (diff)
downloadbarebox-35f607bc7da71b302fd6bf3d6d48d7ea66df1195.tar.gz
dts: update to v4.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/broadcom/stingray/stingray-clock.dtsi')
-rw-r--r--dts/src/arm64/broadcom/stingray/stingray-clock.dtsi26
1 files changed, 19 insertions, 7 deletions
diff --git a/dts/src/arm64/broadcom/stingray/stingray-clock.dtsi b/dts/src/arm64/broadcom/stingray/stingray-clock.dtsi
index 3a4d452..10a106a 100644
--- a/dts/src/arm64/broadcom/stingray/stingray-clock.dtsi
+++ b/dts/src/arm64/broadcom/stingray/stingray-clock.dtsi
@@ -52,12 +52,24 @@
reg = <0x0001d104 0x32>,
<0x0001c854 0x4>;
clocks = <&osc>;
- clock-output-names = "genpll0", "clk_125", "clk_scr",
+ clock-output-names = "genpll0", "clk_125m", "clk_scr",
"clk_250", "clk_pcie_axi",
"clk_paxc_axi_x2",
"clk_paxc_axi";
};
+ genpll2: genpll2@1d1ac {
+ #clock-cells = <1>;
+ compatible = "brcm,sr-genpll2";
+ reg = <0x0001d1ac 0x32>,
+ <0x0001c854 0x4>;
+ clocks = <&osc>;
+ clock-output-names = "genpll2", "clk_nic",
+ "clk_ts_500_ref", "clk_125_nitro",
+ "clk_chimp", "clk_nic_flash",
+ "clk_fs";
+ };
+
genpll3: genpll3@1d1e0 {
#clock-cells = <1>;
compatible = "brcm,sr-genpll3";
@@ -75,8 +87,8 @@
<0x0001c854 0x4>;
clocks = <&osc>;
clock-output-names = "genpll4", "clk_ccn",
- "clk_tpiu_pll", "noc_clk",
- "pll_chclk_fs4",
+ "clk_tpiu_pll", "clk_noc",
+ "clk_chclk_fs4",
"clk_bridge_fscpu";
};
@@ -86,8 +98,8 @@
reg = <0x0001d248 0x32>,
<0x0001c870 0x4>;
clocks = <&osc>;
- clock-output-names = "genpll5", "fs4_hf_clk",
- "crypto_ae_clk", "raid_ae_clk";
+ clock-output-names = "genpll5", "clk_fs4_hf",
+ "clk_crypto_ae", "clk_raid_ae";
};
lcpll0: lcpll0@1d0c4 {
@@ -107,9 +119,9 @@
reg = <0x0001d138 0x3c>,
<0x0001c870 0x4>;
clocks = <&osc>;
- clock-output-names = "lcpll1", "clk_wanpn",
+ clock-output-names = "lcpll1", "clk_wan",
"clk_usb_ref",
- "timesync_evt_clk";
+ "clk_crmu_ts";
};
hsls_clk: hsls_clk {