diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-06 08:07:34 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-06 08:07:34 +0200 |
commit | a33a9aefd0aa06a5cf50198d83d268c44dbe199c (patch) | |
tree | c81ca8695444da63ec9fcf36ccfa46be69a51d10 /dts/src/arm64/broadcom | |
parent | bb2de9a333d17bb1b048ad208002501226b83f03 (diff) | |
download | barebox-a33a9aefd0aa06a5cf50198d83d268c44dbe199c.tar.gz barebox-a33a9aefd0aa06a5cf50198d83d268c44dbe199c.tar.xz |
dts: update to v4.12-rc2
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/broadcom')
-rw-r--r-- | dts/src/arm64/broadcom/bcm283x-rpi-smsc9514.dtsi | 2 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/bcm283x.dtsi | 22 |
2 files changed, 14 insertions, 10 deletions
diff --git a/dts/src/arm64/broadcom/bcm283x-rpi-smsc9514.dtsi b/dts/src/arm64/broadcom/bcm283x-rpi-smsc9514.dtsi index 3f0a56ebcf..dc7ae776db 100644 --- a/dts/src/arm64/broadcom/bcm283x-rpi-smsc9514.dtsi +++ b/dts/src/arm64/broadcom/bcm283x-rpi-smsc9514.dtsi @@ -1,6 +1,6 @@ / { aliases { - ethernet = ðernet; + ethernet0 = ðernet; }; }; diff --git a/dts/src/arm64/broadcom/bcm283x.dtsi b/dts/src/arm64/broadcom/bcm283x.dtsi index 35cea3fcaf..561f27d8d9 100644 --- a/dts/src/arm64/broadcom/bcm283x.dtsi +++ b/dts/src/arm64/broadcom/bcm283x.dtsi @@ -198,8 +198,8 @@ brcm,pins = <0 1>; brcm,function = <BCM2835_FSEL_ALT0>; }; - i2c0_gpio32: i2c0_gpio32 { - brcm,pins = <32 34>; + i2c0_gpio28: i2c0_gpio28 { + brcm,pins = <28 29>; brcm,function = <BCM2835_FSEL_ALT0>; }; i2c0_gpio44: i2c0_gpio44 { @@ -295,20 +295,28 @@ /* Separate from the uart0_gpio14 group * because it conflicts with spi1_gpio16, and * people often run uart0 on the two pins - * without flow contrl. + * without flow control. */ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { brcm,pins = <16 17>; brcm,function = <BCM2835_FSEL_ALT3>; }; - uart0_gpio30: uart0_gpio30 { + uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 { brcm,pins = <30 31>; brcm,function = <BCM2835_FSEL_ALT3>; }; - uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { + uart0_gpio32: uart0_gpio32 { brcm,pins = <32 33>; brcm,function = <BCM2835_FSEL_ALT3>; }; + uart0_gpio36: uart0_gpio36 { + brcm,pins = <36 37>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 { + brcm,pins = <38 39>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; uart1_gpio14: uart1_gpio14 { brcm,pins = <14 15>; @@ -326,10 +334,6 @@ brcm,pins = <30 31>; brcm,function = <BCM2835_FSEL_ALT5>; }; - uart1_gpio36: uart1_gpio36 { - brcm,pins = <36 37 38 39>; - brcm,function = <BCM2835_FSEL_ALT2>; - }; uart1_gpio40: uart1_gpio40 { brcm,pins = <40 41>; brcm,function = <BCM2835_FSEL_ALT5>; |