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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-01-27 11:22:53 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-01-28 15:31:59 +0100 |
| commit | 5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08 (patch) | |
| tree | 0634f20e5f75f3d44242af47eebd9ea1ce0163f6 /dts/src/arm64/exynos/exynosautov9.dtsi | |
| parent | db35548372eaee835fbf9bae68c08362ba59d49d (diff) | |
| download | barebox-5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08.tar.gz barebox-5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08.tar.xz | |
dts: update to v5.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/exynos/exynosautov9.dtsi')
| -rw-r--r-- | dts/src/arm64/exynos/exynosautov9.dtsi | 36 |
1 files changed, 28 insertions, 8 deletions
diff --git a/dts/src/arm64/exynos/exynosautov9.dtsi b/dts/src/arm64/exynos/exynosautov9.dtsi index a960c0bc2d..de8fcb82ea 100644 --- a/dts/src/arm64/exynos/exynosautov9.dtsi +++ b/dts/src/arm64/exynos/exynosautov9.dtsi @@ -7,6 +7,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/soc/samsung,exynos-usi.h> / { compatible = "samsung,exynosautov9"; @@ -256,16 +257,35 @@ reg = <0x17c20000 0x1000>; }; - /* USI: UART */ - serial_0: uart@10300000 { - compatible = "samsung,exynos850-uart"; - reg = <0x10300000 0x100>; - interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_bus_dual>; + syscon_peric0: syscon@10220000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x10220000 0x2000>; + }; + + usi_0: usi@103000c0 { + compatible = "samsung,exynos850-usi"; + reg = <0x103000c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1000>; + samsung,mode = <USI_V2_UART>; + samsung,clkreq-on; /* needed for UART mode */ + #address-cells = <1>; + #size-cells = <1>; + ranges; clocks = <&uart_clock>, <&uart_clock>; - clock-names = "uart", "clk_uart_baud0"; + clock-names = "pclk", "ipclk"; status = "disabled"; + + /* USI: UART */ + serial_0: serial@10300000 { + compatible = "samsung,exynos850-uart"; + reg = <0x10300000 0xc0>; + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus_dual>; + clocks = <&uart_clock>, <&uart_clock>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; }; ufs_0_phy: ufs0-phy@17e04000 { |