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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-06-13 11:20:28 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-06-13 11:20:28 +0200 |
| commit | 6b268debbf6f3ecc0432dd9ae57f428816d7ee85 (patch) | |
| tree | 615c1ae7cf693470bc0953aa72da1305bd4f328c /dts/src/arm64/freescale | |
| parent | 3fe16708d72bc4971709b9b284529c50c17654cd (diff) | |
| download | barebox-6b268debbf6f3ecc0432dd9ae57f428816d7ee85.tar.gz barebox-6b268debbf6f3ecc0432dd9ae57f428816d7ee85.tar.xz | |
dts: update to v6.4-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/freescale')
| -rw-r--r-- | dts/src/arm64/freescale/imx8-ss-dma.dtsi | 8 | ||||
| -rw-r--r-- | dts/src/arm64/freescale/imx8mn-beacon-baseboard.dtsi | 4 | ||||
| -rw-r--r-- | dts/src/arm64/freescale/imx8qm-mek.dts | 4 |
3 files changed, 12 insertions, 4 deletions
diff --git a/dts/src/arm64/freescale/imx8-ss-dma.dtsi b/dts/src/arm64/freescale/imx8-ss-dma.dtsi index 2dce8f2ee3..adb98a72bd 100644 --- a/dts/src/arm64/freescale/imx8-ss-dma.dtsi +++ b/dts/src/arm64/freescale/imx8-ss-dma.dtsi @@ -90,6 +90,8 @@ dma_subsys: bus@5a000000 { clocks = <&uart0_lpcg IMX_LPCG_CLK_4>, <&uart0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; + assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_0>; status = "disabled"; }; @@ -100,6 +102,8 @@ dma_subsys: bus@5a000000 { clocks = <&uart1_lpcg IMX_LPCG_CLK_4>, <&uart1_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; + assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_1>; status = "disabled"; }; @@ -110,6 +114,8 @@ dma_subsys: bus@5a000000 { clocks = <&uart2_lpcg IMX_LPCG_CLK_4>, <&uart2_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; + assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_2>; status = "disabled"; }; @@ -120,6 +126,8 @@ dma_subsys: bus@5a000000 { clocks = <&uart3_lpcg IMX_LPCG_CLK_4>, <&uart3_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; + assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_3>; status = "disabled"; }; diff --git a/dts/src/arm64/freescale/imx8mn-beacon-baseboard.dtsi b/dts/src/arm64/freescale/imx8mn-beacon-baseboard.dtsi index 9e82069c94..5a1f7c30af 100644 --- a/dts/src/arm64/freescale/imx8mn-beacon-baseboard.dtsi +++ b/dts/src/arm64/freescale/imx8mn-beacon-baseboard.dtsi @@ -81,7 +81,7 @@ &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_espi2>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; status = "okay"; eeprom@0 { @@ -202,7 +202,7 @@ MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 - MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41 + MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x41 >; }; diff --git a/dts/src/arm64/freescale/imx8qm-mek.dts b/dts/src/arm64/freescale/imx8qm-mek.dts index ce9d3f0b98..607cd6b4e9 100644 --- a/dts/src/arm64/freescale/imx8qm-mek.dts +++ b/dts/src/arm64/freescale/imx8qm-mek.dts @@ -82,8 +82,8 @@ pinctrl-0 = <&pinctrl_usdhc2>; bus-width = <4>; vmmc-supply = <®_usdhc2_vmmc>; - cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>; - wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>; + cd-gpios = <&lsio_gpio5 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; status = "okay"; }; |