diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-04-15 13:26:02 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-04-15 13:26:02 +0200 |
| commit | 6188e1ad295ca39228eae8376c8b3afe9c1d03a1 (patch) | |
| tree | d35e35767594d61c706a16d64f36035e6139b1ae /dts/src/arm64/freescale | |
| parent | e800de6a997bac2caac61e90eb4f80263ed70328 (diff) | |
| download | barebox-6188e1ad295ca39228eae8376c8b3afe9c1d03a1.tar.gz barebox-6188e1ad295ca39228eae8376c8b3afe9c1d03a1.tar.xz | |
dts: update to v5.12-rc7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/freescale')
| -rw-r--r-- | dts/src/arm64/freescale/imx8mm-pinfunc.h | 2 | ||||
| -rw-r--r-- | dts/src/arm64/freescale/imx8mq-pinfunc.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/dts/src/arm64/freescale/imx8mm-pinfunc.h b/dts/src/arm64/freescale/imx8mm-pinfunc.h index 5ccc4cc919..a003e6af33 100644 --- a/dts/src/arm64/freescale/imx8mm-pinfunc.h +++ b/dts/src/arm64/freescale/imx8mm-pinfunc.h @@ -124,7 +124,7 @@ #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0 #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0 #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0 -#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0 #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0 #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0 #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0 diff --git a/dts/src/arm64/freescale/imx8mq-pinfunc.h b/dts/src/arm64/freescale/imx8mq-pinfunc.h index b94b02080a..68e8fa1729 100644 --- a/dts/src/arm64/freescale/imx8mq-pinfunc.h +++ b/dts/src/arm64/freescale/imx8mq-pinfunc.h @@ -130,7 +130,7 @@ #define MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0 #define MX8MQ_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0 #define MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0 -#define MX8MQ_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0 +#define MX8MQ_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0 #define MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0 #define MX8MQ_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0 #define MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0 |