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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:31:46 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 12:43:53 +0200 |
| commit | 86186c232241b607f84cc266a6cda49160f44948 (patch) | |
| tree | 286a87dae7f2d8c3eda5b8551fc9b5f4db726c45 /dts/src/arm64/mediatek | |
| parent | 0cf29e11efa66ad4515c9391303406c725be2c7a (diff) | |
| download | barebox-86186c232241b607f84cc266a6cda49160f44948.tar.gz barebox-86186c232241b607f84cc266a6cda49160f44948.tar.xz | |
dts: update to v4.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/mediatek')
| -rw-r--r-- | dts/src/arm64/mediatek/mt8173.dtsi | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/dts/src/arm64/mediatek/mt8173.dtsi b/dts/src/arm64/mediatek/mt8173.dtsi index eab7efc230..05f89c4a54 100644 --- a/dts/src/arm64/mediatek/mt8173.dtsi +++ b/dts/src/arm64/mediatek/mt8173.dtsi @@ -125,6 +125,49 @@ clock-output-names = "cpum_ck"; }; + thermal-zones { + cpu_thermal: cpu_thermal { + polling-delay-passive = <1000>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + thermal-sensors = <&thermal>; + sustainable-power = <1500>; /* milliwatts */ + + trips { + threshold: trip-point@0 { + temperature = <68000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point@1 { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu_crit@0 { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map@0 { + trip = <&target>; + cooling-device = <&cpu0 0 0>; + contribution = <1024>; + }; + map@1 { + trip = <&target>; + cooling-device = <&cpu2 0 0>; + contribution = <2048>; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; @@ -313,6 +356,11 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + auxadc: auxadc@11001000 { + compatible = "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8173-uart", "mediatek,mt6577-uart"; @@ -414,6 +462,18 @@ status = "disabled"; }; + thermal: thermal@1100b000 { + #thermal-sensor-cells = <0>; + compatible = "mediatek,mt8173-thermal"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; + clock-names = "therm", "auxadc"; + resets = <&pericfg MT8173_PERI_THERM_SW_RST>; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + }; + nor_flash: spi@1100d000 { compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; |