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authorSascha Hauer <s.hauer@pengutronix.de>2020-09-21 14:08:19 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-09-21 14:08:19 +0200
commiteab18ebe074ddcf7d453dc3cd23d41c57ad8d0d7 (patch)
treeee55ce5b38fc56afdc16543e44ea4ea3798d5786 /dts/src/arm64/nvidia/tegra194.dtsi
parent79af54dfcb83ebd6d73a276a20d469716151868f (diff)
downloadbarebox-eab18ebe074ddcf7d453dc3cd23d41c57ad8d0d7.tar.gz
barebox-eab18ebe074ddcf7d453dc3cd23d41c57ad8d0d7.tar.xz
dts: update to v5.9-rc4
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/nvidia/tegra194.dtsi')
-rw-r--r--dts/src/arm64/nvidia/tegra194.dtsi15
1 files changed, 9 insertions, 6 deletions
diff --git a/dts/src/arm64/nvidia/tegra194.dtsi b/dts/src/arm64/nvidia/tegra194.dtsi
index 48160f4800..ca5cb6aef5 100644
--- a/dts/src/arm64/nvidia/tegra194.dtsi
+++ b/dts/src/arm64/nvidia/tegra194.dtsi
@@ -460,8 +460,9 @@
compatible = "nvidia,tegra194-sdhci";
reg = <0x03400000 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
- clock-names = "sdhci";
+ clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
+ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
+ clock-names = "sdhci", "tmclk";
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
@@ -485,8 +486,9 @@
compatible = "nvidia,tegra194-sdhci";
reg = <0x03440000 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
- clock-names = "sdhci";
+ clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
+ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
+ clock-names = "sdhci", "tmclk";
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
@@ -511,8 +513,9 @@
compatible = "nvidia,tegra194-sdhci";
reg = <0x03460000 0x10000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
- clock-names = "sdhci";
+ clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
+ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
+ clock-names = "sdhci", "tmclk";
assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
<&bpmp TEGRA194_CLK_PLLC4>;
assigned-clock-parents =