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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2024-03-26 11:20:49 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2024-03-26 11:20:49 +0100 |
| commit | 8622bc3184ea06f0f77185d5e4f77ae5deeb0a82 (patch) | |
| tree | cf9e37e07dc7922a8b23530e3c3c447ff7170d41 /dts/src/arm64/qcom/sm6125.dtsi | |
| parent | 8bf6a31b5e8e42da3d2b3e9200887f273ab53d94 (diff) | |
| parent | 8dde7a4f17a1245a9aaf07372a7256dc4d09d1fa (diff) | |
| download | barebox-8622bc3184ea06f0f77185d5e4f77ae5deeb0a82.tar.gz barebox-8622bc3184ea06f0f77185d5e4f77ae5deeb0a82.tar.xz | |
Merge branch 'for-next/dts' into next
Diffstat (limited to 'dts/src/arm64/qcom/sm6125.dtsi')
| -rw-r--r-- | dts/src/arm64/qcom/sm6125.dtsi | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/dts/src/arm64/qcom/sm6125.dtsi b/dts/src/arm64/qcom/sm6125.dtsi index 1dd3a4056e..98ab083560 100644 --- a/dts/src/arm64/qcom/sm6125.dtsi +++ b/dts/src/arm64/qcom/sm6125.dtsi @@ -812,10 +812,12 @@ compatible = "qcom,sm6125-qmp-ufs-phy"; reg = <0x04807000 0xdb8>; - clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&gcc GCC_UFS_MEM_CLKREF_CLK>; clock-names = "ref", - "ref_aux"; + "ref_aux", + "qref"; resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -1185,9 +1187,14 @@ <&gcc GCC_USB30_PRIM_MASTER_CLK>; assigned-clock-rates = <19200000>, <66666667>; - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hs_phy_irq", "ss_phy_irq"; + interrupt-names = "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; power-domains = <&gcc USB30_PRIM_GDSC>; qcom,select-utmi-as-pipe-clk; |