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authorSascha Hauer <s.hauer@pengutronix.de>2017-10-06 06:12:41 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2017-10-06 06:12:41 +0200
commitebde8820a04dd73a09f50ba84b8cf8ec3773d6ba (patch)
tree031d15dcd26f5b737adddc5042a3ddabbb6051f7 /dts/src/arm64/qcom
parent15af9fc8cc9e18409893d2375271d64cac76924a (diff)
downloadbarebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.gz
barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.xz
dts: update to v4.14-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/qcom')
-rw-r--r--dts/src/arm64/qcom/apq8016-sbc-pmic-pins.dtsi1
-rw-r--r--dts/src/arm64/qcom/apq8016-sbc.dtsi17
-rw-r--r--dts/src/arm64/qcom/apq8096-db820c-pmic-pins.dtsi24
-rw-r--r--dts/src/arm64/qcom/apq8096-db820c.dtsi198
-rw-r--r--dts/src/arm64/qcom/ipq8074-hk01.dts52
-rw-r--r--dts/src/arm64/qcom/ipq8074.dtsi194
-rw-r--r--dts/src/arm64/qcom/msm8916.dtsi120
-rw-r--r--dts/src/arm64/qcom/msm8996.dtsi314
-rw-r--r--dts/src/arm64/qcom/pmi8994.dtsi17
9 files changed, 926 insertions, 11 deletions
diff --git a/dts/src/arm64/qcom/apq8016-sbc-pmic-pins.dtsi b/dts/src/arm64/qcom/apq8016-sbc-pmic-pins.dtsi
index d946408121..790b7775b9 100644
--- a/dts/src/arm64/qcom/apq8016-sbc-pmic-pins.dtsi
+++ b/dts/src/arm64/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -17,6 +17,7 @@
function = PMIC_GPIO_FUNC_NORMAL;
power-source = <PM8916_GPIO_VPH>;
input-disable;
+ output-high;
};
};
diff --git a/dts/src/arm64/qcom/apq8016-sbc.dtsi b/dts/src/arm64/qcom/apq8016-sbc.dtsi
index bd310ac196..1d63e6b879 100644
--- a/dts/src/arm64/qcom/apq8016-sbc.dtsi
+++ b/dts/src/arm64/qcom/apq8016-sbc.dtsi
@@ -88,6 +88,8 @@
interrupts = <31 2>;
adi,dsi-lanes = <4>;
+ clocks = <&rpmcc RPM_SMD_BB_CLK2>;
+ clock-names = "cec";
pd-gpios = <&msmgpio 32 0>;
@@ -213,11 +215,14 @@
};
usb@78d9000 {
- extcon = <&usb_id>, <&usb_id>;
+ extcon = <&usb_id>;
status = "okay";
adp-disable;
hnp-disable;
srp-disable;
+ dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_sw_sel_pm>;
ulpi {
phy {
v1p8-supply = <&pm8916_l7>;
@@ -337,19 +342,11 @@
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
- id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
+ vbus-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
- usb-switch {
- compatible = "toshiba,tc7usb40mu";
- switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
- extcon = <&usb_id>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_sw_sel_pm>;
- };
-
hdmi-out {
compatible = "hdmi-connector";
type = "a";
diff --git a/dts/src/arm64/qcom/apq8096-db820c-pmic-pins.dtsi b/dts/src/arm64/qcom/apq8096-db820c-pmic-pins.dtsi
index b1142c45fd..8e37978259 100644
--- a/dts/src/arm64/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/dts/src/arm64/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -24,4 +24,28 @@
power-source = <PM8994_GPIO_S4>; // 1.8V
};
};
+
+ usb3_vbus_det_gpio: pm8996_gpio22 {
+ pinconf {
+ pins = "gpio22";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ input-enable;
+ bias-pull-down;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
+ power-source = <PM8994_GPIO_S4>; // 1.8V
+ };
+ };
+};
+
+&pmi8994_gpios {
+ usb2_vbus_det_gpio: pmi8996_gpio6 {
+ pinconf {
+ pins = "gpio6";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ input-enable;
+ bias-pull-down;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
+ power-source = <PM8994_GPIO_S4>; // 1.8V
+ };
+ };
};
diff --git a/dts/src/arm64/qcom/apq8096-db820c.dtsi b/dts/src/arm64/qcom/apq8096-db820c.dtsi
index d2196fc6d7..789f3e8732 100644
--- a/dts/src/arm64/qcom/apq8096-db820c.dtsi
+++ b/dts/src/arm64/qcom/apq8096-db820c.dtsi
@@ -13,6 +13,7 @@
#include "msm8996.dtsi"
#include "pm8994.dtsi"
+#include "pmi8994.dtsi"
#include "apq8096-db820c-pins.dtsi"
#include "apq8096-db820c-pmic-pins.dtsi"
#include <dt-bindings/input/input.h>
@@ -88,6 +89,55 @@
cd-gpios = <&msmgpio 38 0x1>;
status = "okay";
};
+
+ phy@34000 {
+ status = "okay";
+ };
+
+ phy@7410000 {
+ status = "okay";
+ };
+
+ phy@7411000 {
+ status = "okay";
+ };
+
+ phy@7412000 {
+ status = "okay";
+ };
+
+ usb@6a00000 {
+ status = "okay";
+
+ dwc3@6a00000 {
+ extcon = <&usb3_id>;
+ dr_mode = "otg";
+ };
+ };
+
+ usb3_id: usb3-id {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpio = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb3_vbus_det_gpio>;
+ };
+
+ usb@7600000 {
+ status = "okay";
+
+ dwc3@7600000 {
+ extcon = <&usb2_id>;
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
+ };
+ };
+
+ usb2_id: usb2-id {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpio = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb2_vbus_det_gpio>;
+ };
};
@@ -106,4 +156,152 @@
gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
};
};
+
+ rpm-glink {
+ rpm_requests {
+ pm8994-regulators {
+ vdd_l1-supply = <&pm8994_s3>;
+ vdd_l2_l26_l28-supply = <&pm8994_s3>;
+ vdd_l3_l11-supply = <&pm8994_s3>;
+ vdd_l4_l27_l31-supply = <&pm8994_s3>;
+ vdd_l5_l7-supply = <&pm8994_s5>;
+ vdd_l14_l15-supply = <&pm8994_s5>;
+ vdd_l20_l21-supply = <&pm8994_s5>;
+ vdd_l25-supply = <&pm8994_s3>;
+
+ s3 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ };
+ s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ s5 {
+ regulator-min-microvolt = <2150000>;
+ regulator-max-microvolt = <2150000>;
+ };
+ s7 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ };
+
+ l1 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+ l2 {
+ regulator-min-microvolt = <1250000>;
+ regulator-max-microvolt = <1250000>;
+ };
+ l3 {
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ };
+ l4 {
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ };
+ l6 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+ l8 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l9 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l10 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l11 {
+ regulator-min-microvolt = <1150000>;
+ regulator-max-microvolt = <1150000>;
+ };
+ l12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l13 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ };
+ l14 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l15 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l16 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ };
+ l17 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ };
+ l18 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2900000>;
+ };
+ l19 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+ l20 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ regulator-allow-set-load;
+ };
+ l21 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ };
+ l22 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ l23 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+ l24 {
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ };
+ l25 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-allow-set-load;
+ };
+ l27 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+ l28 {
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <925000>;
+ regulator-allow-set-load;
+ };
+ l29 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+ l30 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ l32 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ };
+ };
+ };
};
diff --git a/dts/src/arm64/qcom/ipq8074-hk01.dts b/dts/src/arm64/qcom/ipq8074-hk01.dts
new file mode 100644
index 0000000000..6a838b5d32
--- /dev/null
+++ b/dts/src/arm64/qcom/ipq8074-hk01.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include "ipq8074.dtsi"
+
+/ {
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+ compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+ interrupt-parent = <&intc>;
+
+ aliases {
+ serial0 = &blsp1_uart5;
+ };
+
+ chosen {
+ stdout-path = "serial0";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x40000000 0x0 0x20000000>;
+ };
+
+ soc {
+ pinctrl@1000000 {
+ serial_4_pins: serial4_pinmux {
+ mux {
+ pins = "gpio23", "gpio24";
+ function = "blsp4_uart1";
+ bias-disable;
+ };
+ };
+ };
+
+ serial@78b3000 {
+ pinctrl-0 = <&serial_4_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+ };
+};
diff --git a/dts/src/arm64/qcom/ipq8074.dtsi b/dts/src/arm64/qcom/ipq8074.dtsi
new file mode 100644
index 0000000000..2bc5dec561
--- /dev/null
+++ b/dts/src/arm64/qcom/ipq8074.dtsi
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,gcc-ipq8074.h>
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ8074";
+ compatible = "qcom,ipq8074";
+
+ soc: soc {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ ranges = <0 0 0 0xffffffff>;
+ compatible = "simple-bus";
+
+ pinctrl@1000000 {
+ compatible = "qcom,ipq8074-pinctrl";
+ reg = <0x1000000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <0x2>;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ };
+
+ intc: interrupt-controller@b000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <0x3>;
+ reg = <0xb000000 0x1000>, <0xb002000 0x1000>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ timer@b120000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "arm,armv7-timer-mem";
+ reg = <0xb120000 0x1000>;
+ clock-frequency = <19200000>;
+
+ frame@b120000 {
+ frame-number = <0>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb121000 0x1000>,
+ <0xb122000 0x1000>;
+ };
+
+ frame@b123000 {
+ frame-number = <1>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb123000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@b124000 {
+ frame-number = <2>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb124000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@b125000 {
+ frame-number = <3>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb125000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@b126000 {
+ frame-number = <4>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb126000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@b127000 {
+ frame-number = <5>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb127000 0x1000>;
+ status = "disabled";
+ };
+
+ frame@b128000 {
+ frame-number = <6>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xb128000 0x1000>;
+ status = "disabled";
+ };
+ };
+
+ gcc: gcc@1800000 {
+ compatible = "qcom,gcc-ipq8074";
+ reg = <0x1800000 0x80000>;
+ #clock-cells = <0x1>;
+ #reset-cells = <0x1>;
+ };
+
+ blsp1_uart5: serial@78b3000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x78b3000 0x200>;
+ interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+ };
+
+ cpus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ CPU0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ CPU1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ reg = <0x1>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ reg = <0x2>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ reg = <0x3>;
+ next-level-cache = <&L2_0>;
+ };
+
+ L2_0: l2-cache {
+ compatible = "cache";
+ cache-level = <0x2>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
+ };
+
+ clocks {
+ sleep_clk: sleep_clk {
+ compatible = "fixed-clock";
+ clock-frequency = <32000>;
+ #clock-cells = <0>;
+ };
+
+ xo: xo {
+ compatible = "fixed-clock";
+ clock-frequency = <19200000>;
+ #clock-cells = <0>;
+ };
+ };
+};
diff --git a/dts/src/arm64/qcom/msm8916.dtsi b/dts/src/arm64/qcom/msm8916.dtsi
index 039991f808..dc3817593e 100644
--- a/dts/src/arm64/qcom/msm8916.dtsi
+++ b/dts/src/arm64/qcom/msm8916.dtsi
@@ -88,6 +88,11 @@
no-map;
};
+ venus_mem: venus@89900000 {
+ reg = <0x0 0x89900000 0x0 0x600000>;
+ no-map;
+ };
+
mba_mem: mba@8ea00000 {
no-map;
reg = <0 0x8ea00000 0 0x100000>;
@@ -204,6 +209,17 @@
};
+ gpu_opp_table: opp_table {
+ compatible = "operating-points-v2";
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ };
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -694,6 +710,84 @@
#thermal-sensor-cells = <1>;
};
+ apps_iommu: iommu@1ef0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #iommu-cells = <1>;
+ compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
+ ranges = <0 0x1e20000 0x40000>;
+ reg = <0x1ef0000 0x3000>;
+ clocks = <&gcc GCC_SMMU_CFG_CLK>,
+ <&gcc GCC_APSS_TCU_CLK>;
+ clock-names = "iface", "bus";
+ qcom,iommu-secure-id = <17>;
+
+ // mdp_0:
+ iommu-ctx@4000 {
+ compatible = "qcom,msm-iommu-v1-ns";
+ reg = <0x4000 0x1000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ // venus_ns:
+ iommu-ctx@5000 {
+ compatible = "qcom,msm-iommu-v1-sec";
+ reg = <0x5000 0x1000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ gpu_iommu: iommu@1f08000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #iommu-cells = <1>;
+ compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
+ ranges = <0 0x1f08000 0x10000>;
+ clocks = <&gcc GCC_SMMU_CFG_CLK>,
+ <&gcc GCC_GFX_TCU_CLK>;
+ clock-names = "iface", "bus";
+ qcom,iommu-secure-id = <18>;
+
+ // gfx3d_user:
+ iommu-ctx@1000 {
+ compatible = "qcom,msm-iommu-v1-ns";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ // gfx3d_priv:
+ iommu-ctx@2000 {
+ compatible = "qcom,msm-iommu-v1-ns";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 242 0>;
+ };
+ };
+
+ gpu@1c00000 {
+ compatible = "qcom,adreno-306.0", "qcom,adreno";
+ reg = <0x01c00000 0x20000>;
+ reg-names = "kgsl_3d0_reg_memory";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "kgsl_3d0_irq";
+ clock-names =
+ "core",
+ "iface",
+ "mem",
+ "mem_iface",
+ "alt_mem_iface",
+ "gfx3d";
+ clocks =
+ <&gcc GCC_OXILI_GFX3D_CLK>,
+ <&gcc GCC_OXILI_AHB_CLK>,
+ <&gcc GCC_OXILI_GMEM_CLK>,
+ <&gcc GCC_BIMC_GFX_CLK>,
+ <&gcc GCC_BIMC_GPU_CLK>,
+ <&gcc GFX3D_CLK_SRC>;
+ power-domains = <&gcc OXILI_GDSC>;
+ operating-points-v2 = <&gpu_opp_table>;
+ iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
+ };
+
mdss: mdss@1a00000 {
compatible = "qcom,mdss";
reg = <0x1a00000 0x1000>,
@@ -735,6 +829,8 @@
"core_clk",
"vsync_clk";
+ iommus = <&apps_iommu 4>;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -990,7 +1086,7 @@
};
replicator@824000 {
- compatible = "qcom,coresight-replicator1x", "arm,primecell";
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
reg = <0x824000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
@@ -1207,6 +1303,28 @@
};
};
};
+
+ venus: video-codec@1d00000 {
+ compatible = "qcom,msm8916-venus";
+ reg = <0x01d00000 0xff000>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&gcc VENUS_GDSC>;
+ clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
+ <&gcc GCC_VENUS0_AHB_CLK>,
+ <&gcc GCC_VENUS0_AXI_CLK>;
+ clock-names = "core", "iface", "bus";
+ iommus = <&apps_iommu 5>;
+ memory-region = <&venus_mem>;
+ status = "okay";
+
+ video-decoder {
+ compatible = "venus-decoder";
+ };
+
+ video-encoder {
+ compatible = "venus-encoder";
+ };
+ };
};
smd {
diff --git a/dts/src/arm64/qcom/msm8996.dtsi b/dts/src/arm64/qcom/msm8996.dtsi
index 8f085716e2..887b61c872 100644
--- a/dts/src/arm64/qcom/msm8996.dtsi
+++ b/dts/src/arm64/qcom/msm8996.dtsi
@@ -276,12 +276,83 @@
hwlocks = <&tcsr_mutex 3>;
};
+ rpm-glink {
+ compatible = "qcom,glink-rpm";
+
+ interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+
+ mboxes = <&apcs_glb 0>;
+
+ rpm_requests {
+ compatible = "qcom,rpm-msm8996";
+ qcom,glink-channels = "rpm_requests";
+
+ pm8994-regulators {
+ compatible = "qcom,rpm-pm8994-regulators";
+
+ pm8994_s1: s1 {};
+ pm8994_s2: s2 {};
+ pm8994_s3: s3 {};
+ pm8994_s4: s4 {};
+ pm8994_s5: s5 {};
+ pm8994_s6: s6 {};
+ pm8994_s7: s7 {};
+ pm8994_s8: s8 {};
+ pm8994_s9: s9 {};
+ pm8994_s10: s10 {};
+ pm8994_s11: s11 {};
+ pm8994_s12: s12 {};
+
+ pm8994_l1: l1 {};
+ pm8994_l2: l2 {};
+ pm8994_l3: l3 {};
+ pm8994_l4: l4 {};
+ pm8994_l5: l5 {};
+ pm8994_l6: l6 {};
+ pm8994_l7: l7 {};
+ pm8994_l8: l8 {};
+ pm8994_l9: l9 {};
+ pm8994_l10: l10 {};
+ pm8994_l11: l11 {};
+ pm8994_l12: l12 {};
+ pm8994_l13: l13 {};
+ pm8994_l14: l14 {};
+ pm8994_l15: l15 {};
+ pm8994_l16: l16 {};
+ pm8994_l17: l17 {};
+ pm8994_l18: l18 {};
+ pm8994_l19: l19 {};
+ pm8994_l20: l20 {};
+ pm8994_l21: l21 {};
+ pm8994_l22: l22 {};
+ pm8994_l23: l23 {};
+ pm8994_l24: l24 {};
+ pm8994_l25: l25 {};
+ pm8994_l26: l26 {};
+ pm8994_l27: l27 {};
+ pm8994_l28: l28 {};
+ pm8994_l29: l29 {};
+ pm8994_l30: l30 {};
+ pm8994_l31: l31 {};
+ pm8994_l32: l32 {};
+ };
+
+ };
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
+ rpm_msg_ram: memory@68000 {
+ compatible = "qcom,rpm-msg-ram";
+ reg = <0x68000 0x6000>;
+ };
+
tcsr_mutex_regs: syscon@740000 {
compatible = "syscon";
reg = <0x740000 0x20000>;
@@ -303,6 +374,13 @@
reg = <0x9820000 0x1000>;
};
+ apcs_glb: mailbox@9820000 {
+ compatible = "qcom,msm8996-apcs-hmss-global";
+ reg = <0x9820000 0x1000>;
+
+ #mbox-cells = <1>;
+ };
+
gcc: clock-controller@300000 {
compatible = "qcom,gcc-msm8996";
#clock-cells = <1>;
@@ -538,6 +616,209 @@
<960000000>,
<825000000>;
};
+
+ qfprom@74000 {
+ compatible = "qcom,qfprom";
+ reg = <0x74000 0x8ff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qusb2p_hstx_trim: hstx_trim@24e {
+ reg = <0x24e 0x2>;
+ bits = <5 4>;
+ };
+
+ qusb2s_hstx_trim: hstx_trim@24f {
+ reg = <0x24f 0x1>;
+ bits = <1 4>;
+ };
+ };
+
+ phy@34000 {
+ compatible = "qcom,msm8996-qmp-pcie-phy";
+ reg = <0x34000 0x488>;
+ #clock-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
+ <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_PCIE_CLKREF_CLK>;
+ clock-names = "aux", "cfg_ahb", "ref";
+
+ vdda-phy-supply = <&pm8994_l28>;
+ vdda-pll-supply = <&pm8994_l12>;
+
+ resets = <&gcc GCC_PCIE_PHY_BCR>,
+ <&gcc GCC_PCIE_PHY_COM_BCR>,
+ <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>;
+ reset-names = "phy", "common", "cfg";
+ status = "disabled";
+
+ pciephy_0: lane@35000 {
+ reg = <0x035000 0x130>,
+ <0x035200 0x200>,
+ <0x035400 0x1dc>;
+ #phy-cells = <0>;
+
+ clock-output-names = "pcie_0_pipe_clk_src";
+ clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
+ clock-names = "pipe0";
+ resets = <&gcc GCC_PCIE_0_PHY_BCR>;
+ reset-names = "lane0";
+ };
+
+ pciephy_1: lane@36000 {
+ reg = <0x036000 0x130>,
+ <0x036200 0x200>,
+ <0x036400 0x1dc>;
+ #phy-cells = <0>;
+
+ clock-output-names = "pcie_1_pipe_clk_src";
+ clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
+ clock-names = "pipe1";
+ resets = <&gcc GCC_PCIE_1_PHY_BCR>;
+ reset-names = "lane1";
+ };
+
+ pciephy_2: lane@37000 {
+ reg = <0x037000 0x130>,
+ <0x037200 0x200>,
+ <0x037400 0x1dc>;
+ #phy-cells = <0>;
+
+ clock-output-names = "pcie_2_pipe_clk_src";
+ clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
+ clock-names = "pipe2";
+ resets = <&gcc GCC_PCIE_2_PHY_BCR>;
+ reset-names = "lane2";
+ };
+ };
+
+ phy@7410000 {
+ compatible = "qcom,msm8996-qmp-usb3-phy";
+ reg = <0x7410000 0x1c4>;
+ #clock-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+ <&gcc GCC_USB3_CLKREF_CLK>;
+ clock-names = "aux", "cfg_ahb", "ref";
+
+ vdda-phy-supply = <&pm8994_l28>;
+ vdda-pll-supply = <&pm8994_l12>;
+
+ resets = <&gcc GCC_USB3_PHY_BCR>,
+ <&gcc GCC_USB3PHY_PHY_BCR>;
+ reset-names = "phy", "common";
+ status = "disabled";
+
+ ssusb_phy_0: lane@7410200 {
+ reg = <0x7410200 0x200>,
+ <0x7410400 0x130>,
+ <0x7410600 0x1a8>;
+ #phy-cells = <0>;
+
+ clock-output-names = "usb3_phy_pipe_clk_src";
+ clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "pipe0";
+ };
+ };
+
+ hsusb_phy1: phy@7411000 {
+ compatible = "qcom,msm8996-qusb2-phy";
+ reg = <0x7411000 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+ <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+ clock-names = "cfg_ahb", "ref";
+
+ vdda-pll-supply = <&pm8994_l12>;
+ vdda-phy-dpdm-supply = <&pm8994_l24>;
+
+ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+ nvmem-cells = <&qusb2p_hstx_trim>;
+ status = "disabled";
+ };
+
+ hsusb_phy2: phy@7412000 {
+ compatible = "qcom,msm8996-qusb2-phy";
+ reg = <0x7412000 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+ <&gcc GCC_RX2_USB2_CLKREF_CLK>;
+ clock-names = "cfg_ahb", "ref";
+
+ vdda-pll-supply = <&pm8994_l12>;
+ vdda-phy-dpdm-supply = <&pm8994_l24>;
+
+ resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
+ nvmem-cells = <&qusb2s_hstx_trim>;
+ status = "disabled";
+ };
+
+ usb2: usb@7600000 {
+ compatible = "qcom,dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_PERIPH_NOC_USB20_AHB_CLK>,
+ <&gcc GCC_USB20_MASTER_CLK>,
+ <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB20_SLEEP_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
+
+ assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB20_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <60000000>;
+
+ power-domains = <&gcc USB30_GDSC>;
+ status = "disabled";
+
+ dwc3@7600000 {
+ compatible = "snps,dwc3";
+ reg = <0x7600000 0xcc00>;
+ interrupts = <0 138 0>;
+ phys = <&hsusb_phy2>;
+ phy-names = "usb2-phy";
+ };
+ };
+
+ usb3: usb@6a00000 {
+ compatible = "qcom,dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
+ <&gcc GCC_USB30_MASTER_CLK>,
+ <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
+ <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_SLEEP_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
+
+ assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <120000000>;
+
+ power-domains = <&gcc USB30_GDSC>;
+ status = "disabled";
+
+ dwc3@6a00000 {
+ compatible = "snps,dwc3";
+ reg = <0x6a00000 0xcc00>;
+ interrupts = <0 131 0>;
+ phys = <&hsusb_phy1>, <&ssusb_phy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+ };
};
adsp-pil {
@@ -558,6 +839,15 @@
qcom,smem-states = <&adsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
+
+ smd-edge {
+ interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+
+ label = "lpass";
+ qcom,ipc = <&apcs 16 8>;
+ qcom,smd-edge = <1>;
+ qcom,remote-pid = <2>;
+ };
};
adsp-smp2p {
@@ -584,6 +874,30 @@
};
};
+ modem-smp2p {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+
+ interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&apcs 16 14>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ modem_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ modem_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
smp2p-slpi {
compatible = "qcom,smp2p";
qcom,smem = <481>, <430>;
diff --git a/dts/src/arm64/qcom/pmi8994.dtsi b/dts/src/arm64/qcom/pmi8994.dtsi
index d3879a4e80..57673f9280 100644
--- a/dts/src/arm64/qcom/pmi8994.dtsi
+++ b/dts/src/arm64/qcom/pmi8994.dtsi
@@ -8,6 +8,23 @@
reg = <0x2 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
+
+ pmi8994_gpios: gpios@c000 {
+ compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio";
+ reg = <0xc000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <2 0xc0 0 IRQ_TYPE_NONE>,
+ <2 0xc1 0 IRQ_TYPE_NONE>,
+ <2 0xc2 0 IRQ_TYPE_NONE>,
+ <2 0xc3 0 IRQ_TYPE_NONE>,
+ <2 0xc4 0 IRQ_TYPE_NONE>,
+ <2 0xc5 0 IRQ_TYPE_NONE>,
+ <2 0xc6 0 IRQ_TYPE_NONE>,
+ <2 0xc7 0 IRQ_TYPE_NONE>,
+ <2 0xc8 0 IRQ_TYPE_NONE>,
+ <2 0xc9 0 IRQ_TYPE_NONE>;
+ };
};
pmic@3 {