dts: update to v4.16-rc1

Also includeded:

ARM: dts: am33xx: do not delete no longer existing clocks

Several clocks are removed from the am33xx dts files with v4.16-rc1.
Remove the corresponding /delete-node/ directives aswell to avoid
dtc breakage.

Also included:

ARM: dts: imx6qdl: SolidRun: Fix upstream include

Upstream dts file way renamed, so change include name accordingly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

6 files changed, 27 insertions, 5 deletions

diff --git a/dts/src/arm64/socionext/uniphier-ld11-ref.dts b/dts/src/arm64/socionext/uniphier-ld11-ref.dts
index 6bdefb26b3..54c5317069 100644
--- a/dts/src/arm64/socionext/uniphier-ld11-ref.dts
+++ b/dts/src/arm64/socionext/uniphier-ld11-ref.dts
@@ -50,7 +50,7 @@
 &gpio {
 	xirq0 {
 		gpio-hog;
-		gpios = <120 0>;
+		gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
 		input;
 	};
 };
diff --git a/dts/src/arm64/socionext/uniphier-ld11.dtsi b/dts/src/arm64/socionext/uniphier-ld11.dtsi
index 1c63d0ab8a..cd7c2d0a1f 100644
--- a/dts/src/arm64/socionext/uniphier-ld11.dtsi
+++ b/dts/src/arm64/socionext/uniphier-ld11.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/uniphier-gpio.h>
 
 /memreserve/ 0x80000000 0x02000000;
 
@@ -100,7 +101,7 @@
 
 	emmc_pwrseq: emmc-pwrseq {
 		compatible = "mmc-pwrseq-emmc";
-		reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>;
 	};
 
 	timer {
@@ -347,6 +348,7 @@
 				 <&mio_clk 12>;
 			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
 				 <&mio_rst 12>;
+			has-transaction-translator;
 		};
 
 		usb1: usb@5a810100 {
@@ -360,6 +362,7 @@
 				 <&mio_clk 13>;
 			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
 				 <&mio_rst 13>;
+			has-transaction-translator;
 		};
 
 		usb2: usb@5a820100 {
@@ -373,6 +376,7 @@
 				 <&mio_clk 14>;
 			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
 				 <&mio_rst 14>;
+			has-transaction-translator;
 		};
 
 		mioctrl@5b3e0000 {
diff --git a/dts/src/arm64/socionext/uniphier-ld20-ref.dts b/dts/src/arm64/socionext/uniphier-ld20-ref.dts
index 254d6795c6..693371033c 100644
--- a/dts/src/arm64/socionext/uniphier-ld20-ref.dts
+++ b/dts/src/arm64/socionext/uniphier-ld20-ref.dts
@@ -50,7 +50,7 @@
 &gpio {
 	xirq0 {
 		gpio-hog;
-		gpios = <120 0>;
+		gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
 		input;
 	};
 };
diff --git a/dts/src/arm64/socionext/uniphier-ld20.dtsi b/dts/src/arm64/socionext/uniphier-ld20.dtsi
index 5c81070944..8a3276ba2d 100644
--- a/dts/src/arm64/socionext/uniphier-ld20.dtsi
+++ b/dts/src/arm64/socionext/uniphier-ld20.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/uniphier-gpio.h>
 #include <dt-bindings/thermal/thermal.h>
 
 /memreserve/ 0x80000000 0x02000000;
@@ -172,7 +173,7 @@
 
 	emmc_pwrseq: emmc-pwrseq {
 		compatible = "mmc-pwrseq-emmc";
-		reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>;
 	};
 
 	timer {
diff --git a/dts/src/arm64/socionext/uniphier-pxs3-ref.dts b/dts/src/arm64/socionext/uniphier-pxs3-ref.dts
index f9f06fcfb9..3c71087298 100644
--- a/dts/src/arm64/socionext/uniphier-pxs3-ref.dts
+++ b/dts/src/arm64/socionext/uniphier-pxs3-ref.dts
@@ -45,6 +45,22 @@
 	status = "okay";
 };
 
+&serial2 {
+	status = "okay";
+};
+
+&serial3 {
+	status = "okay";
+};
+
+&gpio {
+	xirq4 {
+		gpio-hog;
+		gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
+		input;
+	};
+};
+
 &i2c0 {
 	status = "okay";
 };
diff --git a/dts/src/arm64/socionext/uniphier-pxs3.dtsi b/dts/src/arm64/socionext/uniphier-pxs3.dtsi
index 0ac2ace824..234fc58cc5 100644
--- a/dts/src/arm64/socionext/uniphier-pxs3.dtsi
+++ b/dts/src/arm64/socionext/uniphier-pxs3.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/uniphier-gpio.h>
 
 /memreserve/ 0x80000000 0x02000000;
 
@@ -128,7 +129,7 @@
 
 	emmc_pwrseq: emmc-pwrseq {
 		compatible = "mmc-pwrseq-emmc";
-		reset-gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>;
 	};
 
 	timer {