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author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-24 08:51:55 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-24 08:51:55 +0200 |
commit | eae3051d0de2250d8e5b8ee1dbbcb0dc5f5ad55d (patch) | |
tree | ab83e0cb40736435737e5b4ad4ca548ae96d6dc4 /dts/src/arm64 | |
parent | a1904ef884e3643f887f1ee10555197fa6893129 (diff) | |
download | barebox-eae3051d0de2250d8e5b8ee1dbbcb0dc5f5ad55d.tar.gz barebox-eae3051d0de2250d8e5b8ee1dbbcb0dc5f5ad55d.tar.xz |
dts: update to v4.17-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64')
-rw-r--r-- | dts/src/arm64/exynos/exynos5433.dtsi | 2 | ||||
-rw-r--r-- | dts/src/arm64/marvell/armada-cp110.dtsi | 7 | ||||
-rw-r--r-- | dts/src/arm64/nvidia/tegra186-p3310.dtsi | 2 | ||||
-rw-r--r-- | dts/src/arm64/socionext/uniphier-ld11.dtsi | 2 | ||||
-rw-r--r-- | dts/src/arm64/socionext/uniphier-ld20-ref.dts | 8 | ||||
-rw-r--r-- | dts/src/arm64/socionext/uniphier-ld20.dtsi | 2 | ||||
-rw-r--r-- | dts/src/arm64/socionext/uniphier-pxs3.dtsi | 2 |
7 files changed, 18 insertions, 7 deletions
diff --git a/dts/src/arm64/exynos/exynos5433.dtsi b/dts/src/arm64/exynos/exynos5433.dtsi index c0231d077f..1ad8677f6a 100644 --- a/dts/src/arm64/exynos/exynos5433.dtsi +++ b/dts/src/arm64/exynos/exynos5433.dtsi @@ -1317,7 +1317,7 @@ reg = <0x14d60000 0x100>; dmas = <&pdma0 31 &pdma0 30>; dma-names = "tx", "rx"; - interrupts = <GIC_SPI 435 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu_peric CLK_PCLK_I2S1>, <&cmu_peric CLK_PCLK_I2S1>, <&cmu_peric CLK_SCLK_I2S1>; diff --git a/dts/src/arm64/marvell/armada-cp110.dtsi b/dts/src/arm64/marvell/armada-cp110.dtsi index 48cad7919e..ed2f1237ea 100644 --- a/dts/src/arm64/marvell/armada-cp110.dtsi +++ b/dts/src/arm64/marvell/armada-cp110.dtsi @@ -38,9 +38,10 @@ compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>; clocks = <&CP110_LABEL(clk) 1 3>, <&CP110_LABEL(clk) 1 9>, - <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 18>; + <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>, + <&CP110_LABEL(clk) 1 18>; clock-names = "pp_clk", "gop_clk", - "mg_clk", "axi_clk"; + "mg_clk", "mg_core_clk", "axi_clk"; marvell,system-controller = <&CP110_LABEL(syscon0)>; status = "disabled"; dma-coherent; @@ -141,6 +142,8 @@ #size-cells = <0>; compatible = "marvell,xmdio"; reg = <0x12a600 0x10>; + clocks = <&CP110_LABEL(clk) 1 5>, + <&CP110_LABEL(clk) 1 6>, <&CP110_LABEL(clk) 1 18>; status = "disabled"; }; diff --git a/dts/src/arm64/nvidia/tegra186-p3310.dtsi b/dts/src/arm64/nvidia/tegra186-p3310.dtsi index a8baad7b80..13f57fff14 100644 --- a/dts/src/arm64/nvidia/tegra186-p3310.dtsi +++ b/dts/src/arm64/nvidia/tegra186-p3310.dtsi @@ -46,7 +46,7 @@ compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x0>; interrupt-parent = <&gpio>; - interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_HIGH>; + interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>; }; }; }; diff --git a/dts/src/arm64/socionext/uniphier-ld11.dtsi b/dts/src/arm64/socionext/uniphier-ld11.dtsi index e62bda1cf2..c32dd3419c 100644 --- a/dts/src/arm64/socionext/uniphier-ld11.dtsi +++ b/dts/src/arm64/socionext/uniphier-ld11.dtsi @@ -414,7 +414,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; diff --git a/dts/src/arm64/socionext/uniphier-ld20-ref.dts b/dts/src/arm64/socionext/uniphier-ld20-ref.dts index 2c1a92fafb..440c2e6a63 100644 --- a/dts/src/arm64/socionext/uniphier-ld20-ref.dts +++ b/dts/src/arm64/socionext/uniphier-ld20-ref.dts @@ -67,3 +67,11 @@ reg = <0>; }; }; + +&pinctrl_ether_rgmii { + tx { + pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1", + "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL"; + drive-strength = <9>; + }; +}; diff --git a/dts/src/arm64/socionext/uniphier-ld20.dtsi b/dts/src/arm64/socionext/uniphier-ld20.dtsi index 9efe20d075..3a5ed789c0 100644 --- a/dts/src/arm64/socionext/uniphier-ld20.dtsi +++ b/dts/src/arm64/socionext/uniphier-ld20.dtsi @@ -519,7 +519,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; diff --git a/dts/src/arm64/socionext/uniphier-pxs3.dtsi b/dts/src/arm64/socionext/uniphier-pxs3.dtsi index 7c8f710d9b..e85d6ddea3 100644 --- a/dts/src/arm64/socionext/uniphier-pxs3.dtsi +++ b/dts/src/arm64/socionext/uniphier-pxs3.dtsi @@ -334,7 +334,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; |