diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-03-10 08:56:15 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-03-10 08:56:15 +0100 |
commit | 957bb6b6bcebc4c36f5f284dfb58d489e81016c6 (patch) | |
tree | 593d098617017987daaf8ce339e0eb29ea09fdde /dts/src/mips/brcm | |
parent | cc2392cf4f2d5208be427e9ffdeafba192f05cbe (diff) | |
download | barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.gz barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.xz |
dts: update to v4.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/mips/brcm')
-rw-r--r-- | dts/src/mips/brcm/bcm7125.dtsi | 49 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7346.dtsi | 43 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7358.dtsi | 43 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7360.dtsi | 43 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7362.dtsi | 43 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7420.dtsi | 49 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7425.dtsi | 43 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm7435.dtsi | 43 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97125cbmb.dts | 4 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97346dbsmb.dts | 4 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97358svmb.dts | 36 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97360svmb.dts | 36 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97362svmb.dts | 4 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97420c.dts | 4 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97425svmb.dts | 36 | ||||
-rw-r--r-- | dts/src/mips/brcm/bcm97435svmb.dts | 4 |
16 files changed, 478 insertions, 6 deletions
diff --git a/dts/src/mips/brcm/bcm7125.dtsi b/dts/src/mips/brcm/bcm7125.dtsi index bbd00f65ce..79f838ed96 100644 --- a/dts/src/mips/brcm/bcm7125.dtsi +++ b/dts/src/mips/brcm/bcm7125.dtsi @@ -91,15 +91,15 @@ compatible = "brcm,bcm7120-l2-intc"; reg = <0x406780 0x8>; - brcm,int-map-mask = <0x44>, <0xf000000>; + brcm,int-map-mask = <0x44>, <0xf000000>, <0x100000>; brcm,int-fwd-mask = <0x70000>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&periph_intc>; - interrupts = <18>, <19>; - interrupt-names = "upg_main", "upg_bsc"; + interrupts = <18>, <19>, <20>; + interrupt-names = "upg_main", "upg_bsc", "upg_spi"; }; sun_top_ctrl: syscon@404000 { @@ -226,5 +226,48 @@ interrupts = <61>; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@411d00 { + compatible = "brcm,l2-intc"; + reg = <0x411d00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <79>; + }; + + qspi: spi@443000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@406400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x406400 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7346.dtsi b/dts/src/mips/brcm/bcm7346.dtsi index 4bbcc95f1c..da7bfa45a5 100644 --- a/dts/src/mips/brcm/bcm7346.dtsi +++ b/dts/src/mips/brcm/bcm7346.dtsi @@ -439,5 +439,48 @@ interrupts = <85>; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@411d00 { + compatible = "brcm,l2-intc"; + reg = <0x411d00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <31>; + }; + + qspi: spi@413000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@408a00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x408a00 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7358.dtsi b/dts/src/mips/brcm/bcm7358.dtsi index 3e42535c8d..9b05760453 100644 --- a/dts/src/mips/brcm/bcm7358.dtsi +++ b/dts/src/mips/brcm/bcm7358.dtsi @@ -318,5 +318,48 @@ interrupts = <24>; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@411d00 { + compatible = "brcm,l2-intc"; + reg = <0x411d00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <31>; + }; + + qspi: spi@413000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@408a00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x408a00 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7360.dtsi b/dts/src/mips/brcm/bcm7360.dtsi index 112a5571c5..57b613c6ac 100644 --- a/dts/src/mips/brcm/bcm7360.dtsi +++ b/dts/src/mips/brcm/bcm7360.dtsi @@ -358,5 +358,48 @@ interrupts = <82>; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@411d00 { + compatible = "brcm,l2-intc"; + reg = <0x411d00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <31>; + }; + + qspi: spi@413000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@408a00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x408a00 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7362.dtsi b/dts/src/mips/brcm/bcm7362.dtsi index 34abfb0b07..c2a2843aaa 100644 --- a/dts/src/mips/brcm/bcm7362.dtsi +++ b/dts/src/mips/brcm/bcm7362.dtsi @@ -354,5 +354,48 @@ interrupts = <82>; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@411d00 { + compatible = "brcm,l2-intc"; + reg = <0x411d00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <31>; + }; + + qspi: spi@413000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@408a00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x408a00 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7420.dtsi b/dts/src/mips/brcm/bcm7420.dtsi index b143723c67..532fc8a157 100644 --- a/dts/src/mips/brcm/bcm7420.dtsi +++ b/dts/src/mips/brcm/bcm7420.dtsi @@ -92,15 +92,15 @@ compatible = "brcm,bcm7120-l2-intc"; reg = <0x406780 0x8>; - brcm,int-map-mask = <0x44>, <0x1f000000>; + brcm,int-map-mask = <0x44>, <0x1f000000>, <0x100000>; brcm,int-fwd-mask = <0x70000>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&periph_intc>; - interrupts = <18>, <19>; - interrupt-names = "upg_main", "upg_bsc"; + interrupts = <18>, <19>, <20>; + interrupt-names = "upg_main", "upg_bsc", "upg_spi"; }; sun_top_ctrl: syscon@404000 { @@ -287,5 +287,48 @@ interrupts = <62>; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@411d00 { + compatible = "brcm,l2-intc"; + reg = <0x411d00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <78>; + }; + + qspi: spi@443000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@406400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x406400 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7425.dtsi b/dts/src/mips/brcm/bcm7425.dtsi index 2488d2f61f..f56fb25f2e 100644 --- a/dts/src/mips/brcm/bcm7425.dtsi +++ b/dts/src/mips/brcm/bcm7425.dtsi @@ -450,5 +450,48 @@ mmc-hs200-1_8v; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@41ad00 { + compatible = "brcm,l2-intc"; + reg = <0x41ad00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <25>; + }; + + qspi: spi@41c000 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x419920 0x4 0x41c200 0x188 0x41c000 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@409200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x409200 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm7435.dtsi b/dts/src/mips/brcm/bcm7435.dtsi index 19fa259b96..f2cead2eae 100644 --- a/dts/src/mips/brcm/bcm7435.dtsi +++ b/dts/src/mips/brcm/bcm7435.dtsi @@ -465,5 +465,48 @@ mmc-hs200-1_8v; status = "disabled"; }; + + spi_l2_intc: interrupt-controller@41bd00 { + compatible = "brcm,l2-intc"; + reg = <0x41bd00 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <25>; + }; + + qspi: spi@41d200 { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-qspi"; + clocks = <&upg_clk>; + reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>; + reg-names = "cs_reg", "hif_mspi", "bspi"; + interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>; + interrupt-parent = <&spi_l2_intc>; + interrupt-names = "spi_lr_fullness_reached", + "spi_lr_session_aborted", + "spi_lr_impatient", + "spi_lr_session_done", + "spi_lr_overread", + "mspi_done", + "mspi_halted"; + status = "disabled"; + }; + + mspi: spi@409200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,spi-bcm-qspi", + "brcm,spi-brcmstb-mspi"; + clocks = <&upg_clk>; + reg = <0x409200 0x180>; + reg-names = "mspi"; + interrupts = <0x14>; + interrupt-parent = <&upg_aon_irq0_intc>; + interrupt-names = "mspi_done"; + status = "disabled"; + }; }; }; diff --git a/dts/src/mips/brcm/bcm97125cbmb.dts b/dts/src/mips/brcm/bcm97125cbmb.dts index 5c24eacd72..d72bc423ce 100644 --- a/dts/src/mips/brcm/bcm97125cbmb.dts +++ b/dts/src/mips/brcm/bcm97125cbmb.dts @@ -57,3 +57,7 @@ &ohci0 { status = "disabled"; }; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97346dbsmb.dts b/dts/src/mips/brcm/bcm97346dbsmb.dts index e67eaf30de..ea52d7b577 100644 --- a/dts/src/mips/brcm/bcm97346dbsmb.dts +++ b/dts/src/mips/brcm/bcm97346dbsmb.dts @@ -109,3 +109,7 @@ &sdhci0 { status = "okay"; }; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97358svmb.dts b/dts/src/mips/brcm/bcm97358svmb.dts index ee4607fae4..71357fdc19 100644 --- a/dts/src/mips/brcm/bcm97358svmb.dts +++ b/dts/src/mips/brcm/bcm97358svmb.dts @@ -69,3 +69,39 @@ &nand { status = "okay"; }; + +&qspi { + status = "okay"; + + m25p80@0 { + compatible = "m25p80"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-cpol; + spi-cpha; + use-bspi; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + flash0.cfe@0 { + reg = <0x0 0x200000>; + }; + + flash0.mac@200000 { + reg = <0x200000 0x40000>; + }; + + flash0.nvram@240000 { + reg = <0x240000 0x10000>; + }; + }; + }; +}; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97360svmb.dts b/dts/src/mips/brcm/bcm97360svmb.dts index bed821b030..e2fed406c6 100644 --- a/dts/src/mips/brcm/bcm97360svmb.dts +++ b/dts/src/mips/brcm/bcm97360svmb.dts @@ -72,3 +72,39 @@ &sdhci0 { status = "okay"; }; + +&qspi { + status = "okay"; + + m25p80@0 { + compatible = "m25p80"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-cpol; + spi-cpha; + use-bspi; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + flash0.cfe@0 { + reg = <0x0 0x200000>; + }; + + flash0.mac@200000 { + reg = <0x200000 0x40000>; + }; + + flash0.nvram@240000 { + reg = <0x240000 0x10000>; + }; + }; + }; +}; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97362svmb.dts b/dts/src/mips/brcm/bcm97362svmb.dts index 68fd823868..78bffdf118 100644 --- a/dts/src/mips/brcm/bcm97362svmb.dts +++ b/dts/src/mips/brcm/bcm97362svmb.dts @@ -73,3 +73,7 @@ &sdhci0 { status = "okay"; }; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97420c.dts b/dts/src/mips/brcm/bcm97420c.dts index e66271af05..d62b448a15 100644 --- a/dts/src/mips/brcm/bcm97420c.dts +++ b/dts/src/mips/brcm/bcm97420c.dts @@ -79,3 +79,7 @@ &ohci1 { status = "okay"; }; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97425svmb.dts b/dts/src/mips/brcm/bcm97425svmb.dts index f95ba1bf3e..73aa006bd9 100644 --- a/dts/src/mips/brcm/bcm97425svmb.dts +++ b/dts/src/mips/brcm/bcm97425svmb.dts @@ -107,3 +107,39 @@ &sdhci1 { status = "okay"; }; + +&qspi { + status = "okay"; + + m25p80@0 { + compatible = "m25p80"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-cpol; + spi-cpha; + use-bspi; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + flash0.cfe@0 { + reg = <0x0 0x200000>; + }; + + flash0.mac@200000 { + reg = <0x200000 0x40000>; + }; + + flash0.nvram@240000 { + reg = <0x240000 0x10000>; + }; + }; + }; +}; + +&mspi { + status = "okay"; +}; diff --git a/dts/src/mips/brcm/bcm97435svmb.dts b/dts/src/mips/brcm/bcm97435svmb.dts index fb37b7111b..0a915f3fea 100644 --- a/dts/src/mips/brcm/bcm97435svmb.dts +++ b/dts/src/mips/brcm/bcm97435svmb.dts @@ -115,3 +115,7 @@ &sdhci1 { status = "okay"; }; + +&mspi { + status = "okay"; +}; |