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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-19 08:56:07 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-19 08:56:07 +0200 |
| commit | 2aab3dbb7e3d6dc24bf82a949ab4372a8d7e30e6 (patch) | |
| tree | 13ae4927106696992ab8a0d8b1e362ceee6268c2 /dts/src/riscv | |
| parent | a3e62ffc7341254fd754886e560865556bc731c8 (diff) | |
| download | barebox-2aab3dbb7e3d6dc24bf82a949ab4372a8d7e30e6.tar.gz barebox-2aab3dbb7e3d6dc24bf82a949ab4372a8d7e30e6.tar.xz | |
dts: update to v5.2-rc7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/riscv')
| -rw-r--r-- | dts/src/riscv/sifive/fu540-c000.dtsi | 6 | ||||
| -rw-r--r-- | dts/src/riscv/sifive/hifive-unleashed-a00.dts | 13 |
2 files changed, 19 insertions, 0 deletions
diff --git a/dts/src/riscv/sifive/fu540-c000.dtsi b/dts/src/riscv/sifive/fu540-c000.dtsi index 3c06ee4b2b..40983491b9 100644 --- a/dts/src/riscv/sifive/fu540-c000.dtsi +++ b/dts/src/riscv/sifive/fu540-c000.dtsi @@ -163,6 +163,7 @@ interrupt-parent = <&plic0>; interrupts = <4>; clocks = <&prci PRCI_CLK_TLCLK>; + status = "disabled"; }; uart1: serial@10011000 { compatible = "sifive,fu540-c000-uart", "sifive,uart0"; @@ -170,6 +171,7 @@ interrupt-parent = <&plic0>; interrupts = <5>; clocks = <&prci PRCI_CLK_TLCLK>; + status = "disabled"; }; i2c0: i2c@10030000 { compatible = "sifive,fu540-c000-i2c", "sifive,i2c0"; @@ -181,6 +183,7 @@ reg-io-width = <1>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; qspi0: spi@10040000 { compatible = "sifive,fu540-c000-spi", "sifive,spi0"; @@ -191,6 +194,7 @@ clocks = <&prci PRCI_CLK_TLCLK>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; qspi1: spi@10041000 { compatible = "sifive,fu540-c000-spi", "sifive,spi0"; @@ -201,6 +205,7 @@ clocks = <&prci PRCI_CLK_TLCLK>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; qspi2: spi@10050000 { compatible = "sifive,fu540-c000-spi", "sifive,spi0"; @@ -210,6 +215,7 @@ clocks = <&prci PRCI_CLK_TLCLK>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; }; diff --git a/dts/src/riscv/sifive/hifive-unleashed-a00.dts b/dts/src/riscv/sifive/hifive-unleashed-a00.dts index 4da88707e2..0b55c53c08 100644 --- a/dts/src/riscv/sifive/hifive-unleashed-a00.dts +++ b/dts/src/riscv/sifive/hifive-unleashed-a00.dts @@ -42,7 +42,20 @@ }; }; +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + &qspi0 { + status = "okay"; flash@0 { compatible = "issi,is25wp256", "jedec,spi-nor"; reg = <0>; |