summaryrefslogtreecommitdiffstats
path: root/dts
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2018-05-31 17:28:39 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-05-31 17:28:39 +0200
commit12c185db6011626610f51d17edd1e0a49444ac87 (patch)
treeb05a29ad46204b42b5fffc884058160bdbee561c /dts
parenteae3051d0de2250d8e5b8ee1dbbcb0dc5f5ad55d (diff)
downloadbarebox-12c185db6011626610f51d17edd1e0a49444ac87.tar.gz
dts: update to v4.17-rc7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts')
-rw-r--r--dts/Bindings/net/micrel-ksz90x1.txt7
-rw-r--r--dts/src/arm/sun4i-a10.dtsi6
-rw-r--r--dts/src/arm/sun8i-h3-orangepi-one.dts1
-rw-r--r--dts/src/arm/sun8i-v3s-licheepi-zero-dock.dts2
-rw-r--r--dts/src/arm64/hisilicon/hi6220-hikey.dts1
5 files changed, 12 insertions, 5 deletions
diff --git a/dts/Bindings/net/micrel-ksz90x1.txt b/dts/Bindings/net/micrel-ksz90x1.txt
index 42a2483..e22d8cf 100644
--- a/dts/Bindings/net/micrel-ksz90x1.txt
+++ b/dts/Bindings/net/micrel-ksz90x1.txt
@@ -57,6 +57,13 @@ KSZ9031:
- txd2-skew-ps : Skew control of TX data 2 pad
- txd3-skew-ps : Skew control of TX data 3 pad
+ - micrel,force-master:
+ Boolean, force phy to master mode. Only set this option if the phy
+ reference clock provided at CLK125_NDO pin is used as MAC reference
+ clock because the clock jitter in slave mode is to high (errata#2).
+ Attention: The link partner must be configurable as slave otherwise
+ no link will be established.
+
Examples:
mdio {
diff --git a/dts/src/arm/sun4i-a10.dtsi b/dts/src/arm/sun4i-a10.dtsi
index 77e8436..3a1c6b4 100644
--- a/dts/src/arm/sun4i-a10.dtsi
+++ b/dts/src/arm/sun4i-a10.dtsi
@@ -76,7 +76,7 @@
allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
<&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
- <&ccu CLK_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
+ <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
<&ccu CLK_TCON0_CH1>, <&ccu CLK_HDMI>,
<&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
@@ -88,7 +88,7 @@
allwinner,pipeline = "de_fe0-de_be0-lcd0";
clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
<&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_BE0>,
- <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_TCON0_CH0>,
+ <&ccu CLK_DE_FE0>, <&ccu CLK_TCON0_CH0>,
<&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
@@ -99,7 +99,7 @@
allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
<&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
- <&ccu CLK_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
+ <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
<&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_TVE0>,
<&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
diff --git a/dts/src/arm/sun8i-h3-orangepi-one.dts b/dts/src/arm/sun8i-h3-orangepi-one.dts
index 3328fe5..232f124 100644
--- a/dts/src/arm/sun8i-h3-orangepi-one.dts
+++ b/dts/src/arm/sun8i-h3-orangepi-one.dts
@@ -117,6 +117,7 @@
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+ status = "okay";
};
&hdmi {
diff --git a/dts/src/arm/sun8i-v3s-licheepi-zero-dock.dts b/dts/src/arm/sun8i-v3s-licheepi-zero-dock.dts
index d131109..ad17360 100644
--- a/dts/src/arm/sun8i-v3s-licheepi-zero-dock.dts
+++ b/dts/src/arm/sun8i-v3s-licheepi-zero-dock.dts
@@ -51,7 +51,7 @@
leds {
/* The LEDs use PG0~2 pins, which conflict with MMC1 */
- status = "disbaled";
+ status = "disabled";
};
};
diff --git a/dts/src/arm64/hisilicon/hi6220-hikey.dts b/dts/src/arm64/hisilicon/hi6220-hikey.dts
index 724a0d3..edb4ee0 100644
--- a/dts/src/arm64/hisilicon/hi6220-hikey.dts
+++ b/dts/src/arm64/hisilicon/hi6220-hikey.dts
@@ -299,7 +299,6 @@
/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
dwmmc_0: dwmmc0@f723d000 {
- max-frequency = <150000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
non-removable;