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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-08-31 08:39:19 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-08-31 08:39:19 +0200 |
| commit | 3e8a44b569ee8883f70d6ce3414a105b30632133 (patch) | |
| tree | be44014d5aa0dd6851d9410d70b1a6550c39e58d /dts | |
| parent | 253c608e09b23b0eff7f564a99bc4cd21e07bd5c (diff) | |
| download | barebox-3e8a44b569ee8883f70d6ce3414a105b30632133.tar.gz barebox-3e8a44b569ee8883f70d6ce3414a105b30632133.tar.xz | |
dts: update to v6.0-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts')
| -rw-r--r-- | dts/Bindings/thermal/thermal-zones.yaml | 1 | ||||
| -rw-r--r-- | dts/src/riscv/microchip/mpfs-icicle-kit.dts | 3 | ||||
| -rw-r--r-- | dts/src/riscv/microchip/mpfs-polarberry.dts | 3 | ||||
| -rw-r--r-- | dts/src/riscv/microchip/mpfs.dtsi | 5 |
4 files changed, 3 insertions, 9 deletions
diff --git a/dts/Bindings/thermal/thermal-zones.yaml b/dts/Bindings/thermal/thermal-zones.yaml index 2d34f3ccb2..8d2c6d74b6 100644 --- a/dts/Bindings/thermal/thermal-zones.yaml +++ b/dts/Bindings/thermal/thermal-zones.yaml @@ -214,6 +214,7 @@ patternProperties: - polling-delay - polling-delay-passive - thermal-sensors + - trips additionalProperties: false diff --git a/dts/src/riscv/microchip/mpfs-icicle-kit.dts b/dts/src/riscv/microchip/mpfs-icicle-kit.dts index 044982a11d..f3f87ed200 100644 --- a/dts/src/riscv/microchip/mpfs-icicle-kit.dts +++ b/dts/src/riscv/microchip/mpfs-icicle-kit.dts @@ -84,12 +84,10 @@ phy1: ethernet-phy@9 { reg = <9>; - ti,fifo-depth = <0x1>; }; phy0: ethernet-phy@8 { reg = <8>; - ti,fifo-depth = <0x1>; }; }; @@ -102,7 +100,6 @@ disable-wp; cap-sd-highspeed; cap-mmc-highspeed; - card-detect-delay = <200>; mmc-ddr-1_8v; mmc-hs200-1_8v; sd-uhs-sdr12; diff --git a/dts/src/riscv/microchip/mpfs-polarberry.dts b/dts/src/riscv/microchip/mpfs-polarberry.dts index 82c93c8f5c..c87cc2d8fe 100644 --- a/dts/src/riscv/microchip/mpfs-polarberry.dts +++ b/dts/src/riscv/microchip/mpfs-polarberry.dts @@ -54,12 +54,10 @@ phy1: ethernet-phy@5 { reg = <5>; - ti,fifo-depth = <0x01>; }; phy0: ethernet-phy@4 { reg = <4>; - ti,fifo-depth = <0x01>; }; }; @@ -72,7 +70,6 @@ disable-wp; cap-sd-highspeed; cap-mmc-highspeed; - card-detect-delay = <200>; mmc-ddr-1_8v; mmc-hs200-1_8v; sd-uhs-sdr12; diff --git a/dts/src/riscv/microchip/mpfs.dtsi b/dts/src/riscv/microchip/mpfs.dtsi index 499c2e63ad..74493344ea 100644 --- a/dts/src/riscv/microchip/mpfs.dtsi +++ b/dts/src/riscv/microchip/mpfs.dtsi @@ -193,7 +193,7 @@ cache-size = <2097152>; cache-unified; interrupt-parent = <&plic>; - interrupts = <1>, <2>, <3>; + interrupts = <1>, <3>, <4>, <2>; }; clint: clint@2000000 { @@ -485,9 +485,8 @@ ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>; msi-parent = <&pcie>; msi-controller; - microchip,axi-m-atr0 = <0x10 0x0>; status = "disabled"; - pcie_intc: legacy-interrupt-controller { + pcie_intc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; |