diff options
| author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2018-07-31 12:44:40 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-08-08 09:22:48 +0200 |
| commit | 21fbe47970155751bb913afa81496eea341a40a1 (patch) | |
| tree | ede19275f19c0b214b5ccfdb09f14366df28609e /images | |
| parent | 8a680e3c9b5dd8470b7437654877d5439e9a6407 (diff) | |
| download | barebox-21fbe47970155751bb913afa81496eea341a40a1.tar.gz barebox-21fbe47970155751bb913afa81496eea341a40a1.tar.xz | |
ARM: socfpga: achilles: convert to PBL barebox
Previously the FPGA was configured externally on the Achilles. On newer versions
this is changed and barebox has to configure the FPGA before the SDRAM can be
used.
If the FPGA is configured via JTAG or from an external memory, the *-bringup
version can be used.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'images')
| -rw-r--r-- | images/Makefile.socfpga | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/images/Makefile.socfpga b/images/Makefile.socfpga index bba01a38b2..a075b36702 100644 --- a/images/Makefile.socfpga +++ b/images/Makefile.socfpga @@ -42,9 +42,13 @@ FILE_barebox-socfpga-de0_nano_soc.img = start_socfpga_de0_nano_soc.pblx socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc.img pblx-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles -FILE_barebox-socfpga-achilles.img = start_socfpga_achilles.pblx.socfpgaimg +FILE_barebox-socfpga-achilles.img = start_socfpga_achilles.socfpga-ocram-img socfpga-barebox-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += barebox-socfpga-achilles.img +pblx-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles_bringup +FILE_barebox-socfpga-achilles-bringup.img = start_socfpga_achilles_bringup.pblx +socfpga-barebox-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += barebox-socfpga-achilles-bringup.img + pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblx.socfpgaimg socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img |