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author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-10-28 10:10:56 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-10-28 10:10:56 +0100 |
commit | 40a5f3de4e19d43fd34ddd0d81542f73ec64a287 (patch) | |
tree | 0ecbebaaa9ddec5dce11382cfce8b473517b4ae6 /include/asm-blackfin/cplb.h | |
parent | 5b28d03dbbfda2409a8bff4b77d5f38824a74782 (diff) | |
parent | daad436bf76ad8acdf66326b1cc3769434cca97f (diff) | |
download | barebox-40a5f3de4e19d43fd34ddd0d81542f73ec64a287.tar.gz barebox-40a5f3de4e19d43fd34ddd0d81542f73ec64a287.tar.xz |
Merge branch 'for-sascha' of git://uboot.jcrosoft.org/u-boot-v2 into from-jean
Conflicts:
board/a9m2440/a9m2440.c
board/pcm043/pcm043.c
drivers/nand/nand_imx.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/asm-blackfin/cplb.h')
-rw-r--r-- | include/asm-blackfin/cplb.h | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h deleted file mode 100644 index 7715f645de..0000000000 --- a/include/asm-blackfin/cplb.h +++ /dev/null @@ -1,48 +0,0 @@ -/************************************************************************ - * - * cplb.h - * - * (c) Copyright 2002-2003 Analog Devices, Inc. All rights reserved. - * - ************************************************************************/ - -/* Defines necessary for cplb initialisation routines. */ - -#ifndef _CPLB_H -#define _CPLB_H - -#define CPLB_ENABLE_ICACHE_P 0 -#define CPLB_ENABLE_DCACHE_P 1 -#define CPLB_ENABLE_DCACHE2_P 2 -#define CPLB_ENABLE_CPLBS_P 3 /* Deprecated!*/ -#define CPLB_ENABLE_ICPLBS_P 4 -#define CPLB_ENABLE_DCPLBS_P 5 - -#define CPLB_ENABLE_ICACHE (1<<CPLB_ENABLE_ICACHE_P) -#define CPLB_ENABLE_DCACHE (1<<CPLB_ENABLE_DCACHE_P) -#define CPLB_ENABLE_DCACHE2 (1<<CPLB_ENABLE_DCACHE2_P) -#define CPLB_ENABLE_CPLBS (1<<CPLB_ENABLE_CPLBS_P) -#define CPLB_ENABLE_ICPLBS (1<<CPLB_ENABLE_ICPLBS_P) -#define CPLB_ENABLE_DCPLBS (1<<CPLB_ENABLE_DCPLBS_P) -#define CPLB_ENABLE_ANY_CPLBS CPLB_ENABLE_CPLBS | \ - CPLB_ENABLE_ICPLBS | \ - CPLB_ENABLE_DCPLBS - -#define CPLB_RELOADED 0x0000 -#define CPLB_NO_UNLOCKED 0x0001 -#define CPLB_NO_ADDR_MATCH 0x0002 -#define CPLB_PROT_VIOL 0x0003 - -#define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT -#define CPLB_CACHE_ENABLED CPLB_L1_CHBL | CPLB_DIRTY - -#define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR - -#define CPLB_I_PAGE_MGMT CPLB_LOCK | CPLB_VALID -#define CPLB_D_PAGE_MGMT CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID -#define CPLB_DNOCACHE CPLB_ALL_ACCESS | CPLB_VALID -#define CPLB_DDOCACHE CPLB_DNOCACHE | CPLB_DEF_CACHE -#define CPLB_INOCACHE CPLB_USER_RD | CPLB_VALID -#define CPLB_IDOCACHE CPLB_INOCACHE | CPLB_L1_CHBL - -#endif /* _CPLB_H */ |